The Datasheet Archive

Top Results (6)

Part ECAD Model Manufacturer Description Datasheet Download Buy Part
BM2P109TF BM2P109TF ECAD Model ROHM Semiconductor Switching Regulator,
BM2SC124FP2-LBZ BM2SC124FP2-LBZ ECAD Model ROHM Semiconductor Quasi-resonant(Low EMI) AC/DC Converter Built-in 1700 V SiC-MOSFET (FB OLP=Latch ,VCC OVP=Auto Restart)
BD9A600MUV BD9A600MUV ECAD Model ROHM Semiconductor 2.7V to 5.5V Input, 6A Integrated MOSFET, Single Synchronous Buck DC/DC Converter
BD9D321EFJ BD9D321EFJ ECAD Model ROHM Semiconductor 4.5 to 18V 3.0A 1ch Synchronous Buck Converter,External Current Detection Resistors, 1.4 ohm on resistor
BD9G341AEFJ-LB BD9G341AEFJ-LB ECAD Model ROHM Semiconductor 12V to 76V, Buck switching regulator with integrated 150mΩ power MOSFET (Industrial Grade)
BD9P205MUF-C BD9P205MUF-C ECAD Model ROHM Semiconductor 3.5V to 40V Input, 0.8V to 8.5V Output, 2A Single 2.2MHz Buck DC/DC Converter For Automotive, VQFN20FV4040 Package

ECL IC NAND Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
ET3000

Abstract: ER22T m21g ET-30 R04T ET1500 ECL IC NAND IR1P
Text: FUJITSU DATA S H E E T ET750, ET1500, ET3000, ET4500 ECL Series Gate Arrays_ D E S C R IP T IO , access. Designed to provide fast ECL Internal cells with TTL, ECL , or mixed TTL/ ECL input/output buffers , 's proprietary Integrated design system software on popular CAE workstations, the Fujitsu ECL Series Gate Arrays , the convenience of TTL with the fast com putational power of ECL . You get 100 percent place and route with 90 percent utilization guaranteed. G E N E R A L FEATURES High speed series gated ECL internal


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PDF 374T7 001MbIO ET750, ET1500, ET3000, ET4500 ET1500 ET30Q0, ET3000 ER22T m21g ET-30 R04T ET1500 ECL IC NAND IR1P
full adder circuit using nor gates

Abstract: D14DL gating a signal using NAND gates half adder ic number equivalent transistor K 3565 nor_4 fd2h LD10H RAM-6A
Text: h * - i i - i : DATA S H E E T FUJITSU E30000VH ECL Gate Array FEATURES · High , Options -1 0 K H E C L - 1 0 0 K ECL ECL Output Options - 25W, 50W, and 100W - Series terminated Advanced Packaging Solutions - 441 -pin ceram ic pin grid array package - Supplied with pre-attached heat sinks - , , and instrumentation. VH series ECL arrays are designed using Fujitsu's integrated design system , 31E D El 374=^2 0014bS0 4 S F M I Ty 5 v / / i E30000VH ECL DC CHARACTERISTICS (10KH


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PDF 37417b2 E30000VH 0014bbb E30000VH -30000V LD10L LD10H full adder circuit using nor gates D14DL gating a signal using NAND gates half adder ic number equivalent transistor K 3565 nor_4 fd2h RAM-6A
MB1700

Abstract: E128 flip-flop
Text: February 1990 Edition 1.1 D A TA S H E E T E128H, E32, E128 Ultra High Performance ECL Gate , to m e e t th e need fo r a h ig h -s p e e d s m a ll c irc u it d e v ic e w ith s im p lifie d d e , rm a n c e s p e c ific a tio n s and lo g ic fu n c tio n s . D e v ic e le ve l s im u la tio n can be p e rfo rm e d u sing S P IC E . Th e U ltra H igh P e rfo rm a n c e arra y s c o n s is t of a ra n g e o f u p to 128 e q u iv a le n t g a te s, ea c h m a d e up o f b a s ic c e lls w h ic h m


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PDF E128H, E128H MB1700 E128 flip-flop
logos 4012B

Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
Text: L p i > « ,(* S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY SEM IC O N IN D EXES LIMITED THE , VOLUME 3 D IG ITA L & ANALOGUE I.C . TH E SEMICON INDEXES VOLUME 3 5th E D I T I O N 1985 , Unitrode ALPH A -N U M ER IC LISTING OF A L L IN TEG RA TED C IR C U IT D E V IC E S FOR THE , , GEN,PURP COMP, C = C e r a m i c : M « M e t a l : P - P la s t ic jj< HIGH HIGH HIGH


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PDF TDA1510 TDA1510A logos 4012B 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
Silicon npn TRANSISTOR TCNL 100

Abstract: tcnl 100 TRANSISTOR TCNL 100 ECL IC NAND MUX4E schematic of TTL XOR Gates TSN2 tcnl transistor ic xnor XOR23
Text: Microelectronics BEST-1 Series High-Performance ECL Gate Arrays Features ■1,000 and 4,000 equivalent logic , (stacked logic) ■Three metal levels, including two mask-programmable levels ■10KH or 100K ECL and , frequency — 1.0 GHz ECL output buffer — 2.0 GHz ECL input buffer ■Mentor Graphics* and Cadence , Description The BEST-1 Series High-Performance ECL Gate Arrays use AT&T's bipolar-enhanced , . The BEST-1 ECL gate array family combines advanced process technology with innovative design and


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PDF 005002b 001021b Silicon npn TRANSISTOR TCNL 100 tcnl 100 TRANSISTOR TCNL 100 ECL IC NAND MUX4E schematic of TTL XOR Gates TSN2 tcnl transistor ic xnor XOR23
L42n

Abstract: HM3500 adb 630 L43n "alu 4 bit" ECL IC NAND L44N PT06-16-8P-S/transistor 03e
Text: and CML I/O * HM Series - Mixed LSTTL/ ECL /CML I/O · Full CAD Capability at Customer Site on Popular , standard ECL or TTL I/O compatibility to provide the optimum balance of perfor mance, power and logic , and HVM10000 arrays also provide ECL performance at low power levels in military system applications. The ADB family uses CAD-programmable CML macrocells to provide ECL speed where needed yet maintain , °C 0 to +70°C ADB-IITM 2.5|am HSD HVM10000 10,530 4,144 175ps 400MHz LSTTL, CML, ECL 10K/KH, ECL


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PDF DD00212 HM3500, HE12000 ECL10K/KH/100K 148-Pin MIL-M-38510/600 MIL-STD-883C L42n HM3500 adb 630 L43n "alu 4 bit" ECL IC NAND L44N PT06-16-8P-S/transistor 03e
FD31N

Abstract: DRF20-S MB1700 mb160 FD11P ECL IC NAND
Text: E l FMI DATA S H E E T FUJITSU E128H, E32, E128 Ultra High Performance ECL Gate Arrays DESCRIPTION The Fujitsu Ultra High Performance E128, E32, and E128H ECL gate arrays offer the highest speed , Buffer TTL Level (Pseudo ECL supported upon request Power Supply +5 V OV I/O Buffer ECL Level Power , Basic Cell 31E D ^ 3 7 4 T 7 b 2 G G l M S T ì Û El FMI ECL Up to 2-level Series Gate , Cells Basic Celi ECL Up to 2-level Series Gate -Flip-flop with Set and Reset =4 cells -Latch/EOR/AND/2


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PDF E128H, E128H 374T7L FD31N DRF20-S MB1700 mb160 FD11P ECL IC NAND
full adder circuit using nor gates

Abstract: M780 ecl eor
Text: January 1990 Edition 1.0 ^ = = ^ = = ^ ^ = = = = = = DATA SHEET FUJITSU E30000VH ECL , 350 ps/gate typical at 1.11 mW3 DESCRIPTION · I/O Options - 10KH ECL - 100K ECL · ECL Output , workstations, telecommunications, and instrumentation. VH series ECL arrays are designed using Fujitsu , FUJITSU LIMITED AND FUJITSU MICROELECTRONICS, INC. Í E30000VH ECL Gate Array Fujitsu , Fujitsu Microelectronics, Inc. E30000VH ECL Gate Array ECL DC CHARACTERISTICS (10KH Level


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PDF E30000VH 441-pin E-30000VH LD10L LD10H full adder circuit using nor gates M780 ecl eor
schematic diagram of AM1850S

Abstract: HALF ADDER motorola mca ECL IC NAND
Text: Ami 850 Mixed ECL /TTL I/O Mask-Programmable Gate Array PRELIMINARY > DISTINCTIVE CHARACTERISTICS Up to 1800 equivalent gates - 72 internal cells - Up to 80 l/O s High-performance, low-power ECL , capability of mixed mode ECL /TTL I/O operation makes it especially useful in systems requiring ECL speeds , internal ECL macrocells provide a worst case gate delay of 1.2 ns. External logic levels can be selected to be TTL, Positive or Pseudo ECL (PECL, i.e., ECL referenced to a + 5-volt supply), or True ECL (TECL).


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PDF Am1850 7429A CA2068 Q00000QD0 schematic diagram of AM1850S HALF ADDER motorola mca ECL IC NAND
VIPER IC

Abstract: viper 17 L viper gate control circuits OAI221 VIPer Design Software internal structure of ic 741 on222 transistor ic 741 comparator signal generator OA4444 VIPER
Text: H-GaAs III Enhancement/ Depletion MESFET Process · ECL , PECL, TTL, or Mixed Inputs/Outputs Array , SE M IC O N D U C TO R C O RPO RATIO N VITESSE Data Sheet High Performance, Low Cost Viper , ASIC products, the Viper arrays are compatible with industry-standard TTL, ECL , and pseudo-ECL (PECL , 93012 · 805/388-3700 · FAX: 805/987-5896 G52057-0, Rev. 4.0 6/5/97 15DS331 3111 430 SEM IC O N , ·=1502331 0003112 377 SE M IC O N D U C TO R C O RPO RATIO N High Performance, Low Cost Viper Family


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PDF VGLC15K G52057-0, VIPER IC viper 17 L viper gate control circuits OAI221 VIPer Design Software internal structure of ic 741 on222 transistor ic 741 comparator signal generator OA4444 VIPER
DNR2

Abstract: half adder circuit using 2*1 multiplexer TTL nand gate twin ER22T RA23 ECL IC NAND
Text: Input Buffer Delay » Packaging Solutions -260-pin C eram ic Flat Package -2 08 -Pin C eram ic Pin Grid , Solutions -441 Pin C eram ic Pin Grid Array -Pre-attached Heat Sinks -T A B Processing 200 Maximum E C L , 8.38 4.12 415 670 430 Loading: F/O = 3 ,1= 3 mm metal, typical values shown ECL I/O H-Series , CHARACTERISTICS A BSO LU TE MAXIMUM RATINGS Rating TTL* Supply Voltage EG L TTL* ECL Output Voltage Output , RECOMMENDED OPERATING CONDITIONS Parameter TTL* Supply Voltage ECL Terminating Voltage Terminating Resistor


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PDF G14Li32 ET10000H, E10000H applicat000000000000 ET10000H E10000H 37MT7b2 260-PIN DNR2 half adder circuit using 2*1 multiplexer TTL nand gate twin ER22T RA23 ECL IC NAND
2003 - ECL IC NAND

Abstract: No abstract text available
Text: MC10E104, MC100E104 5V ECL Quint 2-Input AND/ NAND Gate The MC10E/100E104 is a quint 2-input AND/ NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q , , VCCO VEE NC ECL Data Inputs ECL AND Outputs ECL NAND Outputs ECL OR Output ECL NOR Output Positive , IC Latchup Test Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003 , Termination for Output Driver and Device Evaluation (See Application Note AND8020 - Termination of ECL Logic


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PDF MC10E104, MC100E104 MC10E/100E104 MC10E104FN PLCC-28 AND8020 AN1404 AN1405 AN1406 AN1503 ECL IC NAND
2011 - 2N6284 inverter schematic diagram

Abstract: NTD18N06 MKP9V160 sine wave inverter tl494 circuit diagram ECL IC NAND adp3121 DARLINGTON TRANSISTOR ARRAY ezairo MC74HC4538 TIP142 6403 F
Text: No file text available


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PDF SG388/D 2N6284 inverter schematic diagram NTD18N06 MKP9V160 sine wave inverter tl494 circuit diagram ECL IC NAND adp3121 DARLINGTON TRANSISTOR ARRAY ezairo MC74HC4538 TIP142 6403 F
2000 - KVL05

Abstract: ECL IC NAND EL05
Text: MC100LVEL05 3.3V ECL 2-Input Differential AND/ NAND The MC100LVEL05 is a 2-input differential AND/ NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3 V , supplies. Because a negative 2-input NAND is equivalent to a 2-input OR function, the differential inputs , /JESD78 IC Latchup Test · Moisture Sensitivity Level 1 · · For Additional Information, see Application , , D0; D1, D1 Q, Q VCC VEE FUNCTION ECL Data Inputs ECL Data Outputs Positive Supply Negative Supply


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PDF MC100LVEL05 MC100EL05 LVEL05 AND8020 AN1404 AN1405 AN1406 AN1503 KVL05 ECL IC NAND EL05
SH100E

Abstract: siemens SH100E elxr siemens Nand gate SH100E5 TRANSISTOR K 2191
Text: 7 1 9 9 1 SIEMENS ASIC Product Description SH100E ECL /CML Gale Amy Family FEATURES , flip-flop, 1.7 GHz differential Both ECL and CML macro families TTL I/O available ECL 10KH/100K , , Mentor, and Valid workstation support CML and ECL is speed/power programmable Figure 1. Array Architecture PRODUCT DESCRIPTION Siem ens utilizes a third generation bipolar ECL process to produce a fam , allowing the design engineer to mix ECL and CML macros on the same chip. This feature allows the designer


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PDF SH100E 10KH/100K M33S001 SH100E siemens SH100E elxr siemens Nand gate SH100E5 TRANSISTOR K 2191
1996 - laptop inverter board schematic toshiba

Abstract: toshiba laptop inverter board schematic verilog code for jk flip flop ATMEL optic mouse sensor hp laptop inverter board schematic ECL IC NAND XC100SX1451FI100 8k x 8 sram design using flip flops DIGITAL CLOCK USING 74XX IC MC88100
Text: IC Division MC-release ADVANCED ECL PRODUCTS THE FASTEST LOGIC AVAILABLE TODAY ECL Logic is , Lite Translators LION Autumn / `96 Logic IC Division Logic IC Division ECLinPS - ECL in , 100ELT version only Logic IC Division Logic IC Division Low Voltage ECL - Fully Compatible to 5V , System Design Handbook The ECL Translator Guide Autumn / `96 Logic IC Division Logic IC Division , LOW VOLTAGE BICMOS ECL LION Autumn / `96 Sampling MC-Release Logic IC Division


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PDF 28-Lead MCCS142237 20-Pin 16-Pin PB0895-02 AN1408 MCCS142233 MCCS142235 MC34268 MCCS142236 laptop inverter board schematic toshiba toshiba laptop inverter board schematic verilog code for jk flip flop ATMEL optic mouse sensor hp laptop inverter board schematic ECL IC NAND XC100SX1451FI100 8k x 8 sram design using flip flops DIGITAL CLOCK USING 74XX IC MC88100
ECL IC NAND

Abstract: CXB1101Q 3 input nand gate 16 pin ic logic gate diagram of ic quad nand gate 16 pin ic
Text: SONY CXB1101Q Quad 3 - Input AND/ NAND Gate Preliminary Description CXB1101Q is an ultra high speed bipolar monolithic IC , which contains four 3-input AND/ NAND gates. I/O levels are ECL 100K compatible. This IC can be suitably applied to Ultra high speed digital signal processing systems, which can , High-speed bipolar process. tpd = 490 ps (Typ.) • I/O levels and supply voltage are ECL 100K compatible , • 3-lnput AND/ NAND Logic Package Outline 24 pin FQFP IB 13 Unit: mm 04 0 5 0.12 7 FQFP


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PDF CXB1101Q CXB1101Q FQFP-24P-01 ECL IC NAND 3 input nand gate 16 pin ic logic gate diagram of ic quad nand gate 16 pin ic
2005 - 3-bit magnitude comparator

Abstract: 3.3v to 5v buffer latch ECL binary Counter MC100E175 MC100E150 MC100EL35
Text: Gates Function Quad 4-Input OR/NOR Gate, 5V ECL Quad 4-Input OR/NOR Gate, 5V ECL 4-Input OR/NOR, 3.3V ECL 2-Input AND/ NAND , 5V ECL 2-Input Differential AND/ NAND , 5V ECL 2-Input Differential AND/ NAND , 3.3V ECL 2-Input XOR/XNOR, 5V ECL Quint 2-Input AND/ NAND Gate, 5V ECL Quad Differential AND/ NAND , 5V ECL , 518 Clock/Data Buffers Function 1:2 Differential Fanout Buffer, 5V ECL 1:2 Differential Fanout Buffer, 3.3V ECL Low Impedance Driver, 5V ECL Low Impedance Driver, 3.3V ECL Dual 1:3 Fanout Buffer, 5V


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PDF MC10E101, MC100E101 MC10EL01, MC100EL01 MC100LVEL01 MC10EL04, MC100EL04 MC10EL05, MC100EL05 MC100LVEL05 3-bit magnitude comparator 3.3v to 5v buffer latch ECL binary Counter MC100E175 MC100E150 MC100EL35
ECL IC NAND

Abstract: No abstract text available
Text: . ESD protection of 2000V. The SY10E/100E/101E104 is a quint 2-input AND/ NAND gate designed for use in new, high performance ECL systems. The E104 also features a function_output F which is the OR of , 100K ECL signal levels at both -4.5V (100K) and -5.2V (101K) supply levels and features on-chip , p | PIN NAMES FUNCTION PINS D()a-D4b Data Inputs Q0-Q4 AND Outputs Q0-Q4 NAND , ) + P i a * D i b) + (^2a * ^2b) + ( D ^ • D3b) + (D ^ • D4b) DC ELEC TR IC A L C H A R A C TE


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PDF SyX00E104 SY10E/100E/101E104 SY100E104: SY101E104: SY100/101E104 ECL IC NAND
ECL IC NAND

Abstract: No abstract text available
Text: CXB1101Q SO N Y Quad 3 - Input AND/ NAND Gate Description Preliminary Package Outline CXB1101Q is an ultra high speed bipolar monolithic IC , which contains four 3-input AND/ NAND gates. I/O levels are ECL 100K compatible. This IC can be suitably applied to Ultra high speed digital signal , -24P-01 Function • 3-Input AND/ NAND Logic Structure Bipolar silicon monolithic IC Applications â , , tpd = 490 ps (Typ.) • I/O levels and supply voltage are ECL 100K compatible. • Output pins are


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PDF CXB1101Q CXB1101Q FQFP-24P-01 ECL IC NAND
K157UD2

Abstract: K157DA1 CD4026E K176IE12 K190KT2P NE545B K594PA1 K561LN2 KR1531LA3 K500LP216
Text: . Schmitt. NAND 1k x 4bit. EEPROM (funkcní analog) 16k EEPROM 64k EEPROM 64k EEPROM obvod ady ECL , NAND 8vstup. NAND 3x 3vstup. NAND 6x invertor 2x AND-OR-INVERT rozsíit. AND-OR-INVERT 4vstup , . registr 4bit. registr D, TS 8vstup. multiplexer 2x 4vstup. NAND , OC 3x 3vstup. NAND , OC 4x 2vstup. NAND , OC (15 V) 2x univers. budic sbrnice 8vstup. expander OR 2x 4vstup. NOR 2x 4vstup. NOR 3x , . NAND 6x Schmitt. invertor 4x klopný obvod D 2x klopný obvod JK 2kanál. amplitud. detektor 2kanál


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PDF K118UD1B KR119UN1 K131LA1 K131LA2 K131LA4 K131LN1 K131LR1 K131LR3 K131LR4 K131TM2 K157UD2 K157DA1 CD4026E K176IE12 K190KT2P NE545B K594PA1 K561LN2 KR1531LA3 K500LP216
AC050

Abstract: NEC C141 c141 nec st c049 PB6310 123Ln AC044 ga01 AC041 C102 M 346
Text: Description The uPB6300 (100K) series consists of three ultrahigh-speed ECL gate arrays, com patible with an , 70 Low-level, series-gated ECL with wired logic Featu res .- 1 , H ig h speed: 0.5 , (input) I/O (input/output) Power supply Assembly method Number of macros Circuit form 1200 ECL , /output) 2000 ECL -100K -4.5 V +0.5 V Oto +70 °C Ö.7 ns/1.9 mW 0.6 ns/1.9 mW 1.0 ns/22.5 mW 6.0 W 10.7 W , Number of macros 132 PGA 68LCC 60 48 24 24 28 16 Wire bonding 70 Low-ievei, series-gated ECL with


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PDF 000fi233 T-42-11-13 uPB6300 ECL100K /PB6301, //PB6310, //PB6320 83-0009MA 132-Pin 3-000743A AC050 NEC C141 c141 nec st c049 PB6310 123Ln AC044 ga01 AC041 C102 M 346
HP83000

Abstract: Electro SEX X81D1 HP8300 X41D ECL IC NAND
Text: MESFET technologies · Channelless sea-of-gates architecture · 0.5 micron effective gate length · TTL, ECL , cell can be configured into NOR, NAND , or AND-OR-INVERT functions · 40 pS delay @ 0.15 mW for 3 , power supplies - ECL-only: -2 V; mixed ECL /TTL or TTL-only: +3.3 V & -2 V; PECL-only: +5 V and +3 V , digital IC performance in an industry-standard ASIC platform. The Cyclone Series' sea-of-gates , capabilities of CMOS or that cannot handle the high power dissipation of ECL or BiCMOS are ideal for Cyclone


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PDF
1500w audio amplifier circuit

Abstract: Schottky Diode 80V 6A 1500w PWM 220v C106MG marking code SS SOT23 tl494cn inverter datasheet smps 1500W MMSZ5231BT1G dc 220v motor speed control circuit with scr NCP1200P60G
Text: No file text available


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PDF SGD501/D 74VCX16373DT 74VCX16373DTR 74VCX16374DT 16BIT 74VCX16374DTR 80SQ045N 80SQ045NRL 1500w audio amplifier circuit Schottky Diode 80V 6A 1500w PWM 220v C106MG marking code SS SOT23 tl494cn inverter datasheet smps 1500W MMSZ5231BT1G dc 220v motor speed control circuit with scr NCP1200P60G
2002 - marking CODE D2B

Abstract: MC100E104 MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 marking D3B ECL IC NAND
Text: operation. PIN DESCRIPTION PIN FUNCTION D0a ­ D4b ECL Data Inputs Q0 ­ Q4 ECL AND Outputs Q0 ­ Q4 ECL NAND Outputs F ECL OR Output F ECL NOR Output VCC, VCCO Positive , MC10E104, MC100E104 5VECL Quint 2Input AND/ NAND Gate The MC10E/100E104 is a quint 2-input AND/ NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q , · · ESD Protection: > 2 KV HBM, > 200 V MM · Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup


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PDF MC10E104, MC100E104 MC10E/100E104 MC10E104FN EIA/JESD78 r14525 MC10E104/D marking CODE D2B MC100E104 MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 marking D3B ECL IC NAND
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