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DS2187 Maxim Integrated Products PCM Transceiver, 1-Func, CMOS, PDIP18, 0.300 INCH, DIP-18

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DS2187 Maxim Integrated Products Rochester Electronics 1,149 $23.44 $19.04
DS2187+ Maxim Integrated Products Rochester Electronics 24 $17.96 $14.59
DS2187+ Maxim Integrated Products Chip One Exchange - -
DS2187S Maxim Integrated Products Rochester Electronics 28 $25.79 $20.96
DS2187S Maxim Integrated Products ComS.I.T. - -
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DS2187S+ Maxim Integrated Products Rochester Electronics 5,604 $20.40 $16.57
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DS2187 datasheet (6)

Part Manufacturer Description Type PDF
DS2187 Dallas Semiconductor Receive Line Interface Original PDF
DS2187 Maxim Integrated Products Receive Line Interface Original PDF
DS2187+ Maxim Integrated Products Receive Line Interface. Lead-free Original PDF
DS2187S Maxim Integrated Products Receive Line Interface Original PDF
DS2187S+ Maxim Integrated Products Receive Line Interface. Lead-free Original PDF
DS2187S/T&R Maxim Integrated Products Receive Line Interface Original PDF

DS2187 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
Not Available

Abstract:
Text: MM l _ l t _ l L_J L J M IN 0 .015 0 .3 8 0.021 0 .5 3 DS2187 DS2187S RECEIVE , DS2187 DALLAS SEMICONDUCTOR DS2187 Receive Line Interface FEATURES PIN ASSIGNMENT , ] ] ] ] : ] ] ] DVDD RCL A IS BPV NC RPO S RNEG RCLK DV S S 18-Pin D IP (300 Mil) DESCRIPTION The DS2187 , . 187 DS2187 DS2187 BLOCK DIAGRAM Figure 1 clock from the incoming AMI signal. T1 applications , jittered line signal. This technique affords exceptional jitter tracking which en­ ables the DS2187 to


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PDF DS2187 DS2187S 20-PIN
Not Available

Abstract:
Text: MM 0.38 0.53 r Powered by ICminer.com Electronic-Library Service CopyRight 2003 DS2187 DS2187S , DS2187 DALLAS SEMICONDUCTOR DS2187 Receive Line Interface FEATURES • Line interface forT1 (1.544 , DVDD RCL AIS BPV NC RPOS RNEG RCLK DVSS 18-Pln DIP (300 Mil) DESCRIPTION The DS2187T1 /CEPT Receive Line , CopyRight 2003 DS2187 DS2187 BLOCK DIAGRAM Figure 1 LOCK RCLK LINE INPUT Input signais are coupled to the DS2187 via a 1:2 center-tapped transformer as shown in Figure 2. For T1 applications, R1 and R2 must be


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PDF DS2187 DS2180AT1/ISDN DS2181A DS2141AT1 DS2143 DS2186 DS2188 DS2187S
Not Available

Abstract:
Text: DS2187 / DS2187S DS2187 DALLAS SEMICONDUCTOR FEATURES RECEIVE LINE INTERFACE PIN , / DS2187S DS2187 BLOCK DIAGRAM Figure 1 LINE INPUT Input signals are coupled to the DS2187 via a 1:2 , outputs. 032190 2/11 DS2187 / DS2187S PIN DESCRIPTION Table 1 TYPE DESCRIPTION PIN SYMBOL , . 032190 5/11 224 DS2187 / DS2187S ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground , RRING. 2. Outputs open. 3. 0.0V < V|N < V 0D 4. All outputs. 032190 6/11 225 DS2187 / DS2187S


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PDF DS2187/DS2187S DS2187 20-PIN 0S2187 DS2187S
1998 - 18-PIN

Abstract:
Text: A IN. MM B MIN 0.015 0.38 0.021 0.53 DS2187 DS2187S RECEIVE LINE INTERFACE 20 , DS2187 DS2187 Receive Line Interface FEATURES PIN ASSIGNMENT · Line interface for T1 , 10 DVSS 18-Pin DIP (300 Mil) DESCRIPTION The DS2187 T1/CEPT Receive Line Interface Chip , interfaces such as DMI and CPI. 022798 1/9 DS2187 DS2187 BLOCK DIAGRAM Figure 1 RCLKSEL DATA , LINE INPUT Input signals are coupled to the DS2187 via a 1:2 center­tapped transformer as shown in


Original
PDF DS2187 20-Pin DS2187S 20-PIN 18-PIN DS2141A DS2143 DS2180A DS2181A DS2186 DS2187 DS2188 DS5000
Not Available

Abstract:
Text: 0.015 0.38 0.021 0.53 DS2187 DS2187S RECEIVE LINE INTERFACE 20-PIN SOIC K -H G K PKG , DALLAS SEMICONDUCTOR DS2187 Receive Line Interface E PIN ASSIGNMENT FEATURES â , electronics. The DS2187 T1/CEPT Receive Line Interface Chip in­ terfaces user equipment to North American , interfaces such as DMI and CPI. 052892 1/9 123 DS2187 DS2187 BLOCK DIAGRAM Figure 1 LINE , exceptional jitter tracking which en­ ables the DS2187 to meet the latest AT&T TR 62411 and ECSA jitter


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PDF DS2187 20-Pin DS2187S 20-PIN
2001 - 18-PIN

Abstract:
Text: DS2187 Receive Line Interface www.dalsemi.com FEATURES PIN ASSIGNMENT Line interface for , DVSS 18-Pin DIP (300-mil) DESCRIPTION The DS2187 T1/CEPT Receive Line Interface chip interfaces , interfaces such as DMI and CPI. 1 of 10 062101 DS2187 DS2187 BLOCK DIAGRAM Figure 1 LINE INPUT Input signals are coupled to the DS2187 via a 1:2 center-tapped transformer as shown in Figure 2 , DS2187 utilizes both frequency locked (FLL) and digital phase locked (DPLL) loops to recover data and


Original
PDF DS2187 DS2180A DS2181A DS2141A DS2143 DS2186 DS2188 DS2187S 20-PIN 18-PIN DS2187 DS2188
Not Available

Abstract:
Text: DS2187 DS2187S RECEIVE LINE INTERFACE 20-PIN SOIC I * . - * |G I* . 20-PIN PKG DIM 0.511 , DALLAS SEMICONDUCTOR DS2187 Receive Line Interface FEATURES PIN ASSIGNMENT • Line , DVSS ] RE NG 18-Pin DIP (300 Mil) DESCRIPTION The DS2187 T1/CEPT Receive Line Interface , ” GbT DS2187 DS2187 BLOCK DIAGRAM Figure 1 clock from the incoming AMI signal. T1 applications , jittered line signal. This technique affords exceptional jitter tracking which en­ ables the DS2187 to


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PDF DS2187 20-Pin DS2187S 20-PIN 2bl4130 001224b
1995 - 1 microfarad capacitor

Abstract:
Text: A IN. MM B MIN 0.015 0.38 0.021 0.53 DS2187 DS2187S RECEIVE LINE INTERFACE 20 , DS2187 DS2187 Receive Line Interface FEATURES PIN ASSIGNMENT · Line interface for T1 , 10 DVSS 18-Pin DIP (300 Mil) DESCRIPTION The DS2187 T1/CEPT Receive Line Interface Chip , interfaces such as DMI and CPI. 041295 1/9 DS2187 DS2187 BLOCK DIAGRAM Figure 1 RCLKSEL DATA , LINE INPUT Input signals are coupled to the DS2187 via a 1:2 center­tapped transformer as shown in


Original
PDF DS2187 20-Pin DS2187S 20-PIN 1 microfarad capacitor DS2188 DS2187 DS2186 DS2181A DS2180A DS2143 DS2141A 18-PIN DS5000
DS2180A

Abstract:
Text: from the T1 or CEPT line by the DS2187. 18 Vdd - - Positive Supply. Connect to 5.0 volts. 19 Vss - - , MHz clock that is recovered from the incoming data stream at RTIP and RRING by the DS2187. Fed to all , DS2175 DS2180A DS2181A XFMR DS2186 DS2187 A o DESCRIPTION The DS2280 and DS2281 are T1 and CEPT , CEPT 120 ohm lines. The line interface function is performed by the DS2187 and DS2186. The monitoring , contains four of Dallas Semiconductor's T1 integrated circuits: the DS2187 Receive Line Interface, the


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PDF DS2280/DS2281 DS2280 DS2281-075 DS2281-120 DS2281 DS2175 DS2180A DS2181A 2BL4 DS2187 DS2186 DS2181A DS2175 DS2281-120
1999 - Not Available

Abstract:
Text: DS2187 Receive Line Interface www.dalsemi.com FEATURES PIN ASSIGNMENT Line interface for , DVSS 18-Pin DIP (300-mil) DESCRIPTION The DS2187 T1/CEPT Receive Line Interface chip interfaces , interfaces such as DMI and CPI. 1 of 10 112099 DS2187 DS2187 BLOCK DIAGRAM Figure 1 LINE INPUT Input signals are coupled to the DS2187 via a 1:2 center-tapped transformer as shown in Figure 2 , DS2187 utilizes both frequency locked (FLL) and digital phase locked (DPLL) loops to recover data and


Original
PDF DS2187 DS2180A DS2181A DS2141A DS2143 DS2186 DS2188 DS1287S 20-PIN
DS2143

Abstract:
Text: This Material Copyrighted By Its Respective Manufacturer DS2187 DS2187S RECEIVE LINE INTERFACE 20 ,  DS2187 DALLAS SEMICONDUCTOR DS2187 Receive Line Interface FEATURES • Line interface , ) DESCRIPTION The DS2187T1 /CEPT Receive Line Interface Chip interfaces user equipment to North American (T1 , This Material Copyrighted By Its Respective Manufacturer DS2187 DS2187 BLOCK DIAGRAM Figure 1 LOCK RCLK LINE INPUT Input signals are coupled to the DS2187 via a 1:2 center-tapped transformer as shown


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PDF DS2187 DS2180AT1/ISDN DS2181A DS2141AT1 DS2143 DS2186 DS2188 DS2187S DS2187 DS5000
68-PIN

Abstract:
Text: for low power consumption • Operates off a single +5V supply PIN ASSIGNMENT J~ o 68 DS2187 , directly to T1 DSX-1 twisted pair lines. The line interface function is performed by the DS2187 Receive , contains five of Dallas Semiconductor's T1 integrated circuits; the DS2187 Receive Line Interface, the , their individual data sheets. On the line card Stiks, the DS2187 connects to the receive T1 DSX-1 pair , -ohm resistors (R1 and R2). The DS2187 recovers clock and data from the T1 line. The recovered clock and data is


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PDF DS2283 DS2187 DS2186 DS2188 DS2283 DS2187, DS2186, DS2180A, DS2188, DS2176. 68-PIN DS2176 DS2180A DS2186 DS2187 DS2188
68-PIN

Abstract:
Text: low power consumption • Operates off a single +5V supply PIN ASSIGNMENT o DS2187 DS2186 XFMR , either CEPT 2.048Mbps 75 or 120 ohm lines. The line interface function is performed by the DS2187 and , The DS2284 contains five of Dallas Semiconductor's CEPT (E1) integrated circuits: the DS2187 Receive , devices can be found in their individual data sheets. On the DS2284, the DS2187 connects to the receive , and 8 should be left open circuited. The DS2187 recovers clock and data from the CEPT line. The


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PDF DS2284 DS2283 DS2187 DS2186 DS2188 DS2284 DS2187, DS2186, DS2181 68-PIN DS2188 DS2187 DS2186 DS2181A DS2175 rmsa
Not Available

Abstract:
Text: DS2187 DS2187S RECEIVE LINE INTERFACE 20-PIN SOIC K -H h- G hPKG 2 0 -PIN DIM MAX A , ) primary rate networks DS2187 Receive Line Interface PIN ASSIGNMENT w ZC S E N QE QE QE , interfaces such as DMI and CPI. DS2187 DS2187 BLOCK DIAGRAM Figure 1 LINE INPUT clock from the incoming AMI signal. T1 applications uti­ Input signals are coupled to the DS2187 via a 1:2 cen , ables the DS2187 to meet the latest AT&T TR 62411 and ECSA jitte r specifications. A 24.576 MHz clock d


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PDF DS2187 DS2187S 20-PIN
pub 43801

Abstract:
Text: DS2187 /0S2187S FULL DATA SHEET AVAILABLE - CALL 214-450-3836 SEMICONDUCTOR DALLAS FEATURES · Line interface for T1 (1.544 MHz) and CEPT (2.048 MHz) primary rate networks · Extracts clock and data from twisted pair or coax · Meets requirements of PUB 43801, PUB 62411, and applicable CCITT G.823 · Precision on-chip PLL eliminates external crystal or LC tank - no tuning required DS2187 T1/C , DS2187 18-Pin DIP DESCRIPTION The DS2187 T1/CEPT Receive Line Interface Chip interfaces user


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PDF DS2187/0S2187S DS2187 30RCLK DS2187 18-Pin pub 43801 S12R
Not Available

Abstract:
Text: – Available in 16-pin DIP and 16-pin SOIC (DS2188S) ■Companion to the DS2186 Transmit Line and DS2187 , Tl/ISDN Primary Rate Transceiver and DS2181A CEPT Transceiver and is the companion to the DS2187 Tl , through 5. Figure 3 illustrates how to use the DS2188 in the receive path along with a DS2187 Receive , 100K DS2188 DS2188 IN THE RECEIVE PATH Figure 3 DS2188 DS2187 RTIP RCLK RRCLK RPOS


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PDF DS2188 TR62411, TR-TSY-000170, 16-pin DS2188S) DS2186 DS2187 DS1288S
cept lpd d

Abstract:
Text: (DS2188S) • Companion to the DS2186 Transmit Line and DS2187 Receive Line Interfaces DESCRIPTION , to the DS2187 T 1/CEPT Receive Line Interface and DS2186 T1/CEPT Transmit Line Interface. It can , . Figure 3 illustrates how to use the DS2188 in the receive path along with a DS2187 Re­ ceive Line , DS21S6 DS2188 IN THE RECEIVE PATH Figure 3 DS2187 DS2188 DS2188 IN THE TRANSMIT PATH Figure 4


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PDF DS2188 TR62411, TR-TSY-000170, 16-PIN CMO95 l4130 001225b DS2188S cept lpd d
Not Available

Abstract:
Text: DS2186 DS2187 General DS2290 DS2291 DS2290 DS2141A DS2151Q DS2141A DS2141A DS2151Q DS2141A DS2151Q , DS2143 DS2151Q DS2153Q DS2141A DS2143 DS2180A DS2181A DS2182 DS2180A DS2182 DS2187 DS2181A DS2181A DS2175 , DS2186 DS2187 DS2153Q DS2141A DS2290 DS2291 Title Mapping T1 Into E1 According to G.802 Number of


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PDF DS2165 DS2130 DS2132A DS2186 DS2187 DS2290 DS2291
AM2001

Abstract:
Text: -52 FE8026-52 S2 Dallas DS2185 DS2186 DS2187 FE8006-195 FE8006-225 N/A FE8006-55 S2 Dallas DS2186 DS2187 FE8026-63 FE8026-63 S2 Dallas DS2186 DS2187 FE8026-62 FE8026-62 S2 Dallas DS2186 DS2187 FE8026-53 FE8026-53 FE8026-93 S2 Dallas DS2186 DS2187 FE8026-52 FE8026-52 S2 Exar 56L22 56L85 C240 260 262


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PDF FE8008-05 PEB2091 FE8008-01 FE8008-01RF FE8008-09 PEB2090 FE8008-03 PEB2095 PEB20950 AM2001 ST5411 FE8006-65 motorola t5620 FE8006-125 mv1441exp FE8001-15 FE8006-45 FE8001-35 FE8006-135
pub 43801

Abstract:
Text: DS2187 DALLAS SEMICONDUCTOR FEATURES · Line interface for T1 (1.544 MHz) and CEPT (2.048 MHz) primary rate networks · Extracts clock and data from twisted pair or coax · Meets requirements of PUB 43801, TR 62411, and applicable CCITT G.823 · Precision on-chip PLL eliminates external crystal or LC , supply; low-power CMOS technology DS2187 Receive Line Interface PIN ASSIGNMENT AVDD RÀÎS ZCSEN NC , DS2187T1 /CEPT Receive Line Interface Chip in terfaces user equipment to North American (T1 1.544 MHz) and


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PDF DS2187 DS2180A DS2181A DS2141AT1 DS2143 DS2186 DS2188 18-Pin DS2187T1/CEPT pub 43801
Not Available

Abstract:
Text: DS2187 Receive Line Interfaces DS2188 T1/CEPT Jitter Attenuator PIN ASSIGNMENT D JA C RPOS C BNEG , Transceiver and it is the compan ion to the DS2187 T1/CEPT Receive Line Interface and DS2186 T1/CEPT Transmit


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PDF DS2188 TR62411, TR-TSY-000170, 16-pin DS2188S) DS2186 DS2187 TR-TSY-000170
1998 - DS2141A

Abstract:
Text: Available in 16­pin DIP and 16­pin SOIC (DS2188S) · Companion to the DS2186 Transmit Line and DS2187 , Transceiver and DS2181A CEPT Transceiver and it is the companion to the DS2187 T1/CEPT Receive Line Interface , receive path along with a DS2187 Receive Line Interface. Figure 4 illustrates how to use the DS2188 in , DS2188 DS2188 IN THE RECEIVE PATH Figure 3 DS2187 RTIP DS2188 RCLK RCLK RRCLK RPOS


Original
PDF DS2188 TR62411, DS2188S DS2141A DS2180A DS2181A DS2186 DS2187 DS2188 DS2190 TR62411
1997 - HW 2596

Abstract:
Text: framer DS2180/DS2181 and DS2186 and DS2187. The following paragraphs will describe each one of the , (Transmitter) and DS2187 (Receiver) 13 M860SAR-PHY User's Manual GENERAL INFORMATION 1·3 , User Manual. · IDT77105 Device User Manual. · DALLAS: DS2180AQ, DS2181AQ, DS2186, DS2187 Devices User , DS2187 and L1RSYNC from DS2180/DS2181 by connecting J6 and J7 pins 1,2 and setting CRTB bit in the SIMOD , optional connection. FIGURE 2-6 L1TCLK and L1TSYNC Configuration DS2187 860SAR RCLK CRTB bit


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PDF M860SAR-PHY MPC860SAR-PHY ATM155, ATM25 860SAR MPC860ADS/MPC8xxFADS HW 2596 smd u2.8 dallas 2501 SMD 2596 PM5346 MPC860SAR IDT77155 IDT77105 2C551
1995 - 1k transmit buffer

Abstract:
Text: Available in 16­pin DIP and 16­pin SOIC (DS2188S) · Companion to the DS2186 Transmit Line and DS2187 , Transceiver and DS2181A CEPT Transceiver and it is the companion to the DS2187 T1/CEPT Receive Line Interface , path along with a DS2187 Receive Line Interface. Figure 4 illustrates how to use the DS2188 in the , DS2188 DS2188 IN THE RECEIVE PATH Figure 3 DS2187 RTIP DS2188 RCLK RCLK RRCLK RPOS


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PDF DS2188 TR62411, DS2188S 1k transmit buffer DS2190 DS2188 DS2187 DS2186 DS2181A DS2180A DS2141A TR62411
1997 - HW 2596

Abstract:
Text: framer DS2180/DS2181 and DS2186 and DS2187. The following paragraphs will describe each one of the , (Transmitter) and DS2187 (Receiver) 13 M860SAR-PHY User's Manual GENERAL INFORMATION 1·3 , User Manual. · IDT77105 Device User Manual. · DALLAS: DS2180AQ, DS2181AQ, DS2186, DS2187 Devices User , DS2187 and L1RSYNC from DS2180/DS2181 by connecting J6 and J7 pins 1,2 and setting CRTB bit in the SIMOD , optional connection. FIGURE 2-6 L1TCLK and L1TSYNC Configuration DS2187 860SAR RCLK CRTB bit


Original
PDF M860SAR-PHY MPC860SAR-PHY ATM155, ATM25 860SAR MPC860ADS/MPC8xxFADS HW 2596 DALLAS 2501 smd u2.8 smd LD9 smd diode code u6 PM5346 MPC860SAR IDT77155 IDT77105
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