DM54LS112 |
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Unknown
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TTL Data Book 1980 |
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Scan |
PDF
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DM54LS112A |
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National Semiconductor
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Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear and Complementary OP |
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Original |
PDF
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DM54LS112AJ |
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Fairchild Semiconductor
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Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
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Scan |
PDF
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DM54LS112AJ |
|
National Semiconductor
|
DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET CLEAR and COMPLEMENTARY OUTPUTS |
|
Scan |
PDF
|
DM54LS112AJ |
|
National Semiconductor
|
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
|
Scan |
PDF
|
DM54LS112AW |
|
Fairchild Semiconductor
|
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
|
Scan |
PDF
|
DM54LS112AW |
|
National Semiconductor
|
DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET CLEAR and COMPLEMENTARY OUTPUTS |
|
Scan |
PDF
|
DM54LS112AW |
|
National Semiconductor
|
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs |
|
Scan |
PDF
|