The Datasheet Archive

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Part ECAD Model Manufacturer Description Datasheet Download Buy Part
BD9V101MUF-LB BD9V101MUF-LB ECAD Model ROHM Semiconductor 16V to 60V, 1A 1ch 2.1MHz Synchronous Buck Converter Integrated FET (Industrial Grade)
BD9G102G-LB BD9G102G-LB ECAD Model ROHM Semiconductor 6V to 42V, 0.5A 1ch Simple Buck Converter Integrated FET (Industrial Grade)
BD9G341AEFJ BD9G341AEFJ ECAD Model ROHM Semiconductor 12V to 76V, Buck switching regulator with integrated 150mΩ power MOSFET
BD9A600MUV BD9A600MUV ECAD Model ROHM Semiconductor 2.7V to 5.5V Input, 6A Integrated MOSFET, Single Synchronous Buck DC/DC Converter
BD9G341AEFJ-LB BD9G341AEFJ-LB ECAD Model ROHM Semiconductor 12V to 76V, Buck switching regulator with integrated 150mΩ power MOSFET (Industrial Grade)
BD9C601EFJ BD9C601EFJ ECAD Model ROHM Semiconductor 4.5V to 18V Input, 6.0A Integrated MOSFET 1ch Synchronous Buck DC/DC Converter

DG1 smd transistor Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2007 - ATA6823

Abstract: ll4248 ATA6823-DK2 smd diode r5a dc shunt motor h-bridge pwm schematics circuit RESET Push Button of SMD 1N4148 GF1G BC817-40
Text: 1 2 3 4 5 6 VCC GND /RESET WD TX DIR PWM EN1 RX DG3 DG2 DG1 AD0 PGND VCC , SUM110N06-05L 10 nF C21 Q4 SUM110N06-05L PGND.MOTOR PBAT.MOTOR Figure 2-2. DG1 , 10 DG3 Out Diagnostic output 3 11 DG2 Out Diagnostic output 2 12 DG1 , jumper RWD to position 1-2. Either SMD (R5A) or wired (R5B) resistors may be used. 9 4961A , Wake-up Source Recognition Diagnostic pin DG1 has a double assignment: Until the first watch dog pulse


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PDF ATA6823 ll4248 ATA6823-DK2 smd diode r5a dc shunt motor h-bridge pwm schematics circuit RESET Push Button of SMD 1N4148 GF1G BC817-40
2011 - smd R5A

Abstract: ATA6823-DK2 smd diode r5a ll4248 Atmel atmega88 ATA6823 DIODE DG3 dc shunt motor 1N4148 BAS16
Text: DIR PWM EN1 RX DG3 DG2 DG1 AD0 PGND VCC GND LIN VBAT VBATSW EN2 PGND 10 nF 2.2 , -05L PGND.MOTOR PBAT.MOTOR Figure 2-2. DG1 VSUP Atmel ATA6823 Atmel® ATA6823 Application Board , DG2 Out Diagnostic output 2 12 DG1 Out Diagnostic output 1 13 AD0 Out , via resistor R5, by setting jumper RWD to position 1-2. Either SMD (R5A) or wired (R5B) resistors may , Diagnostic pin DG1 has a double assignment: Until the first watch dog pulse, DG1 shows the wake up source; a


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PDF ATA6823 20kBaud smd R5A ATA6823-DK2 smd diode r5a ll4248 Atmel atmega88 DIODE DG3 dc shunt motor 1N4148 BAS16
pole-changing motor control diagram

Abstract: l9946
Text: CONTROL LOGIC j DG1 DG2 IN1 IN2 IN3 IN4 I EN DRQ D94AT112 May 1994 1/8 : 7TST237 D[]bB377 , 20 -0.3 to 20 -0.3 to 20 -0.3 to 60 ±2.5 ±5 -5 -40 to 150 26 Unit V V V V V A A A DG1 - DG2 , Junction-case Max Value 2 .5 Unit °C /W PIN FUNCTIONS Pins Vs EN IN I, IN2, IN3 IN4 DRQ DG1 , DG2 , < Vin (1-4) < 5.5V 2 0.8 100 0 < Vdrq < 5.5V I( dg1 ) = I(dg2) = 2mA 80 160 400 10 @ bun = V mV fiA V , 0 0 X IN4 X X 1 0 0 X 1 DRQ X 0 0 1 1 X 0 1 DG1 1 0 1 0 1 0 0 0 DG2 1 1 0 1 0 0 0 0 All


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PDF L9946 MULTIWATT15 L9946 bfl363 pole-changing motor control diagram
L9946

Abstract: pole-changing motor control diagram MULTIWATT15 pole-changing motor
Text: CONTROL LOGIC -Ò-0-" DG1 DG2 IN1 1N2 IN3 IN4 Ç) EN Ö DRQ j D94AT112 May 1994 1/8 This is , DRQ Diagnostic Request Input -0.3 to 20 V DG1 - DG2 Diagnostic Outputs Voltage -0.3 to 60 V , the high side driver. DRQ Diagnostic request input. DG1 , DG2 Diagnostic output (open drain). OUT1 , V0IDG2 Saturation Voltage of Output Diagnostic pins I( dg1 ) = I(dg2) = 2mA 160 400 mV •dgl Idg2 , . TRUTH TABLE OF THE DIAGNOSTIC FUNCTION EN IN1 IN2 IN3 IN4 DRQ DG1 DG2 CONDITION 1 X X X X X 1 1 All ok


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PDF L9946 L9946 MULTIWATT15 pole-changing motor control diagram pole-changing motor
2002 - 20pin hsop

Abstract: G1.L TA8069F
Text: LG1 DG1 FIN 6 7 8 9 10 OUT2 PG1 NC OUT1 VCC1 PIN DESCRIPTION , Ground pins for Logic portion. 5, 16 DG1 , DG2 Self-diagnosis output pins (See Table 2, Truth Table & Timing Chart.)NPN transistor open-collector output. When output becomes overcurrent, set to on; duty 97% on (low). At normal operation, set to open (high). DG1 : OR output of OUT1 & OUT2 DG2 : OR , monitoring the sense resistance. Detection circuits are connected to the self-diagnosis output pins ( DG1


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PDF TA8069F TA8069F 20pin hsop G1.L
2002 - TA8063F

Abstract: No abstract text available
Text: NC DI2 LG1 FIN DG1 6 7 8 9 10 OUT2 PG1 NC OUT1 VCC1 PIN , Ground pins for Logic portion. 5, 16 DG1 , DG2 Self-diagnosis output pins (See Table 2, Truth Table & Timing Chart.) NPN transistor open-collector output. When output becomes overcurrent, set to on; duty 97% on (low). At normal operation, set to open (high). DG1 : OR output of OUT1 & OUT2 DG2 : OR , monitoring the sense resistance. Detection circuits are connected to the self-diagnosis output pins ( DG1


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PDF TA8063F TA8063F
2002 - TA8069F

Abstract: No abstract text available
Text: NC DI2 LG1 DG1 FIN 6 7 8 9 10 OUT2 PG1 NC OUT1 VCC1 PIN , Ground pins for Logic portion. 5, 16 DG1 , DG2 Self-diagnosis output pins (See Table 2, Truth Table & Timing Chart.)NPN transistor open-collector output. When output becomes overcurrent, set to on; duty 97% on (low). At normal operation, set to open (high). DG1 : OR output of OUT1 & OUT2 DG2 : OR , monitoring the sense resistance. Detection circuits are connected to the self-diagnosis output pins ( DG1


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PDF TA8069F TA8069F
2002 - TA8063F

Abstract: No abstract text available
Text: LG1 FIN DG1 6 7 8 9 10 OUT2 PG1 NC OUT1 VCC1 PIN DESCRIPTION , Ground pins for Logic portion. 5, 16 DG1 , DG2 Self-diagnosis output pins (See Table 2, Truth Table & Timing Chart.) NPN transistor open-collector output. When output becomes overcurrent, set to on; duty 97% on (low). At normal operation, set to open (high). DG1 : OR output of OUT1 & OUT2 DG2 : OR , monitoring the sense resistance. Detection circuits are connected to the self-diagnosis output pins ( DG1


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PDF TA8063F TA8063F
2013 - Not Available

Abstract: No abstract text available
Text: Surface Mount Multilayer Ceramic Chip Capacitors ( SMD MLCCs) X7R Dielectric, 6.3 ­ 250 VDC , C1002_X7R_SMD · 3/5/2013 1 Surface Mount Multilayer Ceramic Chip Capacitors ( SMD MLCCs) ­ X7R Dielectric , Capacitors ( SMD MLCCs) ­ X7R Dielectric, 6.3 ­ 250 VDC (Commercial Grade) Electrical Parameters , · 3/5/2013 3 Surface Mount Multilayer Ceramic Chip Capacitors ( SMD MLCCs) ­ X7R Dielectric , 4 Surface Mount Multilayer Ceramic Chip Capacitors ( SMD MLCCs) ­ X7R Dielectric, 6.3 ­ 250 VDC


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2002 - transistor r1012

Abstract: npn smd 2n2222 smd 2DG12 SMD d2b 2n2222 smd DG1 smd transistor SMD D8B SMD diode C715 AN7852 C2559
Text: % variation. This op amp then drives an emitter follower configured transistor Q1. If an offset is not , VHC541 /OE1 2 I0 1 D9A NOTES: RN6 RN5 DAV1 RN4 MA1 DGND DG1 C4 , -19 R27 R30 R15 R28 R34-35 R5-8 R13-14 R10-12 RN1-3 U1 AG1-3, D9-10, DG1 -2, HF1, HS1, HS3 LF1 , Digi-Key Digi-Key Digi-Key Potentiometer Potentiometer Potentiometer Decoupling Capacitor SMD 3.2 X 1.6MM RESISTOR SMD 3.2 X 1.6MM RESISTOR SMD 3.2 X 1.6MM RESISTOR 1KX-ND P20KEMG-ND


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PDF AN7852 10-Bit SPT7852 10-bit transistor r1012 npn smd 2n2222 smd 2DG12 SMD d2b 2n2222 smd DG1 smd transistor SMD D8B SMD diode C715 AN7852 C2559
2012 - ck oca

Abstract: tb9068 dg2h tb9068fg
Text: (CCW/CW1) ENA (NBRAKE) DG1 DG2 CK TXL RXL DEFINITION MOTOR control signal input (SC HALL sensor , 5V regulator is designed to operate an external series PNP power transistor to grant thermal , an appropriate external PNP transistor . The maximum base current output is about 1 mA. The current is , 5V voltage. This clock is used for all internal timing purposes. (4) DIAGNOSTIC CIRCUIT ( DG1 ,DG2 , output " DG1 " and "DG2". Each failure detected can be noticed by output pins " DG1 " and "DG2" change to H


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PDF TB9068FG TB9068FG 120deg, 120deg. ck oca tb9068 dg2h
HSOP20-P

Abstract: No abstract text available
Text: .) · Self-diagnosis output Short : 1A (Typ.) DG1 DG2 · : OR output of OUT1 & OUT2 : OR output of OUT3 & , (See Table 2, Truth Table & Timing Chart.) NPN transistor open-collector output. When output becomes overcurrent, set to on; duty 97% on (low). At normal operation, set to open (high). DG1 : OR output of OUT1 & , function turns off output to protect the IC and motor load. Not connected. 5, 16 DG1 , DG2 6, 15 9 , circuits are connected to the self-diagnosis output pins ( DG1 and DG2), then further connected to the short


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PDF TA8063F TA8063F HSOP20-P-450-1 HSOP20-P
2011 - JESD22-A114E

Abstract: QFN48 SAEJ2602
Text: Microcontroller DG1 H3 S2 Supervisor: Short Circuit Overtemperature Undervoltage COAST , H3 DG3 IL1 /IH1 RXD DG1 DG2 48 47 46 45 44 43 42 41 40 39 38 37 36 1 35 2 34 3 33 , microcontroller 23 DG1 O Diagnostic output 1 24 DG2 O Diagnostic output 2 25 DG3 , can be delivered to each external Power-NMOS transistor at 50kHz is 100nC. The output drivers L1 to , output drivers will be switched off after a blanking time tSC of typically 6 µs and the output DG1 will


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PDF ATA6843 ATA6844 50kHz JESD22-A114E QFN48 SAEJ2602
2014 - Not Available

Abstract: No abstract text available
Text: Atmel ATA6843/44 DG3 LIN Microcontroller DG1 H3 S2 Supervisor: Short Circuit , S2 H2 S3 H3 DG3 IL1 /IH1 RXD DG1 DG2 IL3 /IH3 IL2 /IH2 48 47 46 45 44 43 42 41 40 , DG1 O Diagnostic output 1 24 DG2 O Diagnostic output 2 25 DG3 O , can be delivered to each external Power-NMOS transistor at 50kHz is 100nC. The output drivers L1 to , switched off after a blanking time tSC of typically 6 µs and the output DG1 will be flagged (see also


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PDF ATA6843/ATA6844 ATA6843 ATA6844 50kHz
2012 - CISP25

Abstract: ATA684 AEC-Q100-002-Ref ata6844-plqw
Text: DG1 DG2 DG3 RX TX Supervisor: Short Circuit Overtemperature Undervoltage Driver Control S3 , RXD DG1 DG2 LIN NC TXD IL3 /IH3 IL2 /IH2 CPLO1 CPHI1 CPLO2 CPHI2 CPOUT S1 H1 S2 H2 S3 H3 DG3 Note , Pin Description Symbol DG1 DG2 DG3 H3 S3 H2 S2 H1 S1 CPOUT CPHI2 CPLO2 CPHI1 CPLO1 NC PBAT VG L1 L2 L3 , DC up to 50kHz. The maximum gate charge that can be delivered to each external Power-NMOS transistor , switched off after a blanking time tSC of typically 6 µs and the output DG1 will be flagged (see also


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PDF ATA6843/ATA6844 ATA6843 ATA6844 50kHz CISP25 ATA684 AEC-Q100-002-Ref ata6844-plqw
2013 - Not Available

Abstract: No abstract text available
Text: LIN Microcontroller DG1 H3 S2 Supervisor: Short Circuit Overtemperature Undervoltage , S2 H2 S3 H3 DG3 IL1 /IH1 RXD DG1 DG2 48 47 46 45 44 43 42 41 40 39 38 37 36 1 35 2 , DG1 O Diagnostic output 1 24 DG2 O Diagnostic output 2 25 DG3 O , charge that can be delivered to each external Power-NMOS transistor at 50kHz is 100nC. The output , switched off after a blanking time tSC of typically 6 µs and the output DG1 will be flagged (see also


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PDF ATA6843/ATA6844 ATA6843 ATA6844 50kHz
2011 - ATA6844

Abstract: No abstract text available
Text: Hall A Microcontroller DG1 DG2 DG3 RX TX Supervisor: Short Circuit Overtemperature , 27 10 26 11 25 12 13 14 15 16 17 18 19 20 21 22 23 24 LIN NC TXD IL3 /IH3 IL2 /IH2 IL1 /IH1 RXD DG1 , Description Symbol /IH2 IL1 /IH1 RXD DG1 DG2 DG3 H3 S3 H2 S2 H1 S1 CPOUT CPHI2 CPLO2 CPHI1 CPLO1 NC PBAT VG , charge that can be delivered to each external Power-NMOS transistor at 50kHz is 100nC. The output drivers , after a blanking time tSC of typically 6 µs and the output DG1 will be flagged (see also Section 3.8


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PDF ATA6843 ATA6844 50kHz
2008 - ATMEL 1328

Abstract: 3 terminal hall effect sensor for BLDC motor ATA6833 ATA6834 QFN48 SAEJ2602 CISP25
Text: VG CPHI1 CPHI2 CPOUT CPLO1 CPLO2 PBAT VMODE DG1 DG2 Microcontroller DG3 13V , IH2 IL1 IH1 RXD DG1 DG2 NC NC GND NC CPLO1 CPHI1 CPLO2 CPHI2 CPOUT S1 H1 S2 H2 , bus for microcontroller 23 DG1 O Diagnostic output 1 24 DG2 O Diagnostic , transistor at 50 kHz is 100 nC. The output drivers are directly controlled by the digital input pins IL1 to , output drivers will be switched off after a debounce time of 6 µs and the output DG1 will be flagged


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PDF ATA6833 ATA6834 9122B ATMEL 1328 3 terminal hall effect sensor for BLDC motor QFN48 SAEJ2602 CISP25
2009 - IL13

Abstract: ATA6833 9122C
Text: VCC Regulator 13V Regulator CP High-side Driver 3 High-side Driver 2 H3 DG1 DG2 DG3 , 23 24 LIN NC TXD IL3 IH3 IL2 IH2 IL1 IH1 RXD DG1 DG2 CPLO1 CPHI1 CPLO2 CPHI2 CPOUT S1 H1 S2 H2 S3 H3 , 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Description Symbol IL2 IH2 IL1 IH1 RXD DG1 , charge that can be delivered to each external Power-NMOS transistor at 50 kHz is 100 nC. The output , debounce time of 6 µs and the output DG1 will be flagged (see also Section 3.8 "Short Circuit Detection" on


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PDF ATA6833 ATA6834 9122C IL13
2014 - Not Available

Abstract: No abstract text available
Text: Atmel ATA6843/44 DG3 LIN Microcontroller DG1 H3 S2 Supervisor: Short Circuit , S2 H2 S3 H3 DG3 IL1 /IH1 RXD DG1 DG2 IL3 /IH3 IL2 /IH2 48 47 46 45 44 43 42 41 40 , DG1 O Diagnostic output 1 24 DG2 O Diagnostic output 2 25 DG3 O , can be delivered to each external Power-NMOS transistor at 50kHz is 100nC. The output drivers L1 to , switched off after a blanking time tSC of typically 6 µs and the output DG1 will be flagged (see also


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PDF ATA6843/ATA6844 ATA6843 ATA6844 50kHz
2011 - AEC-Q100-002-Ref

Abstract: atmel 829 ATA6843-PLQW JESD22-A114E QFN48 SAEJ2602 AEC-Q100-004 ATA6844 ATA6844-PLQW ATA684
Text: Microcontroller DG1 H3 S2 Supervisor: Short Circuit Overtemperature Undervoltage COAST , H3 DG3 IL1 /IH1 RXD DG1 DG2 48 47 46 45 44 43 42 41 40 39 38 37 36 1 35 2 34 3 33 , microcontroller 23 DG1 O Diagnostic output 1 24 DG2 O Diagnostic output 2 25 DG3 , can be delivered to each external Power-NMOS transistor at 50kHz is 100nC. The output drivers L1 to , output drivers will be switched off after a blanking time tSC of typically 6 µs and the output DG1 will


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PDF ATA6843 ATA6844 50kHz AEC-Q100-002-Ref atmel 829 ATA6843-PLQW JESD22-A114E QFN48 SAEJ2602 AEC-Q100-004 ATA6844-PLQW ATA684
Not Available

Abstract: No abstract text available
Text: CH2 DI1A DI2A Dll B 3 15 14 L-G1 DI2B L-G2 4 13 DG1 DG2 5 12 M , .) NPN transistor open-collector output. When output becomes overcurrent, set to on; duty 97% on (low). , — 150 — °C 30 — V DG1 / DG2 Over-current Detection Shutdown , DM A Po3 Dll B Po4 "DG2 Po5 DI2A Pnfi D!2B P-G1 V CC2 M1 ( + ) DG1


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PDF TA8083P TA8083P 6-P-300-2
2012 - ATA6833

Abstract: No abstract text available
Text: Regulator 13V Regulator CP High-side Driver 3 High-side Driver 2 H3 DG1 DG2 DG3 H2 , LIN NC TXD IL3 IH3 IL2 IH2 IL1 IH1 RXD DG1 DG2 CPLO1 CPHI1 CPLO2 CPHI2 CPOUT S1 H1 S2 H2 S3 H3 DG3 , Symbol IL2 IH2 IL1 IH1 RXD DG1 DG2 DG3 H3 S3 H2 S2 H1 S1 CPOUT CPHI2 CPLO2 CPHI1 CPLO1 NC PBAT VG L1 L2 , Power-NMOS transistor at 50kHz is 100nC. The output drivers are directly controlled by the digital input pins , inputs S1 to S3, the output drivers will be switched off after a debounce time of 6 µs and the output DG1


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PDF ATA6833/ATA6834 ATA6833 ATA6834 50kHz
2009 - ATA6833

Abstract: No abstract text available
Text: VCC Regulator 13V Regulator CP High-side Driver 3 High-side Driver 2 H3 DG1 DG2 DG3 , 23 24 LIN NC TXD IL3 IH3 IL2 IH2 IL1 IH1 RXD DG1 DG2 CPLO1 CPHI1 CPLO2 CPHI2 CPOUT S1 H1 S2 H2 S3 H3 , 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Description Symbol IL2 IH2 IL1 IH1 RXD DG1 , charge that can be delivered to each external Power-NMOS transistor at 50 kHz is 100 nC. The output , debounce time of 6 µs and the output DG1 will be flagged (see also Section 3.8 "Short Circuit Detection" on


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PDF ATA6833 ATA6834 9122D
HSOP20

Abstract: TA8063F TA8069F
Text: Ground pins for Logic portion. 5, 16 DG1 , DG2 Self-diagnosis output pins (See Table 2, Truth Table & Timing Chart.) NPN transistor open-collector output. When output becomes overcurrent, set to on; duty 97% on (low). At normal operation, set to open (high). DG1 : OR output of OUT1 & OUT2 DG2: OR output of , monitoring the sense resistance. Detection circuits are connected to the self-diagnosis output pins ( DG1 and


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PDF TA8063F TA8063F HSOP20-P-450-1 HSOP20 TA8069F
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