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Part Manufacturer Description Datasheet Download Buy Part
TPS51216MRUKREP Texas Instruments Enhanced Product Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck Controller 20-WQFN -55 to 125
V62/16601-01XE Texas Instruments Enhanced Product Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck Controller 20-WQFN -55 to 125
TPS51200DRCTG4 Texas Instruments 3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4 10-VSON -40 to 85
TPS51200DRCT Texas Instruments 3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4 10-VSON -40 to 85
TPS51200DRCR Texas Instruments 3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4 10-VSON -40 to 85
TPS51200DRCRG4 Texas Instruments 3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4 10-VSON -40 to 85

DDR3L lpddr2 Datasheets Context Search

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lpddr2

Abstract: lpddr2 datasheet samsung lpddr2 samsung* lpddr2 LPDDR2 1Gb Memory lpddr2 spec samsung toggle mode NAND lpddr1 lpddr2 samsung DDR3L lpddr2
Text: LPDDR1 needs 4 die for 6.4GB/s 17 / ? LPDDR2 versus DDR3L (1.35V) · New Tablet PCs are using , Semiconductor, Inc. 1/? Agenda Industry Trends: IT & Mobile LPDDR2 Effect on Battery Life DDR3 , Industry Trends: IT & Mobile LPDDR2 Effect on Battery Life DDR3 Effect on Energy Saving SSD Effect on , LPDDR2 Effect on Battery Life DDR3 Effect on Energy Saving SSD Effect on Efficiency Virtualization , Memory Bandwidth Wide I/O 12.8GB/s 9.6GB/s LPDDR2 2ch. Serial IO 6.4GB/s LPDDR2 3.2GB/s


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2012 - UG585

Abstract: CLG225 ZYNQ-7000 zynq7000
Text: , DDR3L , DDR2, or LPDDR2 memories ECC support in 16-bit mode 1GB of address space using single rank of , (1) DDR3, DDR3L , DDR2, LPDDR2 External Static Memory Support(1) 2x Quad-SPI, NAND, NOR , DDR2/3, DDR3L , LPDDR2 Controller CoreSight Components SRAM/ NOR DAP ONFI 1.0 NAND , modules. The dynamic memory controller supports DDR3, DDR3L , DDR2, and LPDDR2 memories. The static memory , /O peripherals and static memory controllers • 32-bit or 16-bit DDR2/DDR3/ DDR3L / LPDDR2


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PDF Zynq-7000 DS190 UG585 CLG225 zynq7000
2012 - zynq axi ethernet software example

Abstract: AMBA AXI dma controller designer user guide XC7Z020 ZYNQ-7000 axi compliant ddr3 controller Xilinx Z-7020 DDR3L lpddr2 XC7Z100 XC7Z010 CLG400
Text: -bit interfaces to DDR3, DDR3L , DDR2, or LPDDR2 memories ECC support in 16-bit mode 1GB of address space using , ); 800 MHz (-3) 32 KB Instruction, 32 KB Data per processor 512 KB 256 KB DDR3, DDR3L , DDR2, LPDDR2 2x , SRAM Memory Interfaces DDR2/3, DDR3L , LPDDR2 Controller DAP DevC Programmable Logic to Memory , interface modules. The dynamic memory controller supports DDR3, DDR3L , DDR2, and LPDDR2 memories. The static , memory controllers 32-bit or 16-bit DDR2/DDR3/ DDR3L / LPDDR2 memories MIO Overview The function of the


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PDF Zynq-7000 DS190 ZynqTM-7000 zynq axi ethernet software example AMBA AXI dma controller designer user guide XC7Z020 axi compliant ddr3 controller Xilinx Z-7020 DDR3L lpddr2 XC7Z100 XC7Z010 CLG400
2012 - Not Available

Abstract: No abstract text available
Text: €¢ Multiprotocol dynamic memory controller • 16-bit or 32-bit interfaces to DDR3, DDR3L , DDR2, or LPDDR2 , External Memory Support 667 MHz (-1); 800 MHz (-2) DDR3, DDR3L , DDR2, LPDDR2 External Static , Interfaces Central Interconnect DDR2/3, DDR3L , LPDDR2 Controller CoreSight Components SRAM , supports DDR3, DDR3L , DDR2, and LPDDR2 memories. The static memory controllers support a NAND flash , -bit DDR2/DDR3/ DDR3L / LPDDR2 memories DS196 (v1.1) June 18, 2014 Preliminary Product Specification


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PDF Zynq-7000Q DS196 Zynq-7000Q -7000Q
2012 - Not Available

Abstract: No abstract text available
Text: €¢ Multiprotocol dynamic memory controller • 16-bit or 32-bit interfaces to DDR3, DDR3L , DDR2, or LPDDR2 , ) 256 KB External Memory Support 667 MHz (-1); 800 MHz (-2) DDR3, DDR3L , DDR2, LPDDR2 , Interfaces Central Interconnect DDR2/3, DDR3L , LPDDR2 Controller CoreSight Components SRAM , supports DDR3, DDR3L , DDR2, and LPDDR2 memories. The static memory controllers support a NAND flash , -bit DDR2/DDR3/ DDR3L / LPDDR2 memories DS196 (v1.0) November 22, 2013 Preliminary Product Specification


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PDF Zynq-7000Q DS196 Zynq-7000Q -7000Q
2012 - Z-7020

Abstract: No abstract text available
Text: , DDR3L , DDR2, or LPDDR2 memories ECC support in 16-bit mode 1GB of address space using single rank of , DDR2/3, DDR3L , LPDDR2 Controller CoreSight Components SRAM/ NOR DAP ONFI 1.0 NAND , modules. The dynamic memory controller supports DDR3, DDR3L , DDR2, and LPDDR2 memories. The static memory , /O peripherals and static memory controllers • 32-bit or 16-bit DDR2/DDR3/ DDR3L / LPDDR2 , 32 KB Instruction, 32 KB Data per processor L2 Cache 512 KB On-Chip Memory DDR3, DDR3L


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PDF Zynq-7000 DS190 Z-7020
2012 - Not Available

Abstract: No abstract text available
Text: , DDR3L , DDR2, or LPDDR2 memories ECC support in 16-bit mode 1GB of address space using single rank of , (1) DDR3, DDR3L , DDR2, LPDDR2 External Static Memory Support(1) 2x Quad-SPI, NAND, NOR , DDR2/3, DDR3L , LPDDR2 Controller CoreSight Components SRAM/ NOR DAP ONFI 1.0 NAND , modules. The dynamic memory controller supports DDR3, DDR3L , DDR2, and LPDDR2 memories. The static memory , /O peripherals and static memory controllers • 32-bit or 16-bit DDR2/DDR3/ DDR3L / LPDDR2


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PDF Zynq-7000 DS190
2014 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF HB1012 HB1012
2012 - Micron Technology

Abstract: No abstract text available
Text: Feature Comparison Type LPDDR(1) LPDDR2 LPDDR3 DDR2 DDR3/ DDR3L DDR4 Die Density , low power, mobile or wireless DRAM (LPDDR, LPDDR2 , LPDDR3). Also defined by JEDEC standard , , x8, x16 3.2 GB/s 800-1600Mb/s 1Gb, 2Gb 48ns 500mW DDR3L 400-800 x4, x8, x16 , 128-512Mb 45-50ns 150-230mW LPDDR2 333-400 X16, x32 2.1 GB/s 667-1066Mb/s 2-8Gb , DDR3L 32-bit 800 MHz BW=6.40 GBy/s 32 16U 16L 16U 16L CONFIG DDR3L-RS 32bit 800 MHz


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PDF 20Note/DRAM/TN4102 TN-41-04: TN-41-13: TN-46-02: TN-46-06: TN-46-11: TN-46-14: TN-47-19: TN-47-20: Micron Technology
JESD209-2E

Abstract: MSO UPGRADE PACKAGE
Text: following Memory standards are supported by DDRA: DDR, DDR2, DDR3, DDR3L , DDR4 Features and Benefits , , BGA interposers and MSO interposers LPDDR, LPDDR2 , LPDDR3 GDDR3, GDDR5 Datasheet DDRA , DDR JESD79E DDR2 JESD79-2F DDR3 JESD79- 3F DDR3L JESD79-3-1 DDR4 JESD79-4 LPDDR JESD209A LPDDR2 JESD209-2E LPDDR3 JESD209-3 Memory interface analysis in DPOJET , . P7500 Trimode Probeing System with accessories LPDDR2 component package on package interposer 4


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PDF MSO5000 MSO70000 DSO/MSO5000, DPO7000 DPO/DSA/MSO70000 5W-22329-8 JESD209-2E MSO UPGRADE PACKAGE
2011 - lpDDR2 SODIMM

Abstract: No abstract text available
Text: /RLDRAM III, and LPDDR2 SDRAM. Core Specifics Supported Device Family(1) Zynq™-7000(2), Virtex , . DDR3 Component and DIMM, DDR2 Component and DIMM, QDRII+, RLDRAM II, RLDRAM III, and LPDDR2 SDRAM , to 72 bits Single and dual rank UDIMM, RDIMM, and SODIMM support DDR3 (1.5V) and DDR3L (1.35V) 1 , Vivado Simulators are supported for DDR3 SDRAM, DDR2 SDRAM, QDRII+ SRAM, RLDRAM II, and LPDDR2 SDRAM , Interface Solutions User Guide (UG586) provided with the core. LPDDR2 SDRAM This section discusses the


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PDF DS176 lpDDR2 SODIMM
AR6003

Abstract: SoC ARM cortex 64bit Hardware Manual
Text: LP-DDR2 , 1chx32 DDR3 or DDR3L Up to 4GB 1x32 LP-DDR2 , 1chx32 DDR3 or DDR3L Up to 4GB 2x32 LP-DDR2 , 1chx64 DDR3 or DDR3L Up to 4GB 2x32 LP-DDR2 , 1chx64 DDR3 or DDR3L Up to 4GB 2x32 LP-DDR2 , 1chx64 DDR3 or DDR3L Max DDR Speed 400MHz (800MT/s) 400MHz (800MT/s) 400MHz , graphics • 32-bit DDR3 and LPDDR2 at 400MHz • Integrated EPD controller i.MX 6Solo • Single , graphics engines • 32-bit DDR3 and LPDDR2 at 400MHz • 64-bit DDR3 and 2channel 32-bit LPDDR2


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PDF ARM11 150MJuly AR6003 SoC ARM cortex 64bit Hardware Manual
2011 - Not Available

Abstract: No abstract text available
Text: , RLDRAM II/RLDRAM III, and LPDDR2 SDRAM. Core Specifics Supported Device Family(1) Zynq®-7000 , . DDR3 Component and DIMM, DDR2 Component and DIMM, QDRII+, RLDRAM II, RLDRAM III, and LPDDR2 SDRAM , to 72 bits Single and dual rank UDIMM, RDIMM, and SODIMM support DDR3 (1.5V) and DDR3L (1.35V) 1 , supported for DDR3 SDRAM, DDR2 SDRAM, QDRII+ SRAM, RLDRAM II, and LPDDR2 SDRAM. © Copyright 2011–2013 , core. LPDDR2 SDRAM This section discusses the features, applications, and functional description of


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PDF DS176
2011 - Not Available

Abstract: No abstract text available
Text: + SRAM, RLDRAM II/RLDRAM 3, and LPDDR2 SDRAM. Core Specifics Supported Device Family(1) Zynq , interface. DDR3 Component and DIMM, DDR2 Component and DIMM, QDRII+, RLDRAM II, RLDRAM 3, and LPDDR2 , DDR3L (1.35V) 1, 2, 4, and 8 Gb density device support 8-bank support x8 and x16 device support 8:1 , Series Devices Memory Interface Solutions User Guide (UG586) [Ref 2] provided with the core. LPDDR2 , FPGAs memory interface solutions in LPDDR2 SDRAMs. LPDDR2 SDRAM Features • Component support


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PDF Zynq-7000 DS176
2012 - Marvell PXA2128

Abstract: ARMv7 MIPI Marvell h.264 Marvell android
Text: independent memory controllers ( LPDDR2 or DDR3/ DDR3L ). • Multiple power islands, dynamic voltage/frequency , DIAGRAM Dual-channel 2x 32b LPDDR2 or DDR3 HDMI+PHY 1.3c+3D HDCP 2x MIPI DSI Gen 2 EPD , $ USB3.0 Ss Device DDR3, LPDDR2 8x8 Matrix Keyboard 4x PWM Ethernet (10/100), USB3 OWSI


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PDF PXA2128 40-nanometer SoC-001 Marvell PXA2128 ARMv7 MIPI Marvell h.264 Marvell android
2012 - Avastar 88W8787

Abstract: Marvell PXA2128 marvell wtm 3 MIPI Marvell
Text: €¢ Dual-channel independent memory controllers ( LPDDR2 or DDR3/ DDR3L ). • Multiple power islands, dynamic , COMPARISON BLOCK DIAGRAM Dual-channel 2x 32b LPDDR2 or DDR3 HDMI+PHY 1.3c+3D HDCP 2x MIPI DSI , 466 Mtri/sec 1.4 Gpix/sec Graphics Video 32KB/32KB D$/I$ USB3.0 Ss Device DDR3, LPDDR2


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PDF PXA2128 40-nanometer SoC-001 Avastar 88W8787 Marvell PXA2128 marvell wtm 3 MIPI Marvell
2012 - SCIMX

Abstract: IMX6DQ6SDLSRM IMX6DQCEC
Text: processor provides a 64-bit DDR3/LVDDR3/ LPDDR2 -1066 memory interface and a number of other interfaces for , processors support many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2 , NOR , -bit, 32-bit, and 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB, and 8 , processor system. LPDDR2 /DDR3 532MHz (DDR1066) Digital External Memory Interface GPMI Audio


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2013 - Not Available

Abstract: No abstract text available
Text: €Œ Programmable output voltage supporting DDR3, DDR3L , DDR3UL, and LPDDR2  Serial programming interface î , €Œ LPDDR2 Memory Power Supplies DDR3, DDR3L , DDR3UL Memory Power Supplies Mobile computers Servers


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PDF PSG2410 PSG2410 05H-0FH 24-pin
2012 - samsung lcd tv circuits diagrams

Abstract: SCIMX IMX6DQ6SDLSRM
Text: integrated power management. Each processor provides a 64-bit DDR3/LVDDR3/ LPDDR2 -1066 memory interface and , , low voltage DDR3, LPDDR2 , NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND™, and , €” 16-bit, 32-bit, and 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB , modules in the i.MX 6Dual/6Quad processor system. Digital Audio LPDDR2 /DDR3 532MHz (DDR1066


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2012 - IMX6DQ6SDLSRM

Abstract: No abstract text available
Text: video processing, and integrated power management. Each processor provides a 64-bit DDR3/LVDDR3/ LPDDR2 , , low voltage DDR3, LPDDR2 , NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND™, and , €” 16-bit, 32-bit, and 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB , modules in the i.MX 6Dual/6Quad processor system. Digital Audio LPDDR2 /DDR3 532MHz (DDR1066


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2012 - Sony imx 134

Abstract: IMX6DQ6SDLSRM Sony imx 134 cmos sensor Samsung eMMC 4.41 emmc 4.41 spec MIPI CSI-2 Parallel bridge LVDS to MIPI CSI sony IMX 135 MCIMX6Q5EYM10AC RGB to MIPI DSI LCD
Text: processor provides a 64-bit DDR3/LVDDR3/ LPDDR2 -1066 memory interface and a number of other interfaces for , , LPDDR2 , NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNANDTM, and managed NAND, including , External memory interfaces: - 16-bit, 32-bit, and 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 - 8-bit NAND-Flash, including support for , system. Figure 2 shows the functional modules in the i.MX 6Dual/6Quad processor system. LPDDR2 /DDR3


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2012 - IMX6DQ6SDLSRM

Abstract: No abstract text available
Text: a 64-bit DDR3/LVDDR3/ LPDDR2 -1066 memory interface and a number of other interfaces for connecting , , including DDR3, low voltage DDR3, LPDDR2 , © 2012-2013 Freescale Semiconductor, Inc. All rights reserved , 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB, and 8 KB page , processor system. Digital Audio LPDDR2 /DDR3 NOR Flash 532MHz(DDR1066) PSRAM External Memory


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PDF 1080p 64-bit DDR3/LVDDR3/LPDDR2-1066 IMX6DQ6SDLSRM
2012 - Not Available

Abstract: No abstract text available
Text: a 64-bit DDR3/LVDDR3/ LPDDR2 -1066 memory interface and a number of other interfaces for connecting , , including DDR3, low voltage DDR3, LPDDR2 , © 2012-2013 Freescale Semiconductor, Inc. All rights reserved , 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB, and 8 KB page , processor system. Digital Audio LPDDR2 /DDR3 NOR Flash 532MHz(DDR1066) PSRAM External Memory


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PDF 1080p 64-bit DDR3/LVDDR3/LPDDR2-1066
2012 - sony IMX 136

Abstract: IMX6DQ6SDLSRM sony sensor imx 136 sony CMOS sensor imx 136 Sony imx 134 cmos sensor sony CMOS sensor imx 135 sony cmos sensor imx 174 sony cmos sensor imx 123 sony IMX 138 sony IMX 260
Text: a 64-bit DDR3/LVDDR3/ LPDDR2 -1066 memory interface and a number of other interfaces for connecting , , including DDR3, low voltage DDR3, LPDDR2 , © 2012-2013 Freescale Semiconductor, Inc. All rights reserved , 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB, and 8 KB page , processor system. Digital Audio LPDDR2 /DDR3 NOR Flash 532MHz(DDR1066) PSRAM External Memory


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PDF 1080p 64-bit DDR3/LVDDR3/LPDDR2-1066 sony IMX 136 IMX6DQ6SDLSRM sony sensor imx 136 sony CMOS sensor imx 136 Sony imx 134 cmos sensor sony CMOS sensor imx 135 sony cmos sensor imx 174 sony cmos sensor imx 123 sony IMX 138 sony IMX 260
2012 - SCIMX

Abstract: sony cmos sensor imx 174
Text: integrated power management. Each processor provides a 64-bit DDR3/LVDDR3/ LPDDR2 -1066 memory interface and , , low voltage DDR3, LPDDR2 , NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND™, and , €” 16-bit, 32-bit, and 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2 -1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2 -1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB , modules in the i.MX 6Dual/6Quad processor system. Digital Audio LPDDR2 /DDR3 532MHz (DDR1066


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