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DB0-DB11 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1987 - BB OPA2604

Abstract: AD7545 DAC7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545
Text: VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. NOTES: VDD = , 2ppm/°C for VDD = +5 VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100 DAC output , Capacitance(3): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 =


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit BB OPA2604 AD7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545
AD7545

Abstract: No abstract text available
Text: 10 200 DB0-DB11 =0V; WR,CS = 0V ± nA max Output Current Settling Time tSL -1,2,3,4 2 To ± 1 , Current iln -1,2,3,4 10 1 10 VIN = 0VorVDD ± |j,A max Digital Input Capacitance DB0-DB11 WR,CS ClN -1,2 , pF max 200 DB0-DB11=Vdd , WR,CS=0V Chip Select to Write Setup Time4 tcs -1,2,3,4 200 ns min , Current iln -1,2,3,4 10 1 10 VIN = 0VorVDD ± p.A max Digital Input Capacitance DB0-DB11 WR,CS ClN -1,2,3 , DB0-DB11 = 0V, WR, CS = 0V pF max 200 DB0-DB1I = Vdd, WR,CS = 0V Chip Select to Write Setup Time4


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PDF 12-Bit AD7545 16-bit ADI-M-1000: 20-Pin E-20A 20-Contact DB0-DB11)
AD7545

Abstract: AD7545A
Text: ,2 10 1 10 V1N = 0VorVDD ±(iAmax Digital Input Capacitance C|N -1,2 8 DB0-DB11 ; WR, CS pFmax 15 Output Capacitance Qnni -1,2 70 DB0-DB11 = 0 V, WR, CS = 0 V pFmax 150 DB0-DB11 = VDD; WR.CS = 0 V , i.N :r -1,2 10 1 10 VIN = 0VorVDD ±jxAmax Digital Input Capacitance QN "1,2 8 DB0-DB11 ; WR, CS pFmax Output Capacitance Coin. -1,2 70 DB0-DB11 = 0 V,WR,CS = 0V pFmax 150 DB0-DB11 = VDD; WR, CS


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PDF DD4Q773 12-Bit AD7545A 16-bit AD7545 AD7545AT /883B AD7545AU
7545

Abstract: HS 7545UD 20-PIN AD7545 OP-07 OP-27 7545 OP DAC 8080 2047X
Text: , C S, T, U 0.005 10 10 0.005 50 200 %/% nA max nA max WR, CS, DB0-DB11 =0V dynamic performance Full , Capacitance COUTI C0UT1 25 50 25 50 pF max pF max DB0-DB11 = 0VWR,CS"= 0V DB0-DB11 = VDD wr. CS = 0V logic inputs VINH V|NL ■in Input Capacitance DB0-DB11 WR, CS + 2.4 + 0.8 ± 1 5 20 + 2.4 + 0.8 ±10 5 20 V , 0 tWR ; tDH "VDD 0 «DS DATA IN ( DB0-DB11 ) -VDD WRITE MODE: CS AND WR LOW, DAC RESPONDS TO DATA BUS ( DB0-DB11 ) INPUTS. HOLD MODE: EITHER C?OR"WB HIGH, DATA BUS ( DB0-DB11 ) IS LOCKED OUT; DAC


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PDF 12-Bit 12-Bit, 16-Bit 20-pin MIL-STD-883C AD7545 10-Bit) 7545JN 7545AD 7545 HS 7545UD OP-07 OP-27 7545 OP DAC 8080 2047X
2000 - AD7545

Abstract: DAC7545 DAC7545JP DB10 PM-7545
Text: J, K, L, GL 0.015 10 0.03 50 0.01 10 0.02 50 %/% nA VDD ±5% DB0-DB11 = 0V , 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V DIGITAL INPUTS VIH (Input HIGH Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS All All All All All 2.4 0.8 ±1 5 , includes the effect of 5ppm max, gain TC. (3) Guaranteed but not tested. (4) DB0-DB11 = 0V to VDD or VDD


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PDF DAC7545 12-Bit DAC7545 AD7545 DAC7545JP DB10 PM-7545
1996 - AD7545

Abstract: DAC7545 DAC7545JP DAC7545KP DB10 PM-7545 2016 DAC
Text: 0.02 50 %/% nA VDD ±5% DB0-DB11 = 0V; WR, CS = 0V All 2 2 2 2 µs To 1 , 200 pF pF DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V DIGITAL INPUTS VIH (Input HIGH Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS , tested. (4) DB0-DB11 = 0V to VDD or VDD to 0V. (5) Typical. (6) Minimum. (7) Logic inputs are MOS gates , tDH Hold Mode CS and WR low, DAC responds to Data Bus ( DB0-DB11 ) inputs. VDD tDS Data In


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PDF DAC7545 12-Bit DAC7545 16-bit AD7545 DAC7545JP DAC7545KP DB10 PM-7545 2016 DAC
Not Available

Abstract: No abstract text available
Text: 0.002 10 0.004 200 VDD = ±5% DB0-DB11 = 0V ;W R ,C S = 0 V To +1/2 LSB; OUT1 Load = 100 i l , DAC Output , Capacitance FT R|N - 1 ,2 - 1 ,2 10 10 20 10 20 2.4 0.8 1 10 20 2.4 0.8 10 V,N = 0 V or VDD DB0-DB11 , -1 ,2 2.4 0.8 10 8 15 C|N Output Capacitance Q ju t i -1 ,2 70 150 DB0-DB11 = 0 V ,W R ,C S = 0 V DB0-DB11 = VDD; WK, CS = 0 V pF max Chip Select to Write Setup Time* Chip , = LSB max -ppm/°C max PSRR OUT1 tSL FT R|N 0.002 10 0.004 200 VDD = =5% DB0-DB11 = 0 V


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PDF 12-Bit AD7545A 16-bit AD7545A AD7545 AD7545AT /883B AD7545AU /883B
Not Available

Abstract: No abstract text available
Text: Voltage DB0-DB11 , BUSY VOL mA U2 , r V 0.8 i,2 ,3; VDD = +5 V ± 5% V 10 1, 2, 3 VIN = 0 V to VD > E 10 -1 Logic Output High Voltage DB0-DB11 , BUSY LSB VDD , V V Floating State Leakage Current DB0-DB11 -1 Floating State Output Capacitance: DB0-DB11 -1 15 13, 14, 15 -1 35 1, 2, 3 CONVST = CS = RD = VDD mA 1, 2, 3


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PDF 12-Bit AD7886 12-bit AD7886T /883B ADT-M-1000: 28-Pin
1987 - Not Available

Abstract: No abstract text available
Text: ( DB0-DB11 ) inputs. Mode Selection Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. tDS Data In ( DB0-DB11 ) VIH VIL Data , (3) ppm/°C Typical Value is 2ppm/°C for VDD = +5 %/% nA µs VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To , Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS SWITCHING , All All All All All All All All All DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V VIN =


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PDF DAC7545 SBAS150A 12-Bit AD7545, PM-7545 DAC7545 12-bit,
1987 - BB OPA2604

Abstract: No abstract text available
Text: ( DB0-DB11 ) inputs. Mode Selection Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. tDS Data In ( DB0-DB11 ) VIH VIL Data , (3) ppm/°C Typical Value is 2ppm/°C for VDD = +5 %/% nA µs VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To , Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS SWITCHING , All All All All All All All All All DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V VIN =


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PDF DAC7545 SBAS150A 12-Bit AD7545, PM-7545 DAC7545 12-bit, BB OPA2604
1987 - BB OPA2604

Abstract: OPA604 AD7545 DAC7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545
Text: VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. NOTES: VDD = , 2ppm/°C for VDD = +5 VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100 DAC output , Capacitance(3): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 =


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit BB OPA2604 OPA604 AD7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545
1998 - DAC7545

Abstract: Direct Replacement DIP AD7545 DAC7545JP DAC7545KP DB10 PM-7545
Text: J, K, L, GL 0.015 10 0.03 50 0.01 10 0.02 50 %/% nA VDD ±5% DB0-DB11 = 0V , 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V DIGITAL INPUTS VIH (Input HIGH Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS All All All All All 2.4 0.8 ±1 5 , includes the effect of 5ppm max, gain TC. (3) Guaranteed but not tested. (4) DB0-DB11 = 0V to VDD or VDD


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PDF DAC7545 12-Bit DAC7545 16-bit Direct Replacement DIP AD7545 DAC7545JP DAC7545KP DB10 PM-7545
1987 - Not Available

Abstract: No abstract text available
Text: ( DB0-DB11 ) inputs. Mode Selection Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. tDS Data In ( DB0-DB11 ) VIH VIL Data , (3) ppm/°C Typical Value is 2ppm/°C for VDD = +5 %/% nA µs VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To , Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS SWITCHING , All All All All All All All All All DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V VIN =


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PDF DAC7545 SBAS150A 12-Bit AD7545, PM-7545 DAC7545 12-bit,
1987 - Not Available

Abstract: No abstract text available
Text: ( DB0-DB11 ) inputs. Mode Selection Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. tDS Data In ( DB0-DB11 ) VIH VIL Data , (3) ppm/°C Typical Value is 2ppm/°C for VDD = +5 %/% nA µs VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To , Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS SWITCHING , All All All All All All All All All DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V VIN =


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PDF DAC7545 SBAS150A 12-Bit AD7545, PM-7545 DAC7545 12-bit,
1987 - Not Available

Abstract: No abstract text available
Text: ( DB0-DB11 ) inputs. Mode Selection Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. tDS Data In ( DB0-DB11 ) VIH VIL Data , (3) ppm/°C Typical Value is 2ppm/°C for VDD = +5 %/% nA µs VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To , Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS SWITCHING , All All All All All All All All All DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V VIN =


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PDF DAC7545 SBAS150A 12-Bit AD7545, PM-7545 DAC7545 12-bit,
1987 - Not Available

Abstract: No abstract text available
Text: ( DB0-DB11 ) inputs. Mode Selection Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. tDS Data In ( DB0-DB11 ) VIH VIL Data , (3) ppm/°C Typical Value is 2ppm/°C for VDD = +5 %/% nA µs VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To , Voltage) VIL (Input LOW Voltage) IIN (Input Current)(7) Input Capacitance(3): DB0-DB11 WR, CS SWITCHING , All All All All All All All All All DB0-DB11 = 0V; WR, CS = 0V DB0-DB11 = VDD; WR, CS = 0V VIN =


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PDF DAC7545 SBAS150A 12-Bit AD7545, PM-7545 DAC7545 12-bit,
1987 - AD7545

Abstract: DAC7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545 BB OPA2604
Text: VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. NOTES: VDD = , 2ppm/°C for VDD = +5 VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100 DAC output , Capacitance(3): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 =


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit AD7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545 BB OPA2604
1987 - AD7545

Abstract: DAC7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545
Text: VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. NOTES: VDD = , 2ppm/°C for VDD = +5 VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100 DAC output , Capacitance(3): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 =


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit AD7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545
1987 - Not Available

Abstract: No abstract text available
Text: Selection 0 WR tWR VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS , ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100Ω DAC output measured from , ): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 = 0V; WR


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit
Not Available

Abstract: No abstract text available
Text: from Falling Edge of W R. CS = 0 V VIN = 0 V o r V DD DB 0-D B 11; W R , CS DB0-DB11 = 0 V, W R , CS = 0 V DB0-DB11 = V DD; W R , CS = 0 V ± ppm/°C max ±% /% m ax ± nA max (is max mV p -p , -Bit M onotonie T min to T ^ , DAC Register Loaded with 1111 1111 1111 VDD = =5% DB0-DB11 = 0 V; W R , = 0 V or VDD DBO-DB11 ; W R , CS DB0-DB11 = 0 V, W R ,C S = 0 V D B O 'D B l 1 = VDD; W R , CS =


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PDF 12-Bit AD7545A 12-bit 16-bit AD7545A AD7545 AD7545AT /883B AD7545AU
smd code n20

Abstract: SMD diode N20 SMD diode DB6 ADLH0032CG SMD diode DB1 AD7545GUE SMD N20 DIODE N20 DB10 AD7545JN
Text: DB0-DB11 = 0 V; WR, CS = 0 V A, B, C, GC 10 50 10 50 nA max S, T, U, GU 10 200 10 200 nA max DYNAMIC , Couti All 70 W:'' :. 70 pF max DB0-DB11 = 0 V, WR, CS = 0 V Couti 200 200 f .200; 200 pF max DB0-DB11 = VDD, WR, CS = 0 V DIGITAL INPUTS Input High Voltage VIH All 2.4 2.4 13.5 13.5 V , ±1 ±10 [lA max VIN = 0 or VDD Input Capacitance3 DB0-DB11 All 5 5 5 5 pF max ViN= 0 WR, CS All , . Specifications subject to change without notice. -2- REV. A AD7545 -tes ■"twR -Ids ■DATA IN ( DB0-DB11 ) x: .


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PDF 12-Bit AD7545 20-Lead 20-Terminal 16-bit E-20A smd code n20 SMD diode N20 SMD diode DB6 ADLH0032CG SMD diode DB1 AD7545GUE SMD N20 DIODE N20 DB10 AD7545JN
1987 - DAC7545

Abstract: DAC7545JU DAC7545KU DAC7545LU PM-7545 AD7545 DAC7545GLU FET marking ACOM opa604
Text: VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. NOTES: VDD = , 2ppm/°C for VDD = +5 VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100 DAC output , Capacitance(3): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 =


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit DAC7545JU DAC7545KU DAC7545LU PM-7545 AD7545 DAC7545GLU FET marking ACOM opa604
1997 - SMD diode N20

Abstract: SMD diode DB3 SMD diode DB6 AD7545SQ AD7545TQ AD7545KN AD7545 AD7545AQ AD7545BQ AD7545CQ
Text: No file text available


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PDF 12-Bit AD7545 12-Bit 20-Lead 20-Terminal AD7545 P-20A SMD diode N20 SMD diode DB3 SMD diode DB6 AD7545SQ AD7545TQ AD7545KN AD7545AQ AD7545BQ AD7545CQ
1987 - BB OPA2604

Abstract: DAC7545 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545 AD7545
Text: VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS assumed high state. NOTES: VDD = , 2ppm/°C for VDD = +5 VDD ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100 DAC output , Capacitance(3): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 =


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit BB OPA2604 DAC7545GLU DAC7545JU DAC7545KU DAC7545LU PM-7545 AD7545
1987 - Not Available

Abstract: No abstract text available
Text: Selection 0 WR tWR VDD tDS Data In ( DB0-DB11 ) 2 VIH VIL Write Mode Data Valid tDH CS and WR low, DAC responds Data Bus ( DB0-DB11 ) inputs. 0 VDD 0 Hold Mode Either CS or WR high, data bus to ( DB0-DB11 ) is locked out; DAC holds last data present when WR or CS , ± 5% DB0-DB11 = 0V; WR, CS = 0V To 1/2 LSB. Out 1 Load = 100Ω DAC output measured from , ): COUT 1 COUT 2 All All 70 200 70 200 70 200 70 200 pF pF DB0-DB11 = 0V; WR


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PDF DAC7545 SBAS150A 12-Bit DAC7545 12-bit, 12-bit
Supplyframe Tracking Pixel