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SC414MF-100 Signal Transformer Inc FIXED IND 10UH 900MA 307 MOHM
B82442T1273K50 TDK Epcos FIXED IND 27UH 880MA 307 MOHM
37108 Desco Industries Inc OPEN BIN BOX 307-42A 18x6x4-1/2

DA3 307 Datasheets Context Search

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DA3 307

Abstract: EIA-232 SN75LBC187 z5u-type A 2731 5V RS232 Driver
Text: RA1 [ 9 20 j DA3 GND[ 10 19 ] RY5 vCc[ 11 18 ] RA5 C1 + [ 12 17 ]vss vDD[ 13 16 ] C2— C1-[ 14 , (positive logic) SHUTDOWN C1 + C1-C2+-C2— RA1 RA2 RA3 RA4 RA5 DAI DA2 DA3 25 12 14 15 16 VCC 11 , DA3 DY4 RY5 VDD VSS vcc — SHUTDOWN - Switched-Capacitor Circuit ^ 10 GND tThis symbol is in , . Texas Instruments 2-734 post office box 655303 • dallas, texas 75265 ■ac1bl72H 00TQT3S 307 â


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PDF SN75LBC187 EIA-232 SLLS130B D3881, EIA/TIA-232-E-1991, EIA/TIA-562, RS-232 MIL-STD-883C, 25-mil-Pitch DA3 307 SN75LBC187 z5u-type A 2731 5V RS232 Driver
Not Available

Abstract: No abstract text available
Text: DBj DÖ3 Ä ] db3 9 Logic Block Diagram FCT2244T ÜËa < h - OEb , - — 2 C 7 da3 da3 — V CC 19 D Ü E b da2 C 6 OBg — 20 ] DA q C 2 , œ01SÛÔ3 307 -0 .7 -6 0 -1 2 0 V N ot more than one output should be shorted at a time. D


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PDF CY54/74FCT2240T CY54/74FCT2244T FCT2240T FCT2244T 300-Mil) CY54FCT2244TLM 20-Pin 20-Lead CY54FCT2244TDM
transistor DA3 307

Abstract: DA3 307
Text: 4 DD4 d 5 DD5 d 6 DD6 d 7 DA4 d 10 DA3 d 11 18 d d , DA5 ' I DA5 (LSB) (LSB) 27 DA3 ' r 2 DA4 ?2 ZD v r e f 1 21 ZD V in , ) 19 ■374175b 002571? 307


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PDF DS04-28500-5E MB40166/M B40176 MB40166 MB40176 MB40176 DG2S71S transistor DA3 307 DA3 307
2001 - DA 606

Abstract: SB-24
Text: DB4 V0 DC1 DO/I TESTB V10 V8 DC3 DC5 CPH V2 V4 V6 TEG DA1 DI/O DA3 DA5 DB3 DB1 DB5 DC0 LOAD DVDD V9 , DB0 DB0 DB0 DA5 DA5 DA5 DA4 DA4 DA4 DA3 DA3 DA3 DA2 DA2 DA2 DA1 DA1 DA1 DA0 DA0 DA0 DI/O DI/O DI/O , 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318


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PDF JBT6L77-AS JBT6L77-AS 240-channel-output 18-bit DA 606 SB-24
2001 - 61175

Abstract: toshiba sa30 SC80 SC10 SA80 SA11 SA10 JBT6L78-AS JBT6L77-AS SB75
Text: V5 V3 V1 DB5 DB3 DB1 DA5 DA3 DA1 DI/O TEG AVDD Alignment mark 6 6 3 3 3 , V6 -560.0 -606 96 DA3 3095.0 -606 21 DC4 -4295.0 -606 59 V6 -500.0 -606 97 DA3 3165.0 -606 22 DC3 -4135.0 -606 60 V5 -360.0 -606 98 DA3 3235.0 -606 23 DC3 -4065.0 -606 61 V5 -300.0 -606 99 , 306 SB55 -2174.0 481 347 SA69 -4224.0 621 266 SA42 -174.0 481 307


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PDF JBT6L77-AS JBT6L77-AS 240-channel-output 18-bit 61175 toshiba sa30 SC80 SC10 SA80 SA11 SA10 JBT6L78-AS SB75
2000 - dab circuitry

Abstract: No abstract text available
Text: GO TO TABLE OF CONTENTS DA3 Series DA3 Subminiature 0.1 amp Features s Long life coil , DA3 Series Subminiature 2 PCB Footprint Dimensions: Inches (mm) 0.250 (6.35) C 0.063 , lengths are dimensioned from centerline of switch mounting hole (see drawing). Rating DA3 0.1 , DIN Code K 2-7 DA3 Series Subminiature Materials Ordering Actuators Separately , customizing forms and lengths. To order actuators for the DA3 Series Subminiature Switch, use the actuator


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PDF
2001 - SA80

Abstract: 42760 sc78 32240 lcd toshiba sa30 SC80 SC10 SA11 SA10 JBT6L78-AS
Text: V2 V4 V6 TEG DA1 DI/O DA3 DA5 DB3 DB1 DB5 DC0 LOAD DVDD V9 DC2 DC4 TEG U/D V1 V3 , DA4 2935.0 -606 20 DC4 -4365.0 -606 58 V6 -560.0 -606 96 DA3 3095.0 -606 21 DC4 -4295.0 -606 59 V6 -500.0 -606 97 DA3 3165.0 -606 22 DC3 -4135.0 -606 60 V5 -360.0 -606 98 DA3 3235.0 -606 23 , 481 347 SA69 -4224.0 621 266 SA42 -174.0 481 307 SC55 -2224.0 621


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PDF JBT6L77-AS JBT6L77-AS 240-channel-output SA80 42760 sc78 32240 lcd toshiba sa30 SC80 SC10 SA11 SA10 JBT6L78-AS
2010 - SSTE32882

Abstract: dba1 CMR23 cmr21 SN74SSQE32882
Text: registers need to be presented on DA3 , DA4, DBA0, and DBA1. For more details on CMR commands and how to use , DBA1 DBA0 DA4 DA3 0 1 1 1 0 0 0 1 Wait 8 clock cycles CMR23 Disabled C/A Tracking of Yn DBA2 DA2 DA1 DA0 DBA1 DBA0 DA4 DA3 1 0 0 1 , DA0 DBA1 DBA0 DA4 DA3 0 0 0 1 1 0 0 0 DBA1 DBA0 DA4 DA3 PA<3> PA<2> PA<1> PA<0> DBA1 DBA0 DA4 DA3 PA<7> PA<6> PA<5> PA


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PDF SCAA108 SN74SSQEA32882 SN74SSQEA32882 SN74SSQE32882 SSTE32882-compliant SSTE32882 dba1 CMR23 cmr21 SN74SSQE32882
2009 - SSTE32882

Abstract: TI ddr3 controller RC12 RC10 RC11 SCAA102
Text: registers must be presented on DA3 , DA4, DBA0, and DBA1. 1.1 Control Word Decoding The values to be programmed into each control word are presented on signals DA3 , DA4, DBA0, and DBA1 simultaneously with the , to the clock timing (RC2 bit DBA1, RC6 bit DA4, and RC10 and RC11 bits DA3 and DA4), this settling , Feedback 1 DA4 DA3 B Outputs A Outputs Floating Outputs Outputs Inversion 0: disabled* 0 , When MIRROR = HIGH 0: IBT off* 1: IBT on DA4 IBT 0: 100 W* 1: 150 W DBA0 DA3 DA4


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PDF SCAA102 SSTE32882 TI ddr3 controller RC12 RC10 RC11 SCAA102
4X40 LCD

Abstract: LCD 4x40 HT16C22 HT68F30
Text: 11 DA3 10 DA2 9 DA1 8 DA0 B1, B0 : LCD blinking frequency control bit. 00 , voltage adjustment DA3 ~DA0 : Adjust the VLCD output voltage as shown in the table below: 2 , , note the DA3 ~DA0 bit setup. DE Special Notes VE When VLCD connects to VDD through a resistor, the DA3 ~DA0 bits must be set to 0000. 0 0 0 1 When VLCD directly connects to VDD, the DA3 ~DA0 bits must not be set to 0000. The external MCU can detect the VLCD voltage. The bias


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PDF HT16C22 D/NHA0255E HT16C22 HT16C22. 32kHz 240kW 25kWh. 4X40 LCD LCD 4x40 HT68F30
1984 - d6326

Abstract: PC1382 tda 5511 DA1 7824 16DIP300 TDA 4141 PD6336 PD6326C 6326 PD6325
Text: PD6326, PD6336 VCC 1 DATA IN 2 16 VDD 15 DA1 N.C. 3 CLOCK 4 LOAD 5 14 DA2 13 DA3 12 DA4 , OUT 7 VSS 8 VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 VDD DA1 DA2 DA3 DA4 , /A !2 !2 DA4 D/A D/A !3 !3 DA3 D/A D/A !4 !4 DA2 D/A D/A , DA1 × 0 1 0 DA2 × 0 1 1 DA3 × 1 0 0 DA4 × 1 0 , 0 0 0 1 DA1 0 0 1 0 DA2 0 0 1 1 DA3 0 1 0 0


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PDF PD6325 PD6325 PD6325C, 6325G PD6326C PD6335C, 6335G PD6336C 12DATA VCC15 d6326 PC1382 tda 5511 DA1 7824 16DIP300 TDA 4141 PD6336 PD6326C 6326
2007 - 8930

Abstract: 12PIN LV4150W TP40 XENB
Text: No file text available


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PDF EN8930A LV4150W LV4150W 8930 12PIN TP40 XENB
IS1526

Abstract: AD6 8ADS PCL 27 ssd2425
Text: – GND D3 ■15 PA5>[_ 18 23 »A4 19 22 VSc 20 21 ] VDD ] DA4 ] DA3 ] DA2 ] DAI , BSWO [ 42 H VDD ST63P07 BSW1 [ 2 41 2 DA4 BSW2 [ 3 40 3 DA3 BSW3 [ 4 , | 41 ^ DA4 40 p DA3 39 p DA2 ! 38 ]DAl 37 0UT1 36 ] IRIN ] PLLOUT 3* ]PLLIN S 33 ] pC7 32 ] PC6 31 , ] PA3 BSWO [ BSW1 [ 1 2 ST63P18 48 47 H VDD J 0A4 BSW2 [ 3 46 : DA3 BSW3 [ 4 45 3 DA2 , 20 21 ] VDD DA4 ] DA3 ]DA2 ]DA1 ] OUT1 ] IRIN ] PC7 (B) ] PC6 (G) ]PC5 (R) ] PC3 (BLANK) PC2


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PDF ST63PXX ST63P06/7/8 ST63P16/7/8 ST63P26/7/8 ST63P36/7/8 ST63P56/7/8 ST63XX SHRINK/48 ST63P16/7/8, ST63P36/7/8 IS1526 AD6 8ADS PCL 27 ssd2425
1994 - code OB3

Abstract: diode ob3 ob3 diode
Text: DA3 OA3 OB3 OEB DB3 DA0 OA0 OB0 DB0 DA1 OA1 OB1 DB1 DA2 OA2 OB2 DB2 DA3 OA3 DB3 OB3 FCT240T­1 FCT240T­4 Pin Configurations DIP/SOIC/QSOP , 6 15 DB1 DB3 OB2 7 14 OA2 DA3 8 13 DB2 9 12 OA3 10 , VCC OB2 7 14 OA2 OEB DA3 8 13 DB2 OB3 9 12 OA3 GND 10 11 DB3 DA3 OB 2 DA2 OB 1 DA1 OEB GND 3 2 1 20 19 VCC 19 OB3 7 6 5


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PDF CY54/74FCT240T CY54/74FCT244T SCCS017 FCT244 code OB3 diode ob3 ob3 diode
1984 - TDA 7824

Abstract: TDA 4141 d6326 16DIP300 PC1406 PD6326C PD6326 TDA 4011 16SOP300 PC1382
Text: , PD6336 VCC 1 DATA IN 2 16 VDD 15 DA1 N.C. 3 CLOCK 4 LOAD 5 14 DA2 13 DA3 12 DA4 VCC , VSS 8 VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 VDD DA1 DA2 DA3 DA4 DA5 , D/A D/A !3 !3 DA3 D/A D/A !4 !4 DA2 D/A D/A !5 !5 DA1 D , 0 1 1 DA3 × 1 0 0 DA4 × 1 0 1 Don't Care × 1 1 0 , DA2 0 0 1 1 DA3 0 1 0 0 DA4 0 1 0 1 DA5 0 1 1


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PDF PD6325 PD6325 PD6325C, 6325G PD6326C PD6335C, 6335G PD6336C 12DATA VCC15 TDA 7824 TDA 4141 d6326 16DIP300 PC1406 PD6326C PD6326 TDA 4011 16SOP300 PC1382
2006 - SSTE32882KB1

Abstract: XLXX DDR3U-1600 QAA10 DDR3 rdimm pcb layout DDR3U QAA15
Text: 3 DA0.DA2, DBA2 DA0-DA2, DA10, DA12, DRAS, DCAS, DWE 4 DA3 , DA4, DBA0, DBA1 B-Enable , QACKE1 VSS QAODT0 VDD QAODT1 DA3 DA14 DA15 DCS0 DBA2 DA11 DA6 FBIN RSVD FBIN 4 5 6 , VDD DA3 DA15 Y0 Y0 Y2 Y2 FBOUT FBOUT SSTE32882KB1 7326/3 SSTE32882KB1 1.25V/1.35V , QABA1 VDD QABA0 VSS VDD QCS1 QACKE0 VSS QCS0 VDD QACKE1 VSS QAODT0 VDD QAODT1 DA3 DA14 , VSS VDD VSS VDD VSS VDD VSS VDD DA3 DA15 Y0 Y0 Y2 Y2 FBOUT FBOUT SSTE32882KB1


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PDF 28-bit 26-bit 32882KB1 SSTE32882KB1 SSTE32882KB1 XLXX DDR3U-1600 QAA10 DDR3 rdimm pcb layout DDR3U QAA15
Not Available

Abstract: No abstract text available
Text: 3 DA0.DA2, DBA2 4 DA0-DA2, DA10, DA12, DRAS, DCAS, DWE DA3 , DA4, DBA0, DBA1 B-Enable , QACKE1 VSS QAODT0 VDD QAODT1 DA3 DA14 DA15 DCS0 DBA2 DA11 DA6 FBIN RSVD FBIN 4 5 6 , VDD DA3 DA15 Y0 Y0 Y2 Y2 FBOUT FBOUT SSTE32882KB1 7326/3 SSTE32882KB1 1.25V/1.35V , QABA1 VDD QABA0 VSS VDD QCS1 QACKE0 VSS QCS0 VDD QACKE1 VSS QAODT0 VDD QAODT1 DA3 DA14 , VSS VDD VSS VDD VSS VDD VSS VDD VSS VDD DA3 DA15 Y0 Y0 Y2 Y2 FBOUT FBOUT


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PDF 28-bit 26-bit 32882KB1 SSTE32882KB1
MB90098APF

Abstract: FPT-28P-M17 MB90098A Fujitsu fm0
Text: 1 28 DA0 SIN 2 27 DA1 SCLK 3 26 DA2 VSS 4 25 DA3 DCLKI , display output. Input a low level signal to set the display output ( DA3 -0, VOBA, DB3-0, VOBB pin output) to inactive level. The active level is programmable. DA3 DA2 DA1 DA0 25 26 27 28 , RESET VSYNC Display control HSYNC EVEN display output control DA1 DA2 DA3 VOBA CS , ns 3 ns Remarks *1 *3 *1 *3 *2 *3 *2 *3 6 tDOFF DA3 to DA0, VOBA


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PDF DS04-28827-1E MB90098A MB90098A MB90098APF FPT-28P-M17 Fujitsu fm0
2001 - color graphic lcd

Abstract: lcd display screen FPT-28P-M17 MB90098A MB90098APF
Text: 25 DA3 DCLKI 5 24 VOBA VSS 6 23 VSS VDD 7 22 DCLKO TCLKI , level signal to set the display output ( DA3 -0, VOBA, DB3-0, VOBB pin output) to inactive level. The active level is programmable. DA3 DA2 DA1 DA0 25 26 27 28 Output A Color signal , DA2 DA3 VOBA CS SIN SCLK Serial input control BUSY Command ROM transfer control , ns Remarks *1 *3 *1 *3 *2 *3 *2 *3 6 tDOFF DA3 to DA0, VOBA DB3 to DB0, VOBB


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PDF DS04-28827-1E MB90098A MB90098A F0106 color graphic lcd lcd display screen FPT-28P-M17 MB90098APF
2003 - K4C89093AF

Abstract: No abstract text available
Text: No file text available


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PDF K4C89093AF 800Mbps 400Mhz) 800Mb1 8K/32ms 800Mbps/pin 400MHz, 667Mbps/pin 333MHz, K4C89093AF
2003 - Not Available

Abstract: No abstract text available
Text: =2 DS (input) QS (Output) WL=3 DQ (Input) BL =4 Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3 Da0 Da1 Da2 Da3 , Dd0 Dd1 DS (input) QS (Output) WL=3 DQ (Input) WL=3 Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3 Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3 Dc0 Dc1 Dc2 Dc3 Dd0 Dd1 Note : lRC to the same bank must be satisfied , =4 WL=4 DQ (input) Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3 Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3 Dc0 Dc1 QS (Output , be satisfied. WL=4 Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3 Da0 Da1 Da2 Da3 Db0 Db1 Db2 Db3 Dc0 Dc1


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PDF K4C89183AF 288Mb 800Mbps 400Mhz) 8K/32ms 800Mbps/pin 400MHz, 667Mbps/pin 333MHz,
2001 - DA1 7809

Abstract: 7809 MARKING pin out of 7812 L5601 marking sbn DA312 N9934
Text: DA1 DA2 DA3 8 V 15 DD Vss 12 5 MODE 2 6 7 3 SBN DECODER PTIF 9 PROGRAM , OSC IN 16 1 OSC OUT Pin Configuration OSC OUT MODE SBN NC DA0 DA1 DA2 DA3 1 2 3 4 5 6 7 8 16 , signals. SBN 3 I NC DA0 DA1 DA2 DA3 4 5 6 7 8 - I PTIF 9 I LDN 10 O , =200mV P-P KSI-W008-000 4 SL5601/P Baseset Frequencies (Mode=High) Channel Data CH DA3 1 2 3 4 5 , SL5601/P Handset Frequencies (Mode=Low) Channel Data CH DA3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 0 0


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PDF SL5601/P SL5601/P 46/49MHz 24MHz) 60MHz 200mVP-P SL5601 SL5601P SL5601 DA1 7809 7809 MARKING pin out of 7812 L5601 marking sbn DA312 N9934
2002 - AK2570

Abstract: No abstract text available
Text: RVPD AD1 (8bits) RTMP Oscillator DA3 (8bits) AD2 (8bits) RINT T-SENSE VPDIN , signal to SHUTDN-pin makes that DAOUT2-pin outputs `0V (min.)'. DA3 , ALMOUT, This block outputs the , DA1 ~ DA3 are controlled. It is realized that the constant emission intensity of the LD is , D5 D4 D3 D2 D1 D0 Holding the data for DA3 RINT 100 X ~ X X X X D4 D3 D2 D1 D0 , . 5. Alarm circuit ( DA3 , ALMOUT, Comparator and ALM Timing Generator) I) Mode setting The alarm


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PDF AK2570] AK2570 AK2570 MS0115-E-00>
T6C58

Abstract: 1D307
Text: , DB2, DC2, DD2, DE2. DF2 DA3 , D83, D O . DD3, DE3. DF3 DO/I. Dl/O (Output) (·)D 1/D 307 : U /D »hig , D (3m-2) DA2, DB2, DC2, DD2, DE2, D F2 . D (3m-1) DA3 , DB3, DC3, DD3, DE3, D F3 . D (3m) w , . DB1. DC1. DD1. DE1, DF1 DA2, DS2, DC2, 002, DE2, DF2 DA3 . DB3, DC3, DD3. DE3, DF3 DO/I, Dl/O


OCR Scan
PDF T6L02 T6L02 309-channel-output 55MHz. T6C58 1D307
2006 - DDR3U

Abstract: 2yn1 DDR3 rdimm pcb layout SSTE32882 SSTE32882KA1 DDR3U-1600 da-15 pinout DDR3 pcb layout DDR3 layout dba1
Text: 3 DA0.DA2, DBA2 DA0-DA2, DA10, DA12, DRAS, DCAS, DWE 4 DA3 , DA4, DBA0, DBA1 B-Enable , QACKE1 VSS QAODT0 VDD QAODT1 DA3 DA14 DA15 DCS0 DBA2 DA11 DA6 FBIN RSVD FBIN 4 5 6 , VDD VSS VDD DA3 DA15 Y0 Y0 Y2 Y2 FBOUT FBOUT SSTE32882KA1 7314/8 SSTE32882KA1 , DA3 DA14 DA15 DCS0 DBA2 DA11 DA6 FBIN FBIN DCS2 4 5 6 7 8 9 10 11 , VSS VDD DA3 DA15 Y0 Y0 Y2 Y2 FBOUT FBOUT SSTE32882KA1 7314/8 SSTE32882KA1 1.25V


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PDF 28-bit 26-bit 32882KA1 SSTE32882KA1 DDR3U 2yn1 DDR3 rdimm pcb layout SSTE32882 SSTE32882KA1 DDR3U-1600 da-15 pinout DDR3 pcb layout DDR3 layout dba1
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