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A8D15RA29C (4-1437269-1) TE Connectivity Ltd .100, .125, .156 Centerline Modified Bellows Connectors; A8D15RA29C=CE100 SDR D15 RA 13 ( Tyco Electronics )

D8-D15 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
MSM531000

Abstract: 07FFFF MSM27C402CZ MSM533202E MSM OKI 1rom 27C401CZ
Text: ) EPROM :EPROM4Mbit,x8/x16x16ROM x32x8 1) (D0-D7) ( D8-D15 ) ROM 1) #1 #2 00000 , . D8-D15 x32 D0-D15 D16-D31 ROM/OTP() - (FD) 97.01.27 MSM TACC= V


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PDF MSM531000A/MSM531000B) MSM531000A 1C0000-1FFFFF) MSM27C402CZ 140000-17FFFF) 100000-13FFFF) MSM533202E MSM531000 07FFFF MSM27C402CZ MSM533202E MSM OKI 1rom 27C401CZ
1995 - AT29C040

Abstract: PCMCIA SRAM Card AT5FC008 60AAAA
Text: any typical PCMCIA SRAM or ROM card. Block Diagram VCC D0-D15 R R WE OE WP D8-D15 , AT29C040 CE S0 VSS VCC D8-D15 A0-A18 WE OE S1 VSS VCC A0-A10 CD1 CD2 A0-A18 CE CARD DETECT WE OE D0-D7 A0-A18 CE WE S2 VSS VCC OE D8-D15 S3 VSS VCC , S14 VSS VCC A0-A18 CE WE OE D8-D15 S15 VSS VCC AT5FC008 Absolute Maximum Ratings , access. D8-D15 should be ignored. Odd order bytes present invalid data. Refer to the Attribute Memory


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PDF 68-Pin 60AAAA 60AAAB 70AAAA 70AAAB AT5FC008 AT5FC008-20 AT29C040 PCMCIA SRAM Card AT5FC008 60AAAA
1996 - AT5FC256

Abstract: PCMCIA SRAM Card AT29C010A AT5FC256-20 PCMCIA SRAM
Text: access. D8-D15 should be ignored. Odd order bytes present invalid data. Refer to the Attribute Memory , VIH levels. Pins REG CE2 CE1 OE WE A0 D8-D15 D0-D7 Read (x8) (1) VIH , access - Even. In this x8 mode, D0-D7 contain the "even" byte (low byte) of the x16 word. D8-D15 are , . This is accomplished internal to the card by transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain the "odd" byte (high byte) of the x16 word


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PDF 68-Pin AT5FC256 AT5FC256-20 AT5FC256 PCMCIA SRAM Card AT29C010A AT5FC256-20 PCMCIA SRAM
1998 - MSM531000

Abstract: MASKROM 07FFFF MSM27C402CZ MSM533202E 1rom
Text: ) EPROM :EPROM4Mbit,x8/x16x16ROM x32x8 1) (D0-D7) ( D8-D15 ) ROM 1) #1 #2 00000 , . D8-D15 x32 D0-D15 D16-D31 ROM/OTP() - (FD) 97.01.27 MSM TACC= V


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PDF MSM531000A/MSM531000B) MSM531000A 1C0000-1FFFFF) MSM27C402CZ 140000-17FFFF) 100000-13FFFF) MSM533202E MSM531000 MASKROM 07FFFF MSM27C402CZ MSM533202E 1rom
1995 - C5555

Abstract: AT5FC001 AT29C010A AT5FC001-20 230D0
Text: memory access. D8-D15 should be ignored. Odd order bytes present invalid data. Refer to the Attribute , either VIL or VIH levels. Pins REG CE2 CE1 OE WE A0 D8-D15 D0-D7 Read (x8) (1 , . Byte access - Even. In this x8 mode, D0-D7 contain the "even" byte (low byte) of the x16 word. D8-D15 , x16 word. This is accomplished internal to the card by transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain the "odd" byte (high byte) of the


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PDF 68-Pin AT5FC001-20 AT5FC001 C5555 AT5FC001 AT29C010A AT5FC001-20 230D0
1995 - AT29C040A

Abstract: PCMCIA SRAM Card AT5FC002 AT5FC002-20
Text: low. D0-D7 are active during attribute memory access. D8-D15 should be ignored. Odd order bytes , WE A0 D8-D15 D0-D7 Read (x8) (1) VIH VIH VIL VIL VIH VIL High Z , contain the "even" byte (low byte) of the x16 word. D8-D15 are inactive. 2. Byte access - Odd. In this , the card by transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain the "odd" byte (high byte) of the x16 word. D0-D7 are inactive. A0 = X. 4. Word


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PDF 68-Pin 00AAAA 00AAAB 10AAAA 10AAAB AT5FC002 AT5FC002-20 AT29C040A PCMCIA SRAM Card AT5FC002 AT5FC002-20
1998 - EPROM

Abstract: 00000H
Text: /x16x16ROM x32x8 1) (D0-D7) ( D8-D15 ) ROM 1) #1 #2 00000 HH #3 #4 HH x16 D0-D7 #5 #6 HH #7 #8 HH XX XXXX LOT No. D8-D15 x32


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PDF x8/x16 x8/x16x16ROM x32x8 D8-D15) D8-D15 D0-D15 D16-D31 0-D15 EPROM 00000H
CMS210 memory

Abstract: card 60-pin
Text: PROGRAMMING INHIBIT SIGNATURE MODE CË O E /V p p V cc A9 AO D0-D7 D8-D15 VlL V|L V cc Xt X Data Out Data , A0-A15 O E / Vpp E DO-D7 A0-A15 O E /V p p E D8-D15 M2t 64K x 8 M1 64K x 8 VC C VCC VSS 59 , VC C 1A 2A 1B 2B O E /V p p DO- D7 E Ml 64K x 8 A0-A15 O E /V p p D8-D15 E M2t 64K x 8 , D8-D15 E M 4t 64K x 8 Vcc VSS V CC V ss Vcc Vss 29,30,32 ^ ci ^ C5 0.1 l»F t , 1Y1 2A 1Y2 1B 1Y3 2B 2Y0 2Y1 1Q 2Y2 2Y3 2G OE/Vpp E D0-D7 M1 64K x 8 51/Vpp E D8-D15 M2t 64K x


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PDF CMS209, CMS210, CMS212, CMS213, CMS214, CMS216 SMN8209A-JUNE 1991-REVISED 16-Bit 60-Pin CMS210 memory card 60-pin
1995 - AT5FC004

Abstract: PCMCIA SRAM Card A0-A21 AT29C040A AT5FC004-20 "ATMEL FLASH memory"
Text: driven low. D0-D7 are active during attribute memory access. D8-D15 should be ignored. Odd order bytes , WE A0 D8-D15 D0-D7 Read (x8) (1) VIH VIH VIL VIL VIH VIL High Z , contain the "even" byte (low byte) of the x16 word. D8-D15 are inactive. 2. Byte access - Odd. In this , the card by transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain the "odd" byte (high byte) of the x16 word. D0-D7 are inactive. A0 = X. 4. Word


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PDF 68-Pin 00AAAA 00AAAB 10AAAA 10AAAB AT5FC004 AT5FC004-20 AT5FC004 PCMCIA SRAM Card A0-A21 AT29C040A AT5FC004-20 "ATMEL FLASH memory"
block diagram of 80386dx microprocessor

Abstract: 80486 microprocessor pin out diagram sl90 SL9030 via flexset VIA SL9020 SL9020
Text: from the MD8-MD15 bus to the D8-D15 bus or from the D8-D15 bus to the MD8-MD15 bus via the M D /D high , transferred from SD8-SD15 Bus to D8-D15 Bus or from D8-D15 Bus to SD8-SD15 Bus via the S D /D high byte buffer , allow data to be driven onto the selected bus. Input data latches are provided on both D8-D15 and SD8-SD15 busses. Asserting DLAT high enables D8-D15 data to pass through latches. Deasserting DLAT latches D8-D15 data. Latched D8-D15 data or D8-D15 data is selected by asserting/deasserting NDLATEN. The low to


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PDF SL9020 80386SX, 80386DX, 80486-based 80386SX SL9020 block diagram of 80386dx microprocessor 80486 microprocessor pin out diagram sl90 SL9030 via flexset VIA SL9020
Not Available

Abstract: No abstract text available
Text: . D0-D7 are active during at tribute memory access. D8-D15 should be ignored. Odd order bytes present , AO D8-D15 D0-D7 V ih V ih V ih V ih V ih V ih V ih V il V il V il V il V ih V il V , . In this x8 mode, D0-D7 contain the "even" byte (low byte) of the x l6 word. D8-D15 are inactive. 2 , accomplished internal to the card by transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain the "odd" byte (high byte) o f the x l6 word. D0-D7 are inactive


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PDF 68-Pin 10AAAA 10AAAB AT5FC002
1D4H

Abstract: PD6467 Hsync Vsync RGB
Text: D7-D0 MSB D15-D8 D7-D0 DATA D0-D7 D8-D15 LSB D0-D7 D8-D15 CLK CS CS , D0-D7 D8-D15 D8-D15 MSB LSB CLK CS RAM VC2 CS 000H-0FFH100H-1FFH , D0-D7 D7-D0 D7-D0 D8-D15 D8-D15 00H-FEH 00H-FEH D7-D0 D0-D7 MSB LSB CLK , D8-D15 D8-D15 D0-D7 00H-FEH FFH MSB LSB CLK CS CS CS 50 S14455JJ2V0DS


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PDF PD6467 5121228VTR PD6467CMOS PD6467RAM PD646164626466 512ROM S14455JJ2V0DS 1D4H PD6467 Hsync Vsync RGB
82385

Abstract: TNR*G TC55187 gg70 DP1 TOS TC55187T25 tnrg TC55187T-30 al2v BS5B5
Text: -25, TC55187T-30 BLOCK DIAGRAM 1 —WAY 8,192 words X 18 bits (MODE : Va) D0-D7/Dp0 D8-D15 /Dpl 2-WAY 4,096 words X 18 bits (MODE : Vih) D0-D7/Dp0 MODE = V,H C> D8-D15 /Dpl mm AO-11 Et T5 D0-7 m OpO , OPERAT ON WIS WE5 Oî B5B B5T CHIP D0-D7 DpO D8-D15 Dpi - - - H H Deselect Open Open H H H H - - , 18 x 2) INPUTS OPERA TION WES WEB CE 5EÏ ESO SïT way-A way - 8 D0-D7 DpO D8-D15 Dpi - , coincident with or after WE transition, Lower Byte Outputs (D0-D7, DpO) or Upper Byte Outputs ( D8-D15 , Dpi


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PDF TC55187T TC55187Tâ TC55187T-25, TC55187T-30 QFJ52â 82385 TNR*G TC55187 gg70 DP1 TOS TC55187T25 tnrg TC55187T-30 al2v BS5B5
1998 - DIP40

Abstract: MSM534052E TSOP44
Text: No file text available


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PDF MSM534052E 144-Word 16-Bit 288-Word 16Word MSM534052E262 100ns 40DIP DIP40-P-600) DIP40 MSM534052E TSOP44
1996 - "ATMEL FLASH memory"

Abstract: PCMCIA SRAM Card AT29C010A AT5FC512 AT5FC512-20 PCMCIA Flash Memory Card 512K JEIDA 3 68-pin 38D12
Text: driven low. D0-D7 are active during attribute memory access. D8-D15 should be ignored. Odd order bytes , WE A0 D8-D15 D0-D7 Read (x8) (1) VIH VIH VIL VIL VIH VIL High Z , "even" byte (low byte) of the x16 word. D8-D15 are inactive. 2. Byte access - Odd. In this x8 mode , transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain , mode D0-D7 contain the "even" byte while D8-D15 contain the "odd" byte. A0 = X Memory Card Program


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PDF 68-Pin AT5FC512 AT5FC512-20 "ATMEL FLASH memory" PCMCIA SRAM Card AT29C010A AT5FC512 AT5FC512-20 PCMCIA Flash Memory Card 512K JEIDA 3 68-pin 38D12
4801h

Abstract: ic 6462 Hsync Vsync RGB VC2011
Text: D8-D15 LSB D0-D7 D8-D15 CLK CS CS . DATA D15-D8 D7-D0 D7-D0 DATA D0-D7 D8-D15 D8-D15 MSB LSB CLK CS RAM VC2 CS , D7-D0 D0-D7 D15-D8 D7-D0 D7-D0 D7-D0 D0-D7 D8-D15 D8-D15 D0-D7 PD646100H-FEH , D15-D8 D7-D0 D7-D0 D7-D0 D0-D7 D8-D15 D8-D15 D0-D7 FFH PD646100H-FEH 7FH PD646200H


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PDF PD6461 1224VTR PD6461, 6462VTR 6462RGB 6462RAM 256PD6461128PD6462ROM S13320JJ2V0DS00 4801h ic 6462 Hsync Vsync RGB VC2011
AAAB

Abstract: No abstract text available
Text: driven low. D0-D7 are active during at tribute memory access. D8-D15 should be ignored. Odd order bytes , Vil or Vih OE levels. WE AO D8-D15 D0-D7 2 CEi Read (x8) Read (x8) Read (x8) Read (x 1 6 , contain the "even" byte (low byte) of the xl6 word. D8-D15 are inactive. 2. Byte access - Odd. In this x8 , card by transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain the "odd" byte (high byte) of the xl6 word. D0-D7 are inactive. AO = X. 4. Word access. In


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PDF P05555 10AAAB 10AAAA AT5FC004 AT5FC004-20 AAAB
Not Available

Abstract: No abstract text available
Text: are active during at tribute memory access. D8-D15 should be ignored. Odd order bytes present invalid , levels. WE AO D8-D15 D0-D7 Pl ns Read-Only 2 CEi Read (x8) ^ Read (x8) ^ Read (x8) ^ Read (x , - Even. In this x8 mode, D0-D7 contain the "even" byte (low byte) of the xl6 word. D8-D15 are , . This is accomplished internal to the card by transposing D8-D15 to D0-D7. D8-D15 are inactive. 3. Odd byte only access. In this x8 mode, D8-D15 contain the "odd" byte (high byte) of the xl6 word


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PDF AT5FC008 AT5FC008-20
1998 - MSM538052E

Abstract: TSOP44
Text: No file text available


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PDF MSM538052E 288-Word 16-Bit 576-Word 16Word MSM538052E524 100ns 42DIP DIP42-P-600) MSM538052E TSOP44
2010 - D9-D15

Abstract: 1391n RD1073 LC4256ZE LCMXO256C-3T100C
Text: W 0x09 0x1 Output register ports 7 (Data bit D7. Data bits D0-D6 and data bits D8-D15 are , bits D4-D7.Data bit D0-D3 and D8-D15 are ignored). W 0x14 0xf Output register ports 8-11 , (Data bits D0-D7.Data bit D8-D15 are ignored). W 0x17 0xff Output register ports 8-15 (Data bits D8-D15.Data bit D0-D7 are ignored). W 0x18 0xff Output register ports 0-15. W , ). R 0x09 0x0 Input register ports 7 (Data bit D7. Data bits D0-D6 and data bits D8-D15


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PDF RD1073 LCMXO256C-3T100C LC4256ZE-5TN100C 1-800-LATTICE D9-D15 1391n RD1073 LC4256ZE
UEC-14

Abstract: No abstract text available
Text: - Function Table CE UE BYTE D1S A-1 D8-D15 DOUT Moda LSB MSB H X X X Hl-Z Hi-Z Hi-Z _ L H X X Hi-Z Hi-Z L L H Input Inhibited DO - D7 D8-D15 16-Bit AO A19 L L L L DO - D7 Hi-Z 8-Bit L L L H D8-D15


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PDF MSM531622C 576-Word 16-Bit 152-Word ssMSM531622C UEC-14
Bt492

Abstract: BtI07 Q4 D8 BROOKTREE ramdac d25 to d37 D0-D39
Text: are configured to support overlays (SI = 1 and SO = 0). D0-D7, D8-D15 , D16-D23, and D24-D31 are , D8-D15 Ql D16-D23 D24-D31 Q2 Q3 Bt424 SI =X, S0= 1 D0-D7 D8-D15 D16-D23 Bt424 QO Ql Q2 S1=X, S0=1 D24-D31 Q3 D0-D7 QO D8-D15 D16-D23 D24-D31 Bt424 Ql Q2 Q3 S1 = X, S0=I , D8-D15 Qi D16 - D23 D24-D31 Q2 Q3 Bt424 SI =X, S0= 1 D32 - D39 Q4 D0-D7 Bt424 QO D8-D15 D16-D23 Ql Q2 S1 = 1,S0 = 0 D24-D31 Q3 D32 - D39 D0-D7 QO D8-D15 Bt424 Ql


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PDF Bt424 68-pin 40-bit 16-bit 20-bit 10-bit Bt401/403 Btl09 Btl07 Bt492 Bt492 BtI07 Q4 D8 BROOKTREE ramdac d25 to d37 D0-D39
1995 - VC2011

Abstract: VC2023 1D4H MSB 017h VC20-23 48d20 1223 014H S3B01 1E7H P20GM-65-300B-2
Text: D7-D0 MSB D15-D8 D7-D0 DATA D0-D7 D8-D15 LSB D0-D7 D8-D15 CLK CS CS 49 µPD6466 . DATA D15-D8 D7-D0 D7-D0 DATA D0-D7 D8-D15 D8-D15 MSB LSB CLK CS RAM VC2 CS 000H-0FFH100H-1FFH 50 µPD6466 . , D8-D15 D8-D15 00H-FEH 00H-FEH D7-D0 D0-D7 MSB LSB CLK CS CS . DATA D7-D0 D0-D7 D15-D8 D0-D7 D7-D0 D7-D0 D7-D0 D8-D15 D8-D15 D0-D7 00H-FEH FFH


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PDF PD6466 5121224VTR PD6466CMOS PD6466RAM PD64616462 512ROM S10991JJ2V3DS00 PD6466GS-× 20SOP300mil VC2011 VC2023 1D4H MSB 017h VC20-23 48d20 1223 014H S3B01 1E7H P20GM-65-300B-2
2006 - Not Available

Abstract: No abstract text available
Text: /RAS /WE /OE D0-D7 /UCAS /LCAS D8-D15 D8-D15 A0-A11 D0-D7 D8-D15 /UCAS , /CAS4 A0-A11 /RAS /UCAS /OE A0-A11 /LCAS /WE D8-D15 /RAS D0-D7 A0-A11


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PDF 4Mx16 TS4MES64V6EZ TS4MES64V6EZ 64-bit
1998 - MSM531652F

Abstract: D13- d1
Text: No file text available


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PDF MSM531652F 576-Word 16-Bit 152-Byte 32Byte MSM531652F1 100ns DIP42-P-600-2 MSM531652F-xxRS) MSM531652F D13- d1
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