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CS8411/12 datasheet (2)

Part Manufacturer Description Type PDF
CS8411/12 Cirrus Logic Digital Audio Receivers Original PDF
CS8411-12 Cirrus Logic Digital Audio Receivers Original PDF

CS8411/12 Datasheets Context Search

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1998 - IEC268

Abstract: IC PIN CONFIGURATION OF 74LS32 CS8411 CS8412 IEC958
Text: CS8411/ 12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data from a transmission line , 12 Audio Serial Port 8 MCK 19 D7-D0 24 CS 23 RD/WR M3 M2 M1 M0 17 18 24 23 , F2 12 11 1 14 28 MUX 16 SEL A4/FCK INT Audio Serial Port RS422 Receiver , VIN - 12 12 V Ambient Operating Temperature (power applied) TA -55 125 °C


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PDF CS8411 CS8412 CS8411/12 IEC958, CP-340 CS8411 CS8411/12 IEC268 IC PIN CONFIGURATION OF 74LS32 CS8412 IEC958
CI 74LS32

Abstract: CS12 CS8411 CS8412 digital code lock schematic diagram FCK 111 IEC958
Text: Memory (CS8411) Description The CS8411/ 12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive , Serial Port 26 Configurable Buffer Memory 12 11 13 17 18 24 23 Audio Serial Port Registers 25 15 ERF CBL 24 23 SDATA SCK FSYNC A4/FCK A3-AO D7-D0 CS_ RD/WR M3 M2 M1 MO 26 12 11 14 , , RXN V|N -0.3 VD+ + 0.3 V Input Voltage, RXP and RXN V|N - 12 12 V Ambient Operating Temperature


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PDF CS8411 CS8412 IEC958, CP-340 RS422 CS8411) CS8411/12 CI 74LS32 CS12 CS8412 digital code lock schematic diagram FCK 111 IEC958
SCK 055

Abstract: CS8411 CS8412 AES chips CRC-2
Text: Description: · Monolithic CMOS Receiver · Low-Jitter, On-Chip Clock Recovery The CS8411/ 12 are , EIAJ CP-340 interface standards. The CS8411/ 12 receive data from a transmission line, recover the , 12 11 SDATA SCK M3 M2 M1 M0 19 Clock & Data Recovery D7- D0 23 17 18 24 23 , RXN 12 11 9 IEnable & Status RXP page 33 page 34 6 5 4 C0/ Ca/ Cb/ Cc , , Any Pin except RXP, RXN VIN -0.3 VD+ + 0.3 V Input Voltage, RXP and RXN VIN - 12


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PDF CS8411 CS8412 CS8411/12 CP-340 CP-340 RS422 SCK 055 CS8412 AES chips CRC-2
CS8412

Abstract: DIGITAL AUDIO INTERFACE RECEIVER CP-340
Text: wmm a ma -r Semiconductor Corporation CS8411 CS8412 General Description: The CS8411/ 12 are monolithic CMOS devices which re ceive and decode audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data from a trans mission line, recover the clock and synchronization signals, and de-multiplex the audio and digital data. Dif ferential or single , S 12 / FCK SEL CO/ EO Ca/ E1 Cb/ E2 Cd FO Cd/ F1 Ce/ F2 ERF CBL Crystal


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PDF CS8411 CS8412 CS8411/12 CP-340 256xFs S8411) CS8412 DIGITAL AUDIO INTERFACE RECEIVER
sc9370

Abstract: CS8411 CS8412 CS8412CP 0.047 MFD CAPACITOR cs8412-cs
Text: ) General Description: The CS8411/ 12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data , 0.3 V Input Voltage, RXP and RXN v|n - 12 12 V Ambient Operating Temperature (power applied) ta -55 125 , 5.5 V Supply Current VA+ lA 20 35 mA VD+ ID 7 10 mA Ambient Operating Temperature: CS8411/ 12 -CP or -CS Note 2 TA 0 25 70 °C CS8411/ 12 -IP or-IS -40 85 °C Power Consumption PD 135 248 mW Notes: 2


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PDF CS8411 CS8412 256xFs CP-340 RS422 CS8411) CS8411/12 100-pin sc9370 CS8412CP 0.047 MFD CAPACITOR cs8412-cs
s8412

Abstract: No abstract text available
Text: Option · On-Chip RS422 Line Receiver · Configurable Buffer Memory (CS8411) Description The CS8411/ 12 , /PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data from a transmission line, recover , Clock and Data Recovery De-MUX 12 11 14 28 >SDATA >SCK > FSYNC C U VERF n_ MUX 27 Cd/ Ce/ F1 , with respect to ground) Symbol VD+, VA+ lin VIN VIN Ta Tstg -0.3 - 12 -55 -65 Min Max 6.0 ±10 VD+ + 0.3 12 125 150 Units V mA V V °C °C 1. Transient currents of up to 100 mA will not cause SCR latch-up


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PDF IEC958, CP-340 RS422 CS8411) CS8411/12 CS8411/12 DS61F1 s8412
Not Available

Abstract: No abstract text available
Text: : Features The CS8411/ 12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data from a trans , °C TBD mW ■d Ambient Operating Temperature: CS8411/ 12 -CP o r-C S Note 2 0 Ta C S8411/ 12 -IP or -IS -40 Power Consumption Notes: 25 Pd 2. The ’-CP’ and â , Receiver Circuit 11 12 26 Audio Data Processor 25 CS8411 ^_F 10 (See Appendix A


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PDF CS8411 CS8412 CS8411/12 CP-340 256xFs CP-340 CS8412 RS422
Not Available

Abstract: No abstract text available
Text: Description: The CS8411/ 12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data from a trans , Voltage, RXP and RXN V|N - 12 12 V Ta -55 125 °C Tstg -65 150 °C , CS8411/ 12 -CP or -CS Note 2 Ta -40 CS8411/ 12 -IP or -IS Power Consumption Notes: 0 85 , Frequency (Note 3) CS8411/ 12 -CP or -CS CS8411/ 12 -IP or -IS Note 3 Master Clock Frequency MCK Clock


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PDF CS8411 CS8412 CS8411/12 CP-340 256xFs CP-340 CS8411-CP CS8411-IP
bt 2323

Abstract: sc937-02 CS8412-CS digital code lock schematic diagram Pulse Transformer AES3 CS8412-CP CS8411 CS8412 4B35 PE65612
Text: Memory (CS8411) General Description: The CS8411/ 12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 , - 12 12 V Ambient Operating Temperature (power applied) ta -55 125 °c Storage Temperature Tstg -65 , 35 mA VD+ ID 7 10 mA Ambient Operating Temperature: CS8411/ 12 -CP or -CS Note 2 TA 0 25 70 °C CS8411/ 12 -IP or-IS -40 85 °C Power Consumption PD 135 248 mW Notes: 2. The '-CP' and '-CS' parts


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PDF CS8411 CS8412 256xFs CP-340 RS422 CS8411) CS8411/12 25Mb32M bt 2323 sc937-02 CS8412-CS digital code lock schematic diagram Pulse Transformer AES3 CS8412-CP CS8412 4B35 PE65612
1997 - sc937-02

Abstract: sck 056 CS8411-CS CS8412-CP CS8412-CS SCK 055 CS8411 CS8412 IEC958
Text: Receiver l Low-Jitter, On-Chip Clock Recovery The CS8411/ 12 are monolithic CMOS devices which receive , . The CS8411/ 12 receive data from a transmission line, recover the clock and synchronization signals , INT 9 10 8 26 SDATA 12 SCK 11 FSYNC 13 A4/FCK 6 5 4 3 2 27 C0/ Ca/ Cb/ Cc/ Cd/ Ce/ E0 E1 E2 F0 F1 F2 26 SDATA 12 SCK 11 FSYNC 1 C 14 U 28 VERF 25 15 ERF , VIN -0.3 VD+ + 0.3 V Input Voltage, RXP and RXN VIN - 12 12 V Ambient


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PDF CS8411 CS8412 CS8411/12 IEC958, CP-340 CS8411 sc937-02 sck 056 CS8411-CS CS8412-CP CS8412-CS SCK 055 CS8412 IEC958
CS12

Abstract: CS8411 CS8412 IEC958 biphase mark encoder DS61F1
Text: (CS8411) Description The CS8411/ 12 are monolithic CMOS devices which receive and decode audio data according to the AES/EBU, IEC958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data from , SEL J 27 COI Ca/ Cb / Cd Cd I Ce/ E0 E1 E2 F0 F1 F2 Audio Serial Port 26 Configurable Buffer Memory 12 , CS_ RD/WR M3 M2 M1 MO 26 12 11 14 28 SDATA SCK FSYNC C U VERF Cirrus Logic, Inc. Crystal , Input Voltage, Any Pin except RXP, RXN V|N -0.3 VD+ + 0.3 V Input Voltage, RXP and RXN V|N - 12 12 V


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PDF CS8411 CS8412 IEC958, CP-340 RS422 CS8411) CS8411/12 CS12 IEC958 biphase mark encoder DS61F1
AES3-1985

Abstract: No abstract text available
Text: Option · On-Chip RS422 Line Receiver · Configurable Buffer Memory (CS8411) Description The CS8411/ 12 , /PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 receive data from a transmission line, recover , °C °C -0.3 - 12 -55 -65 VD+ + 0.3 12 125 150 Transient currents of up to 100 mA will not , eter Power Supply Voltage Supply Current Ambient Operating Temperature: VA+ VD+ CS8411/ 12 -CP or -CS CS8411/ 12 -IP or -IS Note 2 (G n d = 0V; all voltages with respect to ground) Min 4.5 Typ 5.0 20 20 0


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PDF IEC958, CP-340 RS422 CS8411) CS8411/12 AES3-1985
Not Available

Abstract: No abstract text available
Text: Features General Description: The C S8411/ 12 are monolithic CMOS devices which re­ ceive and decode audio data according to the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 interface standards. The CS8411/ 12 , VD+ + 0.3 V - 12 12 V -55 Input Voltage, RXP and RXN -0.3 v,N Input Voltage , : CS8411/ 12 -CP or -CS Note 2 ta -40 CS8411/ 12 -IP or -IS Power Consumption Notes: 0 135 , OH Typ V VD+ - 1.0 0.4 1.0 CS8411/ 12 -CP or -CS CS8411/ 12 -IP or-IS Note 3 Master


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PDF S8411/12 CP-340 CS8411/12 256xFs CP-340 CS8411 554b324 100-pin
2000 - 5V REGULATOR 7 PIN AUTOMOTIVE

Abstract: 5V DUAL CS0113
Text: production: Now Next 2 - 6 months Next 7 - 12 months 1 year or more Reference only 2 Your project name , Telephone (401) 885-3600 · FAX: (401) 886-3416 12 /98 CS-0113 Cherry Semiconductor


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PDF CS-8401/8411 CS-0113 5V REGULATOR 7 PIN AUTOMOTIVE 5V DUAL CS0113
CDB4303

Abstract: Audio Transmitters Digital Audio Receivers Digital Audio Transmitters digital analog converter for audio player CDB4328 CS4328
Text: .2-229 CS8401A/2A Digital Audio Transmitters CS8411/ 12 Digital Audio R e c e i v e r s


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PDF CS5326/7/8/9 CS5336/8/9 CS5389 CS5349 16-bit CDB5336/8/9 CS5336/8/9 CDB4303 Audio Transmitters Digital Audio Receivers Digital Audio Transmitters digital analog converter for audio player CDB4328 CS4328
S4327

Abstract: CDB4303 AES17-1991 CS4303 S4331 AES171991 S/PDIF to analog convertor s4328 CP-307 CS4328
Text: . This filter is often on the order of 12 poles and includes all of the problems associated with analog , ACQUISITION SEMINAR Amplitude and Phase Compensation 20 16 Phase (degrees) 12 Analog Filter 8 4 Total Phase 0 -4 -8 Digital Filter - 12 -16 -20 0 2 4 6 8 10 12 14 16 18 20 Frequency (kHz) V 118 Since the phase and amplitude response of , Application Seminar Page 118 DATA ACQUISITION SEMINAR CS4329 Block Diagram DIF0 DIF1 DIF2 20 19 12


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PDF CS4303 CDB4303 CS8411/12 S4327 AES17-1991 S4331 AES171991 S/PDIF to analog convertor s4328 CP-307 CS4328
s4328

Abstract: CS4303 S4329 Digital Audio Receivers CS9233 cs5390 S9233 cs8905 CS4328 reverb audio IC 28pin 3.3
Text: .3-16 C S 8 4 1 1/ 12 Digital Audio R e c e iv e r , .3-21 C S 4 1 12 Wavetable Sample ROM for Music S y n t h e s i s .3-22 C


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PDF CS3310 CS4329 20-bit S9233 s4328 CS4303 S4329 Digital Audio Receivers CS9233 cs5390 cs8905 CS4328 reverb audio IC 28pin 3.3
transformer 9-0-9

Abstract: 6 pin audio transformer 909 TRANSFORMER CS8412 CS8401A CS8402A CS8411 tamura Pulse transformer
Text: No file text available


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PDF TAAA12J3A RS422 CS8401A, CS8402A, CS8411 CS8412 P-A1-13354 ACAD\TTC\A1133541 TTC-350 transformer 9-0-9 6 pin audio transformer 909 TRANSFORMER CS8401A CS8402A tamura Pulse transformer
rystal

Abstract: No abstract text available
Text: No file text available


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PDF 1500VAC 100kHz, 51759-LF3 CS8401, CS8402, CS8411 CS8412. 51759/-LF rystal
DACs

Abstract: CS4281 CS4926 CS5360 18-BIT CS4396
Text: No file text available


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PDF CS5330A/1A CS5335 CS5360 CS5394 CS5396 CS5397 CS4334 CS4340 CS4341 CS4390 DACs CS4281 CS4926 18-BIT CS4396
1999 - AES3

Abstract: cs8420 AN159 CS8415A CS8427 IEC60958 AES-3
Text: . The PLL design of the CS8415A, CS8420, and CS8427 is different from that of the CS8411/ 12 and CS8413 , .15 µF 3900 pF 16 kHz 2.7k .33 µF 8200 pF 8 kHz 1.3k 1.2 µF .033 µF , - = 0.156 ×10 2 5100 200 EQ 16 Select CFILT = 0.15 µF, the nearest standard value. EQ 12


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PDF AN159 CS8415A, CS8420, CS8427 CS8427 AN159REV1 AES3 cs8420 AN159 CS8415A IEC60958 AES-3
2000 - polaroid is 426 owners manual

Abstract: fault codes for ericsson bts ericsson bts Technical specification digital dts dolby 5.1 ic amplifier circuits CS4816 Meridian 9516 EP7212-CV-D ERICSSON BTS training AN120 Dolby Digital Audio Transmitters
Text: . 131 CS5509 . 132 CS5510/11/ 12 /13 . 133 CS5516/20 , . 40 CS8411/ 12 . 41 CS8413/14 . 42 CS8415A , . 12 Consumer/Professional Audio , Interface Transmitter . 40 CS8411/ 12 : Digital Audio Receivers , -Bit A/D Converter . 132 CS5510/11/ 12 /13: 16 and


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PDF CL-CR3470/CR3475 CL-CR3480 CL-CR3710 CL-PS6700 CL-PS7111 CL-PS7500FE CL-SH3365 CL-SH7663 CL-SH8600 CL-SH8668 polaroid is 426 owners manual fault codes for ericsson bts ericsson bts Technical specification digital dts dolby 5.1 ic amplifier circuits CS4816 Meridian 9516 EP7212-CV-D ERICSSON BTS training AN120 Dolby Digital Audio Transmitters
1997 - CS8401A

Abstract: CS8402A CS8412 IEC958 CS8401A-CS 2024D
Text: RS422 Driver 10 11 U 12 V 20 TXN 17 Registers 7 15 Dedicated Channel Status Bits , 1 2 3 4 5 6 7 8 9 A B C D E F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D , Flag 0 23 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 , . CS8401A Status Register Flag Timing 12 DS60F1 CS8401A on flag 0 and flag 1 may cause an interrupt , interrupt pin. Figure 12 illustrates the memory read sequence for buffer mode 0 along with the flag timing


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PDF CS8401A CS8402A IEC958, CP-340 RS422 CS8401A) CS8402A CS8412 CS8401A CS8411A IEC958 CS8401A-CS 2024D
CS8401A

Abstract: CS8402A CS8412
Text: 9 A B C D E F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 4 2 FLAG2 , 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Channel Status Byte 0 1 (Expanded , User Data Channel Status Data Parity Bit Figure 11. CS8401A Status Register Flag Timing 12 , is set, a transition on flag 1 will generate a pulse on the interrupt pin. Figure 12 illustrates , 10 11 12 13 14 15 16 17 18 0B 0C 19 20 21 22 23 0 1


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PDF CS8401A CS8402A CS8401/2A CP-340 CP-340 RS422 CS8402A CS8412
Not Available

Abstract: No abstract text available
Text: 10 11 12 13 14 15 16 17 18 19 20 21 22 23[ 0 Channel Status Byte 1 (Expanded) AO BO , . Figure 12 illustrates the memory read sequence for buffer mode 0 along with the flag timing. The arrows , - ►OBi o C - 2 3 ' 4 5 6 7 11 12 13 14 15 16 , . Address 09 05 06 07 04 t 0B 0A 05 06 (Addresses are in Hex) 07 Figure 12 , Flag 1 Flag 0 C.S. Byte 10 C.S. Address 11 12 13 14 15 '16 ■OF


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PDF CS8401A CS8402A CP-340 CS8401/2A CP-340 100-pin 254b3E4
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