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CLK-45 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
151011

Abstract: HD151011
Text: ) is selectable CMOS level (Vcc=2.0 to 6.0 V) and TTL level (Vcc= 4.5 to 5.5V) (Jn, C/T, PR, CLR and SPE , voltage Input / output voltage Operating temperature Input rise / fall time *1 Vcc = 2.5 V Vcc = 4.5 V Vcc , 4.5 6.0 2.0 4.5 6.0 4.5 to 5.5 Min 1.5 3.15 4.2 1.5 3.15 4.2 2.0 Typ - - - Min 1.5 , 0.1 0.1 0.1 0.33 0.33 ±1.0 40.0 m A - - - - - - - - 2.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 , /T = Vu V JO to J7 C/T, SPE PR, CLR CLK, CLK C/T = V ih Low level input voltage VlL 2.0 4.5


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PDF HD151011 151011 HD151011
2000 - synchronous counter using 4 flip flip

Abstract: HD151011 bcd counter using t flip flop diagram Hitachi DSA00219
Text: CMOS level (VCC = 2.0 to 6.0 V) and TTL level (VCC = 4.5 to 5.5V) (Jn, C/T, PR, CLR and SPE inputs are , 0 - 1000 ns VCC = 4.5 V 0 - 500 VCC = 5.5 V 0 - 400 1 , Conditions High level input VIH 2.0 1.5 - - 1.5 - V J0 to J7 4.5 3.15 , - - 1.5 - CLK, CLK C/T = VIH 4.5 3.15 - - 3.15 - 6.0 4.2 - - 4.2 - 4.5 to 2.0 5.5 - - 2.0 - 2.0 - - 0.5 -


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PDF HD151011 ADE-205-100 HD151011 synchronous counter using 4 flip flip bcd counter using t flip flop diagram Hitachi DSA00219
2000 - synchronous counter using 4 flip flip

Abstract: HD151012 synchronous counter using flip flip Hitachi DSA00219
Text: 1000 ns VCC = 4.5 V 0 - 500 VCC = 5.5 V 0 - 400 1 Input rise/fall , 1.5 - - 1.5 - V J0 to J7 4.5 3.15 - - 3.15 - SPE 6.0 4.2 - - 4.2 - PR, CLR 2.0 1.5 - - 1.5 - CLK, CLK 4.5 , 0.5 4.5 - - 1.35 - 1.35 SPE 6.0 - - 1.8 - 1.8 PR, CLR 2.0 - - 0.5 - 0.5 CLK, CLK 4.5 - - 1.35 - 1.35 6.0 -


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PDF HD151012 ADE-205-132 HD151012 synchronous counter using 4 flip flip synchronous counter using flip flip Hitachi DSA00219
Not Available

Abstract: No abstract text available
Text: 2.5 V Vcc = 4.5 V Vcc = 5.5 V Topr tr, tf °c ns Note:1. This item guarantees maximum limit , - - Typ - - - - - - - - - - - - 2.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 0.17 0.18 - - , m 40.0 |iA Iol = 4 mA Iol = 5.2 mA V in = V cc or GND V in = V c c or GND V V V < O O 2.0 4.5 6.0 2.0 4.5 6.0 J0 to J7 SPE PR, CLR CLK, CLK Low level input voltage VlL 2.0 4.5 6.0 2.0 4.5 6.0 J0 to J7 SPË PR, CLR CLK, CLK High level output voltage VOH 2.0 4.5 6.0 4.5 6.0


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PDF HD151012 HD151012
2004 - Not Available

Abstract: No abstract text available
Text: ) and TTL level (VCC = 4.5 to 5.5V) (Jn, C/T, PR, CLR and SPE inputs are CMOS level) Don't set data , ns 0 0 — — 500 400 VCC = 4.5 V VCC = 5.5 V Note: Min VCC VIN/OUT 1 , 1.5 3.15 — — — — 1.5 3.15 — — CLK, CLK 6.0 4.2 4.5 to 2.0 5.5 — — — — 4.2 2.0 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — — — — 1.8 0.5 — — 1.8 0.5 4.5 6.0


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PDF
2004 - Not Available

Abstract: No abstract text available
Text: ) and TTL level (VCC = 4.5 to 5.5V) (Jn, C/T, PR, CLR and SPE inputs are CMOS level) Don't set data , — — 500 400 VCC = 4.5 V VCC = 5.5 V Note: Min VCC VIN/OUT 1. This item , €” — — 1.5 3.15 — — CLK, CLK 6.0 4.2 4.5 to 2.0 5.5 — — — — 4.2 2.0 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — — — — 1.8 0.5 — — 1.8 0.5 4.5 6.0 VIL 3.15 4.2 2.0


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PDF
2000 - bcd counter using t flip flop diagram

Abstract: HD151011 Hitachi DSA0047
Text: . Clock inputs (CLK, CLK) is selectable CMOS level (VCC = 2.0 to 6.0 V) and TTL level (VCC = 4.5 to 5.5V , Operating temperature Topr ­40 - +85 °C t r, t f 0 - 1000 ns VCC = 4.5 V , 1.5 - - 1.5 - V J0 to J7 4.5 3.15 - - 3.15 - C/T, SPE , = VIH 4.5 3.15 - - 3.15 - 6.0 4.2 - - 4.2 - 4.5 to 2.0 5.5 - - 2.0 - 2.0 - - 0.5 - 0.5 4.5 - - 1.35 -


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PDF
Not Available

Abstract: No abstract text available
Text: Rise and Fall times tr. t,. GD54/74HC Types at 2V at 4.5V at 6V GD54/74HCT Types at 4.5 V MIN. MAX. UNITS 6 5.5 V 0 vcc V -4 0 -5 5 + 85 + 125 2 4.5 1000 500 400 , 0.3 0.9 0.9 0.9 6.0 1.2 1.2 1.2 2 0 2.0 1.9 4.5 4.4 4.5 4.4 4.4 5.9 6.0 5.9 5.9 or V|L l0 H= _ 4mA 4.5 3.98 4.3 3.84 3.7 6.0 , ■cc Input leakage Current VIN=VCC or GND Current V 0.1 0.1 4.5 0.1 0.1 0.1


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PDF GD54/74HC191, GD54/74HCT191
74HCT374

Abstract: 74HC374 74HC GD74HC374
Text: HCT 4.5 to 5.5 volts • Low input current: 1 /jA Max. • Low quiescent current: 80^A Max (74HC) â , MIN MAX Supply-Voltage Range Vcc: GD54/74HC Types GD54/74HCT Types 2 4.5 6 5 5 V DC Input or Output , and Fall times tr, t,: GD5474HC Types at 2V at 4.5V at 6V GD54/74HCT Types at 4.5 V 1000 500 400 500 , Voltage 2 0 4.5 6.0 1.5 3.15 4.2 1 5 3 15 4.2 1.5 3.15 4.2 V V|L LOW level input voltage 2 0 4 5 , =-20^A 2 0 4 5 6.0 1.9 4.4 5.9 2.0 4.5 6.0 1 9 4.4 5 9 1.9 4 4 5 9 V l0H = -6mA Iqh = — 7.8mA 4.5


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PDF GD54/74HC374, GD54/74HCT374 54/74LS374. 74HCT374 74HC374 74HC GD74HC374
2004 - HD151012

Abstract: HD151012TELL TSSOP-16
Text: 0 0 - - 500 400 VCC = 4.5 V VCC = 5.5 V Note: Min VCC VIN/OUT 1. This item , VCC Min Typ Max Min Max Unit VIH 2.0 1.5 - - 1.5 - V J0 to J7 4.5 6.0 voltage Low , CLK, CLK 6.0 2.0 - 1.9 - 2.0 1.8 - - 1.9 1.8 - 4.4 5.9 4.5 6.0 , 4.5 - - 0.0 0.0 0.1 0.1 - - 0.1 0.1 6.0 4.5 VOH - - 4.5 6.0 High level output 3.15 4.2 4.5 6.0 voltage - - 4.5 6.0 VIL - - 2.0


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PDF HD151012 REJ03D0299 0200Z ADE-205-132 HD151012 HD151012TELL TSSOP-16
1999 - bcd counter using t flip flop diagram

Abstract: synchronous counter using 4 flip flip HD151011 Hitachi DSA00396
Text: ) is selectable CMOS level (VCC = 2.0 to 6.0 V) and TTL level (VCC = 4.5 to 5.5V) (Jn, C/T, PR, CLR , Topr ­40 - +85 °C tr, tf 0 - 1000 ns VCC = 4.5 V 0 - 500 , 1.5 - V J0 to J7 4.5 3.15 - - 3.15 - C/T, SPE 6.0 4.2 - - 4.2 - PR, CLR 2.0 1.5 - - 1.5 - CLK, CLK C/T = VIH 4.5 3.15 - - 3.15 - 6.0 4.2 - - 4.2 - 4.5 to 5.5 2.0 - -


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PDF HD151011 ADE-205-100 HD151011 bcd counter using t flip flop diagram synchronous counter using 4 flip flip Hitachi DSA00396
2004 - bcd counter using t flip flop diagram

Abstract: HD151011 HD151011FPEL HD151011TELL TSSOP-20
Text: (VCC = 2.0 to 6.0 V) and TTL level (VCC = 4.5 to 5.5V) (Jn, C/T, PR, CLR and SPE inputs are CMOS level , - 500 400 VCC = 4.5 V VCC = 5.5 V Note: Min VCC VIN/OUT 1. This item guarantees , 3.15 - - CLK, CLK 6.0 4.2 4.5 to 2.0 5.5 - - - - 4.2 2.0 - - 2.0 4.5 - - - - 0.5 1.35 - - 0.5 1.35 6.0 2.0 - - - - 1.8 0.5 - - 1.8 0.5 4.5 6.0 VIL 3.15 4.2 2.0 4.5 Low level input voltage


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PDF HD151011 REJ03D0298 0200Z ADE-205-100 HD151011 bcd counter using t flip flop diagram HD151011FPEL HD151011TELL TSSOP-20
2004 - HD151011

Abstract: HD151011FPEL HD151011TELL TSSOP-20
Text: (VCC = 2.0 to 6.0 V) and TTL level (VCC = 4.5 to 5.5V) (Jn, C/T, PR, CLR and SPE inputs are CMOS level , - 500 400 VCC = 4.5 V VCC = 5.5 V Note: Min VCC VIN/OUT 1. This item guarantees , 3.15 - - CLK, CLK 6.0 4.2 4.5 to 2.0 5.5 - - - - 4.2 2.0 - - 2.0 4.5 - - - - 0.5 1.35 - - 0.5 1.35 6.0 2.0 - - - - 1.8 0.5 - - 1.8 0.5 4.5 6.0 VIL 3.15 4.2 2.0 4.5 Low level input voltage


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1982 - HC166

Abstract: SN54HC166 SN74HC166 bf145
Text: MIN VCC VIH High-level i p voltage High l l input l g VCC = 2 V VCC = 4.5 V MAX MIN , VCC VCC 0 VCC VCC VCC = 2 V VCC = 4.5 V 0 1000 0 1000 0 500 0 500 , V VCC = 2 V 1.5 3.15 UNIT VCC = 4.5 V VCC = 6 V V V V ns TA Operating free-air , IOH = ­5.2 mA 1.998 1.9 4.5 V 4.4 4.499 4.4 4.4 5.9 5.999 5.9 5.9 4.5 V 3.98 4.3 3.7 3.84 6V 5.48 5.8 5.2 UNIT 1.9 6V IOH = ­20 µA


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PDF SN54HC166, SN74HC166 SCLS117A HC166 SN54HC166 SN74HC166 bf145
HC165

Abstract: SN54HC165 SN74HC165 b140a 2102D
Text: VCC V tt Input transition (rise and fall) times Vcc = 2 V Vcc = 4-5 V vcc = 6 v 0 1000 0 500 0 400 0 , , l0h = - 20 (.a 2 v 4.5 v 6 v 1.9 1.998 4.4 4.499 5.9 5.999 1.9 4.4 5.9 1.9 4.4 5.9 v v| = v|h or v|l, iqh = ~4 ma 4.5 v 3.98 4.30 3.7 3.84 v| = v|h or v|l, l0h = -5.2 mA 6 v 5.48 5.80 5.2 5.34 vol v| = v|h or v|l, l0l = 20 ^ 2 v 4.5 v 6 v 0.002 0.1 o.ool 0.1 0.001 0.1 poo 0.1 0.1 0.1 v v| = v|h or vfi_, iql = 4 mA 4.5 v 0.17 0.26 0.4 0.33 v| = v|h or v|l. iol = 5.2 mA 6 v 0.15 0.26 0.4 0.33 i


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PDF SN54HC165, SN74HC165 d2684, 1982-revised 300-mil HC165 SN54HC165 SN74HC165 b140a 2102D
2004 - Not Available

Abstract: No abstract text available
Text: €“40 0 — — +85 1000 °C ns 0 0 — — 500 400 VCC = 4.5 V VCC = 5.5 V , €” 1.5 — V J0 to J7 4.5 6.0 voltage Low level output voltage VOL SPE PR, CLR 1.5 , — 1.9 — 2.0 1.8 — — 1.9 1.8 — 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.18 5.68 4.31 5.80 — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 VOH — — 4.5 6.0


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PDF HD151012 REJ03D0299â 0200Z ADE-205-132 HD151012
GD74HC160

Abstract: No abstract text available
Text: at 4.5 V MIN. MAX. UNITS 6 5.5 V 0 < o o CHARACTERISTIC V -4 0 -5 5 + 85 + 125 2 4.5 1000 500 400 500 4-215 GD54/74HC160, GD54/74HCT160 DC Electrical , 0.3 0.3 0.3 4.5 0.9 0.9 6.0 input voltage 1.2 1.2 0.9 1.2 2.0 HIGH level V|N = V ih I0 h - 20)jA 1.9 2.0 1.9 4.4 4.5 4.4 4.4 6.0 5.9 5.9 4.5 3.98 4.3 3.84 3.7 6.0 5.48 5.2 5.34 5.2 Iq L = 2 0 ^ A


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PDF GD54/74HC160, GD54/74HCT160 GD74HC160
2002 - 150M

Abstract: AV9170 ICS570 ICS570A ICS570AI ICS570AT ICS570B ICS570BI ICS570M
Text: MHz at 3.3V. · Can recover degraded input clock duty cycle. · Output clock duty cycle of 45 /55. · , Multiplier Absolute 1 3x ± 45 4x ± 45 8x ± 45 6x ± 45 10x ±40 1x ±40 16x ± 45 2x ±60 sigma 20 , Multiplier Absolute 1 3x ±50 4x ±50 8x ±50 6x ± 45 10x ± 45 1x ± 45 16x ±50 2x ±60 sigma 20 , Notes 100-250 45 49 to 51 ps 55 % 1. Stresses beyond these can permanently damage , JEDEC Publication No. 95.) 8 pin (150 mil) SOIC E H INDEX AREA h x 45 ° D A1


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PDF ICS570 ICS570 295-9800tel 150M AV9170 ICS570A ICS570AI ICS570AT ICS570B ICS570BI ICS570M
1982 - 1d 1107

Abstract: No abstract text available
Text: Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time VCC = 2 V VCC = 4.5 V VCC = 4.5 V VCC = 6 V 2 1.5 3.15 4.2 0 0 0 0 0 0 0 0.5 1.35 1.8 VCC VCC 1000 500 NOM 5 MAX 6 SN74HC165 , VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 , temperature range (unless otherwise noted) VCC 2V fclock Clock frequency 4.5 V 6V 2V SH/LD low tw Pulse


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PDF SN54HC165, SN74HC165 SCLS116C 300-mil SN54HC165 SN74HC165 HC165 SN74HC165N3 SN74HC165NSR SN74HC165PWLE 1d 1107
1982 - Not Available

Abstract: No abstract text available
Text: Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time VCC = 2 V VCC = 4.5 V VCC = 4.5 V VCC = 6 V 2 1.5 3.15 4.2 0 0 0 0 0 0 0 0.5 1.35 1.8 VCC VCC 1000 500 NOM 5 MAX 6 SN74HC165 , VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 , temperature range (unless otherwise noted) VCC 2V fclock Clock frequency 4.5 V 6V 2V SH/LD low tw Pulse


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PDF SN54HC165, SN74HC165 SCLS116C 300-mil SN54HC165 SN74HC165 HC165 SN74HC165, SZZU001B, SDYU001N,
1999 - OKI D51 a24

Abstract: OKI D51 concurrent rdram oki 13c64 concurrent RDRAM 72 9 concurrent rdram MD5764802 141oC MD5764802-53MC MSM5718C50
Text: RSL1332 l 3.3V l 242KB l l l SHP32-P-1125-0.65-K 1/ 45 MSM5718C50/MD5764802 l n , -60GS-K 64MSHP MD5764802-53MC MD5764802-60MC 2/ 45 MSM5718C50/MD5764802 l n RDRAM RDRAMSHP 324 , 31 32 1SHP 3/ 45 MSM5718C50/MD5764802 l 2 DQ8.DQ0 BUSDATA[8:0] I/O I/O CLK , Signaling Level 1 32 2SHP 4/ 45 MSM5718C50/MD5764802 l n RDRAM324 DRAM51210242KB 1""ACTV 2KB"" 1octbyte8 6RDRAM 5/ 45 MSM5718C50/MD5764802 l SIN SOUT RXCLK


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PDF J2G1059-39-21 MSM5718C50/MD5764802 MSM5718C50/MD5764802 18Mb2M 64Mb8M 18/64Rambus` 600MHz 600MB/s480MB/s RSL1332 242KB OKI D51 a24 OKI D51 concurrent rdram oki 13c64 concurrent RDRAM 72 9 concurrent rdram MD5764802 141oC MD5764802-53MC MSM5718C50
1982 - Not Available

Abstract: No abstract text available
Text: High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 4.5 V , IOL = 5.2 mA II ICC Ci VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V , recommended operating free-air temperature range (unless otherwise noted) VCC 2V fclock Clock frequency 4.5 V 6V 2V CLR low tw Pulse duration CLK high or low 4.5 V 6V 2V 4.5 V 6V 2V SH/LD high before CLK 4.5 V


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PDF SN54HC166, SN74HC166 SCLS117B 300-mil SN54HC166 SN74HC166 HC166 SZZU001B, SDYU001N,
2001 - 150M

Abstract: AV9170 ICS570A ICS570B ICS570BI ICS570BT ICS570M clock multiplier TTL 60 duty cycle
Text: recover degraded input clock duty cycle. · Output clock duty cycle of 45 /55. · Power Down and Tri-State , 2.5 to 19 2.5 to 9.5 2.5 to 12.5 2.5 to 7.5 8 to 75 2.5 to 5 4.5 to 37.5 0 = connect directly , Clock Duty Cycle at VDD/2 Notes 100 MHz 100-250 45 49 to 51 ps 55 % 1 , 3x ± 45 4x ± 45 8x ± 45 6x ± 45 10x ±40 1x ±40 16x ± 45 2x ±60 sigma 20 20 20 20 20 20 20 30 CLK/2 = 75M Multiplier Absolute 1 3x ±50 4x ±50 8x ±50 6x ± 45 10x ± 45 1x


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PDF ICS570B ICS570B ICS570B, 295-9800tel 150M AV9170 ICS570A ICS570BI ICS570BT ICS570M clock multiplier TTL 60 duty cycle
1982 - Not Available

Abstract: No abstract text available
Text: High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 4.5 V , IOL = 5.2 mA II ICC Ci VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V , recommended operating free-air temperature range (unless otherwise noted) VCC 2V fclock Clock frequency 4.5 V 6V 2V CLR low tw Pulse duration CLK high or low 4.5 V 6V 2V 4.5 V 6V 2V SH/LD high before CLK 4.5 V


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PDF SN54HC166, SN74HC166 SCLS117B 300-mil SN54HC166 SN74HC166 HC166 flip-flops500 SN74HC166N SN74HC166NSR
123105

Abstract: S10077 DO1024 AO1023 AO1024 TLP 535 ST6000
Text: (st) 12339/f(clk) Low tlp(st) 45 /f(clk) High *11 thp(st) 6000/f(clk) tr(st), tf(st) 0 , 30 35 40 45 50 55 clk clk tlp(st) st st thp(st) thp(st) tpi(st) tpi(st) 12322 7 EOS EOS 34 AO2 33 46 AO3 45 D7 34 22 AO1 21 AO D0 D7 , Trig(D) 53.5 Trig(D) 12285 33 45 12297 12309 12320 EOC 57 EOC KMPDC0225EB ) AOTrig(A)AO DOTrig(D)DO 10 012345 10 15 20 25 30 35 40 45


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PDF S10077 810AD S10077CMOS 810ADC 6C0231EA 435-85581126-1TEL 434-3311FAX KMPD1088J05 123105 S10077 DO1024 AO1023 AO1024 TLP 535 ST6000
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