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Part ECAD Model Manufacturer Description Datasheet Download Buy Part
CDC318ADLRG4 CDC318ADLRG4 ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP 0 to 70
CDC318ADL CDC318ADL ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP 0 to 70
CDC318ADLG4 CDC318ADLG4 ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP 0 to 70
CDC318ADLR CDC318ADLR ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP 0 to 70
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Texas Instruments
CDC318ADLR IC CLK BUFFER 1:18 100MHZ 48SSOP
CDC318ADLR ECAD Model
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Texas Instruments
CDC318ADL IC CLK BUFFER 1:18 100MHZ 48SSOP
CDC318ADL ECAD Model
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Texas Instruments
CDC318ADLG4 IC CLK BUFFER 1:18 100MHZ 48SSOP
CDC318ADLG4 ECAD Model
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Texas Instruments
CDC318ADLRG4 IC CLK BUFFER 1:18 100MHZ 48SSOP
CDC318ADLRG4 ECAD Model
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Digi-Key CDC318ADLRG4 Reel 0 1,000 - - - $4.90725 $4.90725 Buy Now

CDC318A datasheet (13)

Part ECAD Model Manufacturer Description Type PDF
CDC318A CDC318A ECAD Model Texas Instruments 1-LINE TO 18-LINE CLOCK DRIVER WITH I 2 C CONTROL INTERFACE Original PDF
CDC318ADL CDC318ADL ECAD Model Texas Instruments 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE Original PDF
CDC318ADL CDC318ADL ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I<sup>2</sup>C Control Interface 48-SSOP Original PDF
CDC318ADL CDC318ADL ECAD Model Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
CDC318ADLG4 CDC318ADLG4 ECAD Model Texas Instruments IC CLOCK DISTRIBUTION S Original PDF
CDC318ADLG4 CDC318ADLG4 ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I<sup>2</sup>C Control Interface 48-SSOP Original PDF
CDC318ADLG4 CDC318ADLG4 ECAD Model Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
CDC318ADLR CDC318ADLR ECAD Model Texas Instruments 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE Original PDF
CDC318ADLR CDC318ADLR ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I<sup>2</sup>C Control Interface 48-SSOP Original PDF
CDC318ADLR CDC318ADLR ECAD Model Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF
CDC318ADLRG4 CDC318ADLRG4 ECAD Model Texas Instruments IC CLOCK DISTRIBUTION Singl Original PDF
CDC318ADLRG4 CDC318ADLRG4 ECAD Model Texas Instruments 1-Line To 18-Line Clock Driver With I<sup>2</sup>C Control Interface 48-SSOP Original PDF
CDC318ADLRG4 CDC318ADLRG4 ECAD Model Texas Instruments CDC318 - 1-Line To 18-Line Clock Driver With I2C Control Interface 48-SSOP Original PDF

CDC318A Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2008 - CYPRESS SEMICONDUCTOR

Abstract: nxp Cross-reference AMI Semiconductor DSP ICS9112-17 PIC182 C9850 CDCLVD110 IDT CROSS MC100LVE111 MC100LVEP111
Text: -1/-11 CDCVF25081 2211QC-1 CDCR81 CY2318ANZ CDC318A CY2318BNZ CDC318A B9660 , CY2SSTV857 CDCV857 CY2SSTV857 CDCV857B CY2SSTV857-32 CDCVF857 B9680 CDC318A B9688 CDC318A C9850 CDC930 SC680E CDC318A W40S01-04 CDC318A Z9305 CDCVF2505 Z9308 , CDCVF2509 CDCVF2509 CDCVF2510 CDCVF2510 CDCV857B ICS9211-01 CDCR81 ICS9179B-01 CDC318A , CDCU877 ICS9212-13 CDCFR83 ICS95V857 CDCV857A IDT2308-1 CDCVF25081 QS5818 CDC318A


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PDF FS612509 CDCVF2509 CY2212 CDCR61A W152-1/-11 CYPRESS SEMICONDUCTOR nxp Cross-reference AMI Semiconductor DSP ICS9112-17 PIC182 C9850 CDCLVD110 IDT CROSS MC100LVE111 MC100LVEP111
1998 - CDC318A

Abstract: No abstract text available
Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614 ­ SEPTEMBER 1998 D , description The CDC318A is a high-performance clock buffer designed to distribute high-speed clocks in PC , distribution. The CDC318A operates from a 3.3-V power supply. It is characterized for operation from 0°C to , (i.e., random access of the registers is not supported). The CDC318A provides 3-state outputs for , testing of all parameters. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 CDC318A 1-LINE TO


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PDF CDC318A 18-LINE SCAS614 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A
1998 - 48-PIN

Abstract: CDC318A CDC318ADL CDC318ADLG4
Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A ­ SEPTEMBER 1998 ­ , VCC SDATA description The CDC318A is a high-performance clock buffer designed to distribute , skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It is characterized for , CDC318A provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a , . POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH


Original
PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A CDC318ADL CDC318ADLG4
1998 - 48-PIN

Abstract: CDC318A
Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A ­ SEPTEMBER 1998 ­ , VCC SDATA description The CDC318A is a high-performance clock buffer designed to distribute , skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It is characterized for , CDC318A provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a , 1 CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A ­ SEPTEMBER 1998


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PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A
1998 - Not Available

Abstract: No abstract text available
Text: ADDENDUM www.ti.com 16-Dec-2006 PACKAGING INFORMATION Orderable Device CDC318ADL CDC318ADLG4 CDC318ADLR CDC318ADLRG4 (1) Status (1) ACTIVE ACTIVE ACTIVE ACTIVE Package Type SSOP SSOP SSOP SSOP , CDC318A 1LINE TO 18LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A - SEPTEMBER 1998 - , -Pin Shrink Small Outline (DL) Package DL PACKAGE (TOP VIEW) description The CDC318A is a , one input (A) to 18 outputs (Y) with minimum skew for clock distribution. The CDC318A operates from a


Original
PDF CDC318A 18LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin
1998 - K3638

Abstract: 4Y04
Text: Device CDC318ADL CDC318ADLG4 CDC318ADLR CDC318ADLRG4 (1) Status (1) ACTIVE ACTIVE ACTIVE ACTIVE , CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A ­ SEPTEMBER 1998 ­ , -Pin Shrink Small Outline (DL) Package DL PACKAGE (TOP VIEW) description The CDC318A is a , one input (A) to 18 outputs (Y) with minimum skew for clock distribution. The CDC318A operates from a , sequential order (i.e., random access of the registers is not supported). The CDC318A provides 3


Original
PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin K3638 4Y04
1998 - 48-PIN

Abstract: CDC318A CDC318ADL CDC318ADLG4 CDC318ADLR
Text: CDC318A 1LINE TO 18LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A - SEPTEMBER 1998 - , 5Y0 GND VCC SDATA description The CDC318A is a high-performance clock buffer designed to , ) with minimum skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It is , CDC318A provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a , . POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 CDC318A 1LINE TO 18LINE CLOCK DRIVER WITH


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PDF CDC318A 18LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A CDC318ADL CDC318ADLG4 CDC318ADLR
2007 - CDCV304

Abstract: PIC182 QS5810 B9680 B9688 CDC318A CDC319 CY2318ANZ CY2318BNZ SC660E
Text: Cypress Cypress Texas Instruments Cypress Texas Instruments Cypress CDC318A CY2318ANZ CY2318BNZ , CDC318A CDC318A CDC318A CDC318A CDC318A CDC318A CDC318A CDC319 CDC319 CDC319 CDC319 CDC319 , Texas Instruments ICS Texas Instruments ICS Texas Instruments ICS CDC318A ICS9179B-01 CDC319 , ICS2510C CDCVF2510 ICS2510C CDCV857A ICS93V857 CDC950 ICS9248-150 CDC318A CDC318A CDC319 CDC319 , Instruments IDT Texas Instruments IDT IDT CDC318A QS5818 CDC319 QS5810 CDCVF2505 2305-1 2305-1H


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PDF CDC318A CY2318ANZ CY2318BNZ SC680E B9680 B9688 W40S01-04 CDCV304 PIC182 QS5810 B9680 B9688 CDC318A CDC319 CY2318ANZ CY2318BNZ SC660E
1998 - 48-PIN

Abstract: CDC318A
Text: CDC318A 1LINE TO 18LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A - SEPTEMBER 1998 - , 5Y0 GND VCC SDATA description The CDC318A is a high-performance clock buffer designed to , ) with minimum skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It is , CDC318A provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a , . POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 CDC318A 1LINE TO 18LINE CLOCK DRIVER WITH


Original
PDF CDC318A 18LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A
Not Available

Abstract: No abstract text available
Text: CDC318A l-LINE TO 18-LINE CLOCK DRIVER WITH |2C CONTROL INTERFACE SC AS 614 - SE P TE M B E R 1998 , N D [ 22 v c c [ 23 SDATA[ 24 description The CDC318A is a high-performance clock buffer , outputs (Y) with minimum skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It , sequential order (i.e., random access of the registers is not supported). The CDC318A provides 3 , t s POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 CDC318A 1-LINE TO 18-LINE CLOCK DRIVER


OCR Scan
PDF CDC318A 18-LINE 1-to-18 100-MHz MIL-STD-883, 48-Pin
1998 - k3638

Abstract: No abstract text available
Text: Device CDC318ADL CDC318ADLR (1) Status (1) ACTIVE ACTIVE Package Type SSOP SSOP Package Drawing , CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A ­ SEPTEMBER 1998 ­ , -Pin Shrink Small Outline (DL) Package DL PACKAGE (TOP VIEW) description The CDC318A is a , one input (A) to 18 outputs (Y) with minimum skew for clock distribution. The CDC318A operates from a , sequential order (i.e., random access of the registers is not supported). The CDC318A provides 3


Original
PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin k3638
1998 - 48-PIN

Abstract: CDC318A
Text: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A ­ SEPTEMBER 1998 ­ , VCC SDATA description The CDC318A is a high-performance clock buffer designed to distribute , skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It is characterized for , CDC318A provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a , . POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH


Original
PDF CDC318A 18-LINE SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin CDC318A
1998 - Not Available

Abstract: No abstract text available
Text: CDC318A 1ĆLINE TO 18ĆLINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614A − SEPTEMBER 1998 , GND VCC 5Y0 GND VCC SDATA description The CDC318A is a high-performance clock buffer , outputs (Y) with minimum skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It , The CDC318A provides 3-state outputs for testing and debugging purposes. The outputs can be placed in , testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CDC318A


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PDF CDC318A SCAS614A 1-to-18 100-MHz MIL-STD-883, 48-Pin
2003 - CDCLVP110

Abstract: SN65LVDS104 SN65MLVD201 CDCFR83 CDCR61A CDCR83 CDCU877 CDCV850 CDCV857B CDCVF111
Text: Synthesizers 9 10 12 TM R O CDC318A PLL Clock Buffers (Zero-Delay) Number of Outputs


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PDF CDCR61A CDCR83 CDCFR83 CDCV850 CDCV857B CDCVF857B CDCU877 CDCV855 CDC5801 SN65LVDS104 CDCLVP110 SN65LVDS104 SN65MLVD201 CDCFR83 CDCR61A CDCR83 CDCU877 CDCV850 CDCV857B CDCVF111
2003 - CDC2509

Abstract: SN65MLVD201 CDCFR83 CDCR61A CDCR83 CDCU877 CDCV850 CDCV855 CDCV857B CDCVF857
Text: CDC960 CDC318A CDC319 Clock Buffers/Drivers (Non-PLL) PLL Clock Buffers (Zero-Delay) CDC329A


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PDF CDCV850 CDCV855 CDCV857B CDCVF857 CDCU877 CDCR61A CDCR83 CDCFR83 CDCLVD110 SN65LVDS116 CDC2509 SN65MLVD201 CDCFR83 CDCR61A CDCR83 CDCU877 CDCV850 CDCV855 CDCV857B CDCVF857
2009 - INSSTE32882

Abstract: maxim dallas 2501 P16CV SY100EL16 SN65MLVD201 SN65EPT22 INCU877 INCUA877 ttl crystal oscillator using 7404 P16CV857B
Text: CDCE(L)937 CDCDLP223 CDCE(L)913 Non-PLL Clock Buffers CDCS502/503 CDC318A CDCV304 , CDC318A CDCVF25084 CDC208 CDC329A CDC337 CDC339 CDC340 CDC341 8 9 10 12 16 >18


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2009 - INSSTE32882

Abstract: maxim dallas 2501 insstua32866 INSSTU32864 INSSTU32866 ttl crystal oscillator using CIRCUIT DIAGRAM INCUA877 ps 2501 dallas GSM home automation block diagram INCU877
Text: CDCE(L)937 CDCDLP223 CDCE(L)913 Non-PLL Clock Buffers CDCS502/503 CDC318A CDCV304 , CDC318A CDCVF25084 CDC208 CDC329A CDC337 CDC339 CDC340 CDC341 8 9 10 12 16 >18


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PDF
2003 - DALLAS 2501

Abstract: CDC2509 TSSOP-56 footprint texas 14 pin ic 7404 datasheet SN65MLVD201 pll dip 546 spi mux CDCVF25084 TTL 7404 TBA 950 2x
Text: CDCVF2310 CDC351 CDC2351 CDC950 CDC960 CDC318A CDC319 LVTTL/HCMOS Clock Buffers/Drivers (Non-PLL , CDC208 CMOS/TTL CDC2510C CDCVF2510 CDCVF25081 5 8 CDC318A Clock Buffers/Drivers , LVTTL/ MLVDS Single-Ended CDC208 CDC318A CDC319 CDC328A CDC329A CDC337 Mixed-Signal Buffers


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PDF SLYB104 DALLAS 2501 CDC2509 TSSOP-56 footprint texas 14 pin ic 7404 datasheet SN65MLVD201 pll dip 546 spi mux CDCVF25084 TTL 7404 TBA 950 2x
1996 - CDC2509

Abstract: CDC2510A NE555 IBIS ne555 fan control sn761672 CDC111 CDC204 CDC208 CDC2351 CDC328A
Text: CDC318A SN65LVDS116 SN65LVDS108 SN65LVDS104 SN65LVDS105 CDCV304 CDCVF2310 CDCVF111 CDCLVP110


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PDF
2004 - MAX3234

Abstract: maxim dallas 2501 jtag gd75232 DALLAS 2501 jtag PL-2303 LGA 775 SOCKET PIN LAYOUT SN75176 PL-2303 SN75179 application MAX490 schematic
Text: No file text available


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PDF RS-485/422. RS-232. MAX3234 maxim dallas 2501 jtag gd75232 DALLAS 2501 jtag PL-2303 LGA 775 SOCKET PIN LAYOUT SN75176 PL-2303 SN75179 application MAX490 schematic
2005 - maxim dallas 2501

Abstract: jtag PL-2303 DALLAS 2501 RS-485 spice PL-2303 goldstar GM16c550 MC34051 circuit diagram of MAX232 connection to pic goldstar scheme jtag gd75232
Text: No file text available


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PDF RS-485/422 RS-232 SSZT009B maxim dallas 2501 jtag PL-2303 DALLAS 2501 RS-485 spice PL-2303 goldstar GM16c550 MC34051 circuit diagram of MAX232 connection to pic goldstar scheme jtag gd75232
2003 - ERICSSON 2g and 3g bts

Abstract: BTS 6000 ericsson ericsson bts 6000 ericsson bts Technical specification ERICSSON BTS training Datasheet antenna microwave ericsson 0.6 ERICSSON 2g and 3g bts used in usa ERICSSON BTS product ERICSSON RNC Mobile switching center ericsson
Text: No file text available


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2006 - HDMI TO VGA MONITOR PINOUT

Abstract: HDMI to vga pinout china DVD player card circuit diagram serdes hdmi optical fibre mp3 player circuit diagram by using msp430 PL-2303 SN75179 application VGA TO HDMI PINOUT meter-bus HDMI cat5
Text: No file text available


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PDF RS-485/422 RS-232 HDMI TO VGA MONITOR PINOUT HDMI to vga pinout china DVD player card circuit diagram serdes hdmi optical fibre mp3 player circuit diagram by using msp430 PL-2303 SN75179 application VGA TO HDMI PINOUT meter-bus HDMI cat5
2006 - tmds specification

Abstract: ADM2209 HDMI TO VGA MONITOR PINOUT HVGA TFT LCD driver VMEH22501 MAX202 circuit diagram tlk10021 rs422 msp430 diagram LG LCD TV circuits PL-2303
Text: No file text available


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PDF RS-485/422 RS-232. tmds specification ADM2209 HDMI TO VGA MONITOR PINOUT HVGA TFT LCD driver VMEH22501 MAX202 circuit diagram tlk10021 rs422 msp430 diagram LG LCD TV circuits PL-2303
2004 - TNETV1050

Abstract: SN74ALVC164245 frame buffer gsm avr project sms TNETV1050 Kits UCC3895 ap note TMS320C5509a Transistors C5407 Japan tlk10021 SN74CB3Q6800 SN65LV1024
Text: No file text available


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PDF SLYB111 TNETV1050 SN74ALVC164245 frame buffer gsm avr project sms TNETV1050 Kits UCC3895 ap note TMS320C5509a Transistors C5407 Japan tlk10021 SN74CB3Q6800 SN65LV1024
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