CD74HC112M96 |
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Texas Instruments
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High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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Original |
PDF
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CD74HC112M96 |
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Texas Instruments
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HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET |
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Original |
PDF
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CD74HC112M96 |
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Texas Instruments
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CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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Original |
PDF
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CD74HC112M96 |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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Scan |
PDF
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CD74HC112M96E4 |
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Texas Instruments
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High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset |
|
Original |
PDF
|
CD74HC112M96E4 |
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
|
Original |
PDF
|
CD74HC112M96E4 |
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Texas Instruments
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CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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Original |
PDF
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CD74HC112M96G4 |
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Texas Instruments
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High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
|
Original |
PDF
|
CD74HC112M96G4 |
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Texas Instruments
|
CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
|
Original |
PDF
|