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Alpha Wire
CAP22 BK078 HEAT SHRINK BOOT, END CAP, 7.37MM ID, PO, BLACK, PK25; Boot Configuration:End Cap; I.D. Supplied - Imperial:0.29"; I.D. Supplied - Metric:7.37mm; Shrink Tubing / Boot Colour:Black; Total Length - Imperial:1"; Shrink Ratio:2:1 RoHS Compliant: Yes CAP22 BK078 ECAD Model
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Newark element14 CAP22 BK078 Package 0 1 $117.03 $91.08 $69.2 $69.2 $69.2 More Info
Allied Electronics & Automation CAP22 BK078 Package 0 1 $83.7 $78.04 $70.58 $70.58 $70.58 More Info
Farnell element14 CAP22 BK078 0 1 £63.22 £54.71 £54.71 £54.71 £54.71 More Info
PCX Inc CAP22 BK078 101,010 - - - - - More Info

CAP22 BK078 datasheet (2)

Part ECAD Model Manufacturer Description Type PDF
CAP22-BK078 CAP22-BK078 ECAD Model Alpha Wire Heat Shrink Boots, Caps, Cables, Wires - Management, HEATSHRINK CAP 2:1 SR-PO BK 25PC Original PDF
CAP22 BK078 CAP22 BK078 ECAD Model Alpha Wire Cables, Wires - Management - Heat Shrink Boots, Caps - HEATSHRINK CAP 2:1 SR-PO Original PDF

CAP22 BK078 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2013 - Not Available

Abstract: No abstract text available
Text: Alpha Wire | 711 Lidgerwood Avenue, Elizabeth, NJ 07207 Tel: 1-800-52 ALPHA (25742), Web: www.alphawire.com Customer Specification PART NO. CAP-22 Construction 1) Tubing Type Heat Shrinkable Cap 2) Tubing Material Semi Rigid Polyolefin 3) Minimum Supplied ID(In) 0.290 4) Maximum Recovered ID (In) 0.130 5) Nominal Recovered Wall Thickness(In) 0.050 6) Nominal Recovered , COMPLIANCE To Whom It May Concern: Alpha Wire Part Number: CAP-22 CAP-22 , RoHS-Compliant Commencing With


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PDF CAP-22 2011/65/EU Consul000
M62412

Abstract: preset resistor 10k Circuit pcb of 5 channel audio equilizer of preset 10k "MPEG Card" PRESET 10K walkman PT2381-S PT2381 CAP11
Text: 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 IN2 OUT2 CAP2_1 CAP2_2 NF2 CAP2


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PDF PT2381 PT2381 4700p PT2380 M62412 preset resistor 10k Circuit pcb of 5 channel audio equilizer of preset 10k "MPEG Card" PRESET 10K walkman PT2381-S CAP11
1996 - BEST BASS TREBLE CIRCUIT pcb layout

Abstract: treble bass mid preset resistor equalizer audio 5v PCB bass treble PTC 886 mini equalizer BEST BASS TREBLE CIRCUIT PT2380 PT 10000
Text: Description Pin Name IN1 OUT1 Cap1_1 Cap1_2 NF1 Cap1_3 Vcc GND SW1 SW2 Cap2_3 NF2 Cap2_2 Cap2


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PDF PT2380 PT2380 BEST BASS TREBLE CIRCUIT pcb layout treble bass mid preset resistor equalizer audio 5v PCB bass treble PTC 886 mini equalizer BEST BASS TREBLE CIRCUIT PT 10000
D-4066-82

Abstract: ASTM-D-3295 708-0522 708-7435 708-4920 TFT250-20 708-5013 708-7410 TFT250-18 708-4924
Text: I.D. (In.) I.D. (In.) Length (In.) 708-8352 CAP21 0.16 0.08 1.12 51.43 708-8354 CAP22 0.25 0.12 1.15


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PDF TFT-250-24 PVC-105- TFT-250-22 TFT-250-20 TFT-250-18 TFT-250-16 D-4066-82 ASTM-D-3295 708-0522 708-7435 708-4920 TFT250-20 708-5013 708-7410 TFT250-18 708-4924
fit 221 heat shrink tubing

Abstract: ft 5777 CAP-21
Text: Resistant Stock No. 70140501 70140502 70140503 70140504 70140505 Mfr.'s Type CAP21 CAP22 CAP23 CAP24 CAP25


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PDF UL224) AMS-DTL-23053/5, CAP21 CAP22 CAP23 CAP24 CAP25 fit 221 heat shrink tubing ft 5777 CAP-21
M62412

Abstract: pt2381 mini equalizer walkman amplifier 14 pin ic PT2381-S PT2380 MS-013 MS-001 300MIL
Text: DESCRIPTION Pin Name IN1 OUT1 CAP1_1 CAP1_2 NF1 CAP1_3 VCC GND SW1 SW2 CAP2_3 NF2 CAP2_2 CAP2


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PDF PT2381 PT2381 app006 MS-013, M62412 mini equalizer walkman amplifier 14 pin ic PT2381-S PT2380 MS-013 MS-001 300MIL
2005 - b4410

Abstract: EM250-RTR ZigBee Alliance Document 03322r13 10MHz agc circuit 921kbps OSC32A XAP2b QFN48 GPIO14 EM250
Text: Capture Input B of Timer 2 Enable CAP2-2 with GPIO_CFG[7:4] IRQD 41 O I External interrupt , CAP2-2 with GPIO_CFG[7:4] IRQC 42 I I External interrupt source C GPIO14 I/O


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PDF EM250 ZigBee/802 99dBm 20byte 100dBm 768kHz 16-bit 128kB 120-0082-000S b4410 EM250-RTR ZigBee Alliance Document 03322r13 10MHz agc circuit 921kbps OSC32A XAP2b QFN48 GPIO14 EM250
2005 - a 4514 v

Abstract: RX-2 -G 3 terminal 12mhz crystal oscillator chang capacitor 10uF 50v marking code BBB ca 4580 AD 4704 act 4514 DATASHEET IC TX-2 1 MEGA OHM RESISTOR
Text: Enable CAP2-2 with GPIO_CFG[7:4] IRQD 41 I External interrupt source D GPIO15 I/O , GPIO_CFG[2] TMR2IA.3 I Capture Input A of Timer 2 Enable CAP2-2 with GPIO_CFG[7:4] IRQC 8


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PDF EM250 ZigBee/802 20byte 768kHz org/getieee802/download/802 11g-2003 053474r07) 03322r13) EM250 120-0082-000J a 4514 v RX-2 -G 3 terminal 12mhz crystal oscillator chang capacitor 10uF 50v marking code BBB ca 4580 AD 4704 act 4514 DATASHEET IC TX-2 1 MEGA OHM RESISTOR
2013 - RX-6 TX-6

Abstract: EM250-RTR OSC32A chippac qfn
Text: ] Capture Input B of Timer 2 Enable CAP2-2 with GPIO_CFG[7:4] External interrupt source D Digital I/O Enable , Timer 2 Enable CAP2-2 with GPIO_CFG[7:4] External interrupt source C Digital I/O Enable GPIO14 with


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PDF EM250 ZigBee/802 99dBm 20byte 100dBm 768kHz 16-bit 128kB 20-0082-000V RX-6 TX-6 EM250-RTR OSC32A chippac qfn
2008 - Arm7 lpc2103 circuit diagram

Abstract: 2102 Static RAM LPC2102FBD48 LPC2101FBD48 LPC2101 HVQFN48 16C550 ARM7 pin configuration sot619-7 arm microprocessor data sheet
Text: .2 P0.29/TCK/ CAP2.2 10 27 DBGSEL Fig 2. P0.6/MOSI0/CAP0.2 24 P0.5/MISO0/MAT0.1 23 P0 , /MAT2.2 P0.29/TCK/ CAP2.2 10 27 DBGSEL P0.6/MOSI0/CAP0.2 24 P0.5/MISO0/MAT0.1 23 P0.4/SCK0 , / CAP2.1 9[1] P0.29/TCK/ CAP2.2 10[1] P0.30/TDI/ MAT3.3 15[1] P0.31/TDO 16[1] I CAP2.2 - Capture input for Timer 2, channel 2. I/O P0.30 - General purpose input/output digital


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PDF LPC2101/02/03 16-bit/32-bit kB/16 kB/32 10-bit LPC2101/02/03 128-bit 32-bit 16-bit Arm7 lpc2103 circuit diagram 2102 Static RAM LPC2102FBD48 LPC2101FBD48 LPC2101 HVQFN48 16C550 ARM7 pin configuration sot619-7 arm microprocessor data sheet
2007 - Arm7 lpc2103 circuit diagram

Abstract: 2102 ram ARM LPC2103 ad0640
Text: .29/TCK/ CAP2.2 10 XTAL1 11 XTAL2 12 Fig 2. LQFP48 pin configuration LPC2101_02_03_2 38 P0.25/AD0 , RST 11 VSS 12 P0.27/TRST/CAP2.0 13 P0.28/TMS/CAP2.1 14 P0.29/TCK/ CAP2.2 15 XTAL1 16 XTAL2 17 P0.0/TXD0 , clock must be slower than 1/6 of the CPU clock (CCLK) for the JTAG interface to operate. CAP2.2 - , / CAP2.2 10[4] 15[4] I/O I I P0.30/TDI/ MAT3.3 15[4] 20[4] I/O I O P0.31/TDO RTCX1 RTCX2 RTCK


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PDF LPC2101/2102/2103 16-bit/32-bit kB/16 kB/32 10-bit LPC2101/2102/2103 128-bit 32-bit 16-bit Arm7 lpc2103 circuit diagram 2102 ram ARM LPC2103 ad0640
2006 - Not Available

Abstract: No abstract text available
Text: GPIO_CFG[3]) TMR2IB.3 I Capture Input B of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQD , GPIO_CFG[2]) TMR2IA.3 I Capture Input A of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQC


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PDF SN250 ZigBeeTM/802 768kHz 97dBm 20byte 98dBm 128KB
2005 - 4490 debounce

Abstract: EM250-RT HHM1521 GPIO14 EM250 24MHZ Zigbee-pro zig bee tantalum 44aa xap2b addressing
Text: Enable CAP2-2 with GPIO_CFG[7:4] IRQD 41 I External interrupt source D GPIO15 I/O , with GPIO_CFG[2] TMR2IA.3 I Capture Input A of Timer 2 Enable CAP2-2 with GPIO_CFG[7:4


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PDF EM250 ZigBee/802 99dBm 20byte 100dBm 768kHz 16-bit 16-bit low/getieee802/download/802 11g-2003 4490 debounce EM250-RT HHM1521 GPIO14 EM250 24MHZ Zigbee-pro zig bee tantalum 44aa xap2b addressing
2005 - pin diagram for IC 4580

Abstract: a 4514 v LQG15HS6N8S02D act 4514 DATASHEET a4504 EM250-RTR cts 10mhz oscillator IC 4614 ic 4580 A 4714 8 PIN
Text: Timer 1 (enable TMR1OB with GPIO_CFG[3]) TMR2IB.3 I Capture Input B of Timer 2 (enable CAP2-2 , GPIO_CFG[2]) TMR2IA.3 I Capture Input A of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQC 42


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PDF EM250 ZigBee/802 97dBm 20byte 98dBm 768kHz org/getieee802/download/802 11g-2003 053474r07) 03322r13) pin diagram for IC 4580 a 4514 v LQG15HS6N8S02D act 4514 DATASHEET a4504 EM250-RTR cts 10mhz oscillator IC 4614 ic 4580 A 4714 8 PIN
2009 - Not Available

Abstract: No abstract text available
Text: LPC2102FBD48 LPC2103FBD48 31 VSSA 30 P0.9/RXD1/MAT2.2 P0.29/TCK/ CAP2.2 10 27 DBGSEL Fig 2. P0 , .29/TCK/ CAP2.2 10 27 DBGSEL P0.6/MOSI0/CAP0.2 24 P0.5/MISO0/MAT0.1 23 P0.4/SCK0/CAP0.1 22 , .29/TCK/ CAP2.2 10[1] I/O P0.29 — General purpose input/output digital pin. I TCK â , EmbeddedICE (Debug mode). I CAP2.2 — Capture input for Timer 2, channel 2. P0.30/TDI/ MAT3.3 15


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PDF LPC2101/02/03 16-bit/32-bit kB/16 kB/32 10-bit LPC2101/02/03 128-bit 32-bit 16-bit
2006 - STMicroelectronics date code format QFN package

Abstract: 0x4430 LQG15HS6N8S02D SN250QT SN250Q SN250 QFN48 24MHZ Znet stack pin diagram for IC 4580
Text: 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQD I External interrupt source D 32 33 40 , 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQC I External interrupt source C GPIO14 I/O


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PDF SN250 ZigBeeTM/802 768kHz 97dBm 20byte 98dBm 128kB STMicroelectronics date code format QFN package 0x4430 LQG15HS6N8S02D SN250QT SN250Q SN250 QFN48 24MHZ Znet stack pin diagram for IC 4580
2005 - 7812 voltage regulator, circuit diagram and data

Abstract: 7812 voltage regulator spec. sheet 7812 TO-3 specifications of DATA SHEET OF IC 7812 CHARACTERISTICS OF IC 7812 XAP2b REGULATOR IC 7812 REGULATOR IC 7812 pin diagram ca 4580 pin diagram for IC 4580
Text: Timer 1 (enable TMR1OB with GPIO_CFG[3]) TMR2IB.3 I Capture Input B of Timer 2 (enable CAP2-2 , GPIO_CFG[2]) TMR2IA.3 I Capture Input A of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQC 42


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PDF EM250 ZigBee/802 97dBm 20byte 98dBm 768kHz org/getieee802/download/802 11g-2003 053474r07) 03322r13) 7812 voltage regulator, circuit diagram and data 7812 voltage regulator spec. sheet 7812 TO-3 specifications of DATA SHEET OF IC 7812 CHARACTERISTICS OF IC 7812 XAP2b REGULATOR IC 7812 REGULATOR IC 7812 pin diagram ca 4580 pin diagram for IC 4580
2006 - XAP2b

Abstract: xap2b addressing
Text: GPIO_CFG[3]) Capture Input B of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) External interrupt source D , TMR1OA with GPIO_CFG[2]) Capture Input A of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) External interrupt


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PDF SN250 ZigBeeTM/802 97dBm 20byte 98dBm 768kHz 16-bit SN250Q SN250 XAP2b xap2b addressing
2007 - XAP2b

Abstract: xap2b addressing ILCX08-JG5F18-24 sc23m SN250QT SN250Q SN250 QFN48 24MHZ Znet stack
Text: Input B of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQD I External interrupt source D 32 , 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQC I External interrupt source C GPIO14 I/O


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PDF SN250 768-kHz XAP2b xap2b addressing ILCX08-JG5F18-24 sc23m SN250QT SN250Q SN250 QFN48 24MHZ Znet stack
2007 - 24MHZ

Abstract: QFN48 SN250 SN250Q SN250QT
Text: Input B of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQD I External interrupt source D O , Input A of Timer 2 (enable CAP2-2 with GPIO_CFG[7:4]) IRQC I External interrupt source C


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PDF SN250 24MHZ QFN48 SN250 SN250Q SN250QT
2005 - superheterodyne receiver GHz

Abstract: 24MHZ EM250 GPIO14 EM250-RTY R0-R14 sc24s
Text: Enable TMR1OB with GPIO_CFG[3] TMR2IB.3 I Capture Input B of Timer 2 Enable CAP2-2 with , ] TMR2IA.3 I Capture Input A of Timer 2 Enable CAP2-2 with GPIO_CFG[7:4] IRQC 8 O I


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PDF EM250 ZigBee/802 97dBm 20byte 768kHz 98dBm 802tp org/getieee802/download/802 11g-2003 053474r07) superheterodyne receiver GHz 24MHZ EM250 GPIO14 EM250-RTY R0-R14 sc24s
2006 - Arm7 lpc2103 circuit diagram

Abstract: 2102 Static RAM motorola p030 LPC2101 LPC2101FBD48 LPC2102FBD48 LPC2103FBD48 LQFP48 PLCC44 RAM 2102
Text: .1 9 28 P0.7/SSEL0/MAT2.0 31 VSSA LPC2101/2102/2103 30 P0.9/RXD1/MAT2.2 P0.29/TCK/ CAP2.2 , 32 P0.8/TXD1/MAT2.1 P0.29/TCK/ CAP2.2 15 31 P0.7/SSEL0/MAT2.0 P0.6/MOSI0/CAP0.2 28 P0 , interface. I 14 [4] TRST - Test Reset for JTAG interface. I CAP2.2 - Capture input for Timer 2, channel 2. P0.28/TMS/ CAP2.1 9 [4] P0.29/TCK/ CAP2.2 10 [4] P0.30/TDI/ MAT3


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PDF LPC2101/2102/2103 16-bit/32-bit kB/16 kB/32 10-bit LPC2101/2102/2103 128-bit 32-bit 16-bit Arm7 lpc2103 circuit diagram 2102 Static RAM motorola p030 LPC2101 LPC2101FBD48 LPC2102FBD48 LPC2103FBD48 LQFP48 PLCC44 RAM 2102
2009 - 16C550

Abstract: Arm7 lpc2103 circuit diagram LPC2101 UM10161 LQFP48 LPC2103FBD48 LPC2102FBD48 LPC2101FBD48 HVQFN48 Y24L
Text: LPC2102FBD48 LPC2103FBD48 31 VSSA 30 P0.9/RXD1/MAT2.2 P0.29/TCK/ CAP2.2 10 27 DBGSEL Fig 2. P0 , .29/TCK/ CAP2.2 10 27 DBGSEL P0.6/MOSI0/CAP0.2 24 P0.5/MISO0/MAT0.1 23 P0.4/SCK0/CAP0.1 22 , EmbeddedICE (Debug mode). I CAP2.1 - Capture input for Timer 2, channel 1. P0.29/TCK/ CAP2.2 10 , DBGSEL is HIGH, this pin is automatically configured for use with EmbeddedICE (Debug mode). I CAP2.2


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PDF LPC2101/02/03 16-bit/32-bit kB/16 kB/32 10-bit LPC2101/02/03 128-bit 32-bit 16-bit 16C550 Arm7 lpc2103 circuit diagram LPC2101 UM10161 LQFP48 LPC2103FBD48 LPC2102FBD48 LPC2101FBD48 HVQFN48 Y24L
2008 - 2102 Static RAM

Abstract: LPC2103FBD48 LPC2102FBD48 LPC2101FBD48 HVQFN48 16C550 LPC2103 datasheet ARM7TDMI-S instruction set ARM7 pin configuration Arm7 lpc2103 circuit diagram
Text: .29/TCK/ CAP2.2 10 27 DBGSEL P0.6/MOSI0/CAP0.2 24 P0.5/MISO0/MAT0.1 23 P0.4/SCK0/CAP0.1 22 , .2 P0.28/TMS/CAP2.1 14 32 P0.8/TXD1/MAT2.1 P0.29/TCK/ CAP2.2 15 31 P0.7/SSEL0/MAT2.0 P0 , .20/MAT1.3/MOSI1 P0.29/TCK/ CAP2.2 10 FT FT FT FT P0.19/MAT1.2/MISO1 LPC2102FHN48 , / CAP2.1 9[1] P0.29/TCK/ CAP2.2 10[1] P0.30/TDI/ MAT3.3 15[1] P0.31/TDO 16[1 , purpose input/output digital pin. I 15[1] I/O I CAP2.2 - Capture input for Timer 2, channel 2


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PDF 16-bit/32-bit kB/16 kB/32 10-bit LPC2101/02/03 LPC2101/02/03 2102 Static RAM LPC2103FBD48 LPC2102FBD48 LPC2101FBD48 HVQFN48 16C550 LPC2103 datasheet ARM7TDMI-S instruction set ARM7 pin configuration Arm7 lpc2103 circuit diagram
2007 - 2102 SRAM

Abstract: ARM7TDMI-S external bus interface unit Arm7 lpc2103 circuit diagram LPC2103 register 2102 RAM RAM 2102 ARM processor pin configuration tms 2102 SRAM arm microprocessor data sheet ARM7TDMI-S voltage level
Text: LPC2101/2102/2103 30 P0.9/RXD1/MAT2.2 P0.29/TCK/ CAP2.2 10 27 DBGSEL P0.6/MOSI0/CAP0.2 24 P0 , /MAT2.2 P0.28/TMS/CAP2.1 14 32 P0.8/TXD1/MAT2.1 P0.29/TCK/ CAP2.2 15 31 P0.7/SSEL0/MAT2 , clock (CCLK) for the JTAG interface to operate. I CAP2.2 - Capture input for Timer 2, channel 2 , .29/TCK/ CAP2.2 10[4] P0.30/TDI/ MAT3.3 15[4] P0.31/TDO 16[4] 21[4] RTCX1 20[5


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PDF LPC2101/2102/2103 16-bit/32-bit kB/16 kB/32 10-bit LPC2101/2102/2103 128-bit 32-bit 16-bit 2102 SRAM ARM7TDMI-S external bus interface unit Arm7 lpc2103 circuit diagram LPC2103 register 2102 RAM RAM 2102 ARM processor pin configuration tms 2102 SRAM arm microprocessor data sheet ARM7TDMI-S voltage level
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