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BR-04-ALL-005 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2006 - ESD8V0L2B03L

Abstract: 2I k INFINEON marking infineon marking information
Text: ): 40 A (5/50 ns) · Smallest form factor 1.0 x 0.6 x 0.4 mm · Max. working voltage: ±8 / +14 V · Very low capacitance down to 2 pF · Very low reverse current < 0.1 µA · Very low series inductance typ. 0.4 , discharge1) ESD8V0L1B-02LRH ESD8V0L2B-03L, between all pins Peak pulse current (tp = 8 / 20 µs)2) ESD8V0L1B , , between all pins IR VCL - nA V Clamping voltage for ESD8V0L2B-03L VESD = +15 kV (contact)1 , Top view 0.39 +0.01 -0.03 0.05 MAX. 0.65 ± 0.05 Bottom view 0.6 ± 0.05 2 2 1 1 Cathode


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PDF IEC61000-4-2 IEC61000-4-4 ESD8V0L1B-02LRH ESD8V0L2B-03L ESD8V0L1B-02LRH* ESD8V0L2B-03L* ESD8V0L2B-03LRH* ESD8V0L2B03L 2I k INFINEON marking infineon marking information
2007 - diode Marking Code b3

Abstract: BAR90-02LRH BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4 BFR19
Text: Bottom view 0.4 +0.1 0.6 ± 0.05 0.5 ±0.035 2 1 ± 0.05 3 0.65 ± 0.05 3 1) 2 1 , x 0.6 x 0.4 mm · Max. working voltage: ±8 / +14 V · Very low capacitance down to 2 pF · Very low reverse current < 1 nA typ. · Very low series inductance down to 0.4 nH · Pb-free (RoHS compliant , VESD kV ESD8V0L1B-02LRH 25 ESD8V0L2B., between all pins 15 Peak pulse current (tp = , voltage VRWM Breakdown voltage V V(BR) Reverse current IR nA VR = 3 V, between all


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 diode Marking Code b3 BAR90-02LRH BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4 BFR19
2007 - INFINEON marking

Abstract: marking code INFINEON DIODE MARKING CODE B3 marking code STB marking R01 BAR90-02LRH BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4
Text: Package TSLP-3-1 ESD8V0L. Package Outline Bottom view 0.4 +0.1 0.6 ± 0.05 0.5 ±0.035 2 , x 0.6 x 0.4 mm · Max. working voltage: ±8 / +14 V · Very low capacitance down to 2 pF · Very low reverse current < 1 nA typ. · Very low series inductance down to 0.4 nH · Pb-free (RoHS compliant , VESD kV ESD8V0L1B-02LRH 25 ESD8V0L2B., between all pins 15 Peak pulse current (tp = , current IR nA VR = 3 V, between all pins Clamping voltage for ESD8V0L2B. V VCL VESD


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 INFINEON marking marking code INFINEON DIODE MARKING CODE B3 marking code STB marking R01 BAR90-02LRH BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4
2007 - Not Available

Abstract: No abstract text available
Text: 0.4 mm · Max. working voltage: ±8 / +14 V · Very low capacitance down to 2 pF · Very low reverse current < 1 nA typ. · Very low series inductance down to 0.4 nH · Pb-free (RoHS compliant) package · , ESD contact discharge1) ESD8V0L1B-02LRH ESD8V0L2B., between all pins Peak pulse current ( tp = 8 , , from pin 1 to 2, ESD8V0L2B. Reverse current VR = 3 V, between all pins Clamping voltage for ESD8V0L2B , +0.01 -0.03 0.05 MAX. 0.65 ± 0.05 Bottom view 0.6 ± 0.05 2 2 1 1 Cathode marking 0.5


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 ESD8V0L1B-02LRH
2007 - INFINEON marking

Abstract: diode Marking Code b3 BAR90-02LRH BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4 TSLP
Text: 2009-07-07 Package TSLP-3-1 ESD8V0L. Package Outline Bottom view 0.4 +0.1 0.6 ± 0.05 0.5 , x 0.6 x 0.4 mm · Max. working voltage: -8 / +14 V or +8 / -14 V · Very low capacitance down to 2 pF · Very low reverse current < 1 nA typ. · Very low series inductance down to 0.4 nH · Pb-free , discharge1) Value VESD Unit kV ESD8V0L1B-02LRH 25 ESD8V0L2B., between all pins 15 , , between all pins Clamping voltage for ESD8V0L2B. V VCL VESD = +15 kV (contact)1) , from pin


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 INFINEON marking diode Marking Code b3 BAR90-02LRH BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4 TSLP
2007 - R50b

Abstract: ADS8326 OPA365 REF5020 REF5025 REF5030 REF5040 REF5050 OPA376 SBOS410
Text: ACCURACY: ­ High-Grade: 0.05 % (max) ­ Standard-Grade: 0.1% (max) LOW NOISE: 3VPP/V HIGH OUTPUT CURRENT , ( 0.05 %) are achieved using proprietary design techniques. These features, combined with very-low noise , thereto appears at the end of this data sheet. All trademarks are the property of their respective owners , testing of all parameters. Copyright © 2007, Texas Instruments Incorporated REF5020, REF5025 , damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate


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PDF REF5020, REF5025 REF5030, REF5040 REF5045, REF5050 SBOS410 REF50xx R50b ADS8326 OPA365 REF5020 REF5025 REF5030 REF5040 REF5050 OPA376 SBOS410
2007 - Not Available

Abstract: No abstract text available
Text: : 3ppm/°C (max) ­ Standard-Grade: 8ppm/°C (max) HIGH ACCURACY: ­ High-Grade: 0.05 % (max) ­ Standard-Grade , . Excellent temperature drift (3ppm/°C) and high accuracy ( 0.05 %) are achieved using proprietary design , disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective , . Production processing does not necessarily include testing of all parameters. REF5020, , REF5025 REF5030 , ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions


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PDF REF5020, REF5025 REF5030, REF5040 REF5045, REF5050 SBOS410 REF50xx
2007 - Not Available

Abstract: No abstract text available
Text: : 3ppm/°C (max) ­ Standard-Grade: 8ppm/°C (max) HIGH ACCURACY: ­ High-Grade: 0.05 % (max) ­ Standard-Grade , . Excellent temperature drift (3ppm/°C) and high accuracy ( 0.05 %) are achieved using proprietary design , disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective , . Production processing does not necessarily include testing of all parameters. REF5020, , REF5025 REF5030 , ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions


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PDF REF5020, REF5025 REF5030, REF5040 REF5045, REF5050 SBOS410 REF50xx
2007 - Not Available

Abstract: No abstract text available
Text: : 3ppm/°C (max) ­ Standard-Grade: 8ppm/°C (max) HIGH ACCURACY: ­ High-Grade: 0.05 % (max) ­ Standard-Grade , . Excellent temperature drift (3ppm/°C) and high accuracy ( 0.05 %) are achieved using proprietary design , disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective , . Production processing does not necessarily include testing of all parameters. REF5020, , REF5025 REF5030 , ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions


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PDF REF5020, REF5025 REF5030, REF5040 REF5045, REF5050 SBOS410 REF50xx
2007 - r50f

Abstract: REF5050 REF5050IDR ADS8326 OPA365 REF5020 REF5025 REF5030 REF5040 OPA376
Text: ACCURACY: ­ High-Grade: 0.05 % (max) ­ Standard-Grade: 0.1% (max) LOW NOISE: 3VPP/V HIGH OUTPUT CURRENT , ( 0.05 %) are achieved using proprietary design techniques. These features, combined with very-low noise , thereto appears at the end of this data sheet. All trademarks are the property of their respective owners , testing of all parameters. Copyright © 2007, Texas Instruments Incorporated REF5020, REF5025 , damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate


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PDF REF5020, REF5025 REF5030, REF5040 REF5045, REF5050 SBOS410 REF50xx r50f REF5050 REF5050IDR ADS8326 OPA365 REF5020 REF5025 REF5030 REF5040 OPA376
2007 - REF5040

Abstract: No abstract text available
Text: : 3ppm/°C (max) ­ Standard-Grade: 8ppm/°C (max) HIGH ACCURACY: ­ High-Grade: 0.05 % (max) ­ Standard-Grade , . Excellent temperature drift (3ppm/°C) and high accuracy ( 0.05 %) are achieved using proprietary design , disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective , . Production processing does not necessarily include testing of all parameters. REF5020, , REF5025 REF5030 , ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions


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PDF REF5020, REF5025 REF5030, REF5040 REF5045, REF5050 SBOS410 REF50xx
2009 - Not Available

Abstract: No abstract text available
Text: (0.175 ± 0.05 ) (0.175 ± 0.05 ) D3 D2 D1 C3 C2 C1 0.4 B3 A3 B1 A2 A1 C 2 x 0.4 = 0.8 0.08 C 11x COPLANARITY 11x ø 0.05 M A B A 1.55 ± 0.05 0.1 C 3 x 0.4 = 1.2 SEATING PLANE 3) 0.2 ± 0.05 STANDOFF Pin 1 Corner Index Area 2) B 0.4 , München, Germany © Infineon Technologies AG 2009. All Rights Reserved. Legal Disclaimer The , Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation


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PDF BGF124 WLP-11-4-N-PO WLP-11-4 WLP-11-4-N-FP WLP-11-4-N-TP BGF124
2005 - SNVS372B

Abstract: lm4132
Text: - 0.05 -0.1 -0.2 - 0.4 -0.5 0.05 0.1 0.2 0.4 0.5 10 20 20 20 20 30 60 100 7 120 % ppm / °C , (A Grade - 0.05 %) (B Grade - 0.1%) (C Grade - 0.2%) (D Grade - 0.4 %) (E Grade - 0.5%) 0°C TJ + 85°C -40°C TJ +125°C - 0.05 -0.1 -0.2 - 0.4 -0.5 0.05 0.1 0.2 0.4 0.5 10 20 20 20 20 30 60 100 7 120 , 0.1%) (C Grade - 0.2%) (D Grade - 0.4 %) (E Grade - 0.5%) 0°C TJ + 85°C -40°C TJ +125°C - 0.05 -0.1 -0.2 - 0.4 -0.5 0.05 0.1 0.2 0.4 0.5 10 20 20 20 20 30 60 100 7 120 % ppm / °C -40°C


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PDF LM4132 SNVS372B LM4132 OT-23 10ppm/ 400mV OT23-5 SNVS372B
2009 - BGF125

Abstract: No abstract text available
Text: Talk, ZS = ZL = 50 Package Outlines Solder balls face up 0.6 ± 0.05 B 0.4 C (0.175 ± 0.05 ) C1 C2 B2 B3 A2 A3 2 x 0.4 = 0.8 8x 0.08 C 8x COPLANARITY ø0.05 M A B A C3 B1 0.4 2 x 0.4 = 0.8 (0.175 ± 0.05 ) 0.25 ±0.04 1) 1.15 ± 0.05 0.1 C , Technologies AG 81726 München, Germany © Infineon Technologies AG 2009. All Rights Reserved. Legal , , Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including


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PDF BGF125 WLP-8-10-N-PO WLP-8-10 WLP-8-10-N-FP WLP-8-10-N-TP BGF125
17556

Abstract: No abstract text available
Text: PACKAGE DIAGRAM 'TLINES SIDEBRAZE REV 04 05 DCN 17553 22249 _DESCRIPTION_ UPDATED TO , NOTES: (UNLESS OTHERWISE SPECIEIED) 1. ALL DIMENSIONS ARE IN INCHES. 2. BSC - BASIC LEAD SPACING , .520 00 BSC 100 20 .015 .050 . 005 . 005 .060 .065 L—M —5851 0 JEDEC TOLERANCES UNLESS , OTHERWISE SPECIEIED) 1. ALL DIMENSIONS ARE IN INCHES. 2. BSC - BASIC LEAD SPACING BETWEEN CENTERS. 5 , 22 AA5 .060 .050 .065 . 005 MIL—M —5851 0 JEDEC TOLERANCES UNLESS OTHERWISE SPECIEIED FRAC


OCR Scan
PDF C20-1 C68-1 17556
2007 - diode MARKING b3

Abstract: No abstract text available
Text: 2.4 ±0.15 10° MAX. 0.4 +0.1 - 0.05 1) 1 2 10° MAX. C 0.95 1.9 0.08.0.1 A , 0.6 x 0.4 mm · Max. working voltage: ±8 / +14 V · Very low capacitance down to 2 pF · Very low reverse current < 0.1 µA · Very low series inductance down to 0.4 nH · Pb-free (RoHS compliant) package · , specified Parameter ESD contact discharge1) ESD8V0L1B-02LRH ESD8V0L2B., between all pins Peak pulse , VCL Values typ. <1 max. 14 100 Unit V Reverse current VR = 3 V, between all pins -


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 ESD8V0L1B-02LRH diode MARKING b3
2009 - Not Available

Abstract: No abstract text available
Text: Index Area 2) 0.1 C C B 0.4 (0.175 ± 0.05 ) (0.175 ± 0.05 ) C1 A1 C2 B3 A2 A3 2 x 0.4 = 0.8 8x 0.08 C 8x COPLANARITY ø 0.05 M A B A C3 B2 0.4 2 x 0.4 , Technologies AG 2009. All Rights Reserved. Legal Disclaimer The information given in this document shall in , information regarding the application of the device, Infineon Technologies hereby disclaims any and all , protection circuit for control data lines of an HDMI interface. All external IOs are protected against ESD


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PDF BGF128
2009 - Not Available

Abstract: No abstract text available
Text: 1.0 x 0.6 x 0.4 mm • Max. working voltage: -8 / +14 V or +8 / -14 V • Ultra low dynamic , . • Very low series inductance down to 0.4 nH • Pb-free (RoHS compliant) package Applications â , ) Value VESD Unit kV ESD8V0L1B. 25 ESD8V0L2B., between all pins 15 Peak pulse , VRWM Breakdown voltage V V(BR) Reverse current IR nA VR = 3 V, between all pins , . Package Outline Top view Bottom view 0.39 +0.01 -0.03 0.6 ± 0.05 0.05 MAX. 1 1 0.25 Â


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5
2009 - BGF124

Abstract: No abstract text available
Text: face up 1.15 ± 0.05 (0.175 ± 0.05 ) (0.175 ± 0.05 ) D2 D1 C3 C2 C1 0.4 B3 A3 B1 A2 A1 C 2 x 0.4 = 0.8 0.08 C 11x COPLANARITY 11x ø0.05 M A B 1.55 ± 0.05 D3 A 0.25 ±0.04 1) (0.175 ± 0.05 ) 0.1 C 3 x 0.4 = 1.2 SEATING PLANE 3) 0.2 ± 0.05 STANDOFF Pin 1 Corner Index Area 2) B 0.4 0.6 ± 0.05 (0.175 ± 0.05 ) Solder balls face down , München, Germany © Infineon Technologies AG 2009. All Rights Reserved. Legal Disclaimer The


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PDF BGF124 WLP-11-4-N-PO WLP-11-4 WLP-11-4-N-FP WLP-11-4-N-TP BGF124
2009 - ESD8V0L1B-02EL

Abstract: No abstract text available
Text: 0.4 mm · Max. working voltage: -8 / +14 V or +8 / -14 V · Ultra low dynamic resistance down to 0.3 · , down to 0.4 nH · Pb-free (RoHS compliant) package Applications · USB 2.0, 10/100 Ethernet, Firewire , Symbol VESD Value Unit ESD contact discharge1) ESD8V0L1B. ESD8V0L2B., between all pins Peak pulse , 14 50 V Reverse current VR = 3 V, between all pins IR VCL - nA V Clamping voltage , . Package Outline Top view 0.39 +0.01 -0.03 0.05 MAX. 0.65 ± 0.05 Bottom view 0.6 ± 0.05 2 2 1


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 ESD8V0L1B-02EL
2007 - BAR90-02LRH

Abstract: BCW66 BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4 ESD8V0L2B-03LRH marking code STB
Text: 2007-02-20 Package TSLP-3-1 ESD8V0L. Package Outline Bottom view 0.4 +0.1 0.6 ± 0.05 0.5 , to 1.0 x 0.6 x 0.4 mm · Max. working voltage: ±8 / +14 V · Very low capacitance down to 2 pF · Very low reverse current < 0.1 µA · Very low series inductance down to 0.4 nH Applications · USB 2.0 , all pins 15 Peak pulse current (tp = 8 / 20 µs)2) A I pp ESD8V0L1B-02LRH 2.5 , VR = 3 V, between all pins Clamping voltage for ESD8V0L2B. V VCL VESD = +15 kV (contact


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 ESD8V0L1B-02LRH ESD8V0L2B-03L ESD8V0L2B-03LRH BAR90-02LRH BCW66 BFR193L3 ESD8V0L1B-02LRH ESD8V0L2B-03L IEC61000-4-4 ESD8V0L2B-03LRH marking code STB
2009 - ESD8V0L1B-02LRH

Abstract: ESD8V0L1B-02EL TSLP-2-18 TSLP-2-17 PF137
Text: 0.4 mm · Max. working voltage: -8 / +14 V or +8 / -14 V · Ultra low dynamic resistance down to 0.3 · , down to 0.4 nH · Pb-free (RoHS compliant) package Applications · USB 2.0, 10/100 Ethernet, Firewire , Symbol VESD Value Unit ESD contact discharge1) ESD8V0L1B. ESD8V0L2B., between all pins Peak pulse , 14 50 V Reverse current VR = 3 V, between all pins IR VCL - nA V Clamping voltage , . Package Outline Top view 0.39 +0.01 -0.03 0.05 MAX. 0.65 ± 0.05 Bottom view 0.6 ± 0.05 2 2 1


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5 ESD8V0L1B-02LRH ESD8V0L1B-02EL TSLP-2-18 TSLP-2-17 PF137
2009 - BGF128

Abstract: hdmi interface
Text: GND. Package Outlines Solder balls face up 0.6 ± 0.05 B 0.4 C (0.175 ± 0.05 ) C1 A1 , 0.4 2 x 0.4 = 0.8 (0.175 ± 0.05 ) 0.25 ±0.04 1) 1.15 ± 0.05 0.1 C (0.175 ± 0.05 ) Pin , Technologies AG 2009. All Rights Reserved. Legal Disclaimer The information given in this document shall in , information regarding the application of the device, Infineon Technologies hereby disclaims any and all , circuit for control data lines of an HDMI interface. All external IOs are protected against ESD pulses of


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PDF BGF128 BGF128 hdmi interface
2009 - Not Available

Abstract: No abstract text available
Text: 1.0 x 0.6 x 0.4 mm • Max. working voltage: -8 / +14 V or +8 / -14 V • Ultra low dynamic , . • Very low series inductance down to 0.4 nH • Pb-free (RoHS compliant) package Applications â , ) VESD Value Unit kV ESD8V0L1B. 25 ESD8V0L2B., between all pins 15 Peak pulse , VRWM Breakdown voltage V V(BR) Reverse current IR nA VR = 3 V, between all pins , . Package Outline Top view Bottom view 0.39 +0.01 -0.03 0.6 ± 0.05 0.05 MAX. 1 1 0.25 Â


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PDF IEC61000-4-2 IEC61000-4-4 IEC61000-4-5
2009 - BGF128

Abstract: No abstract text available
Text: GND. Package Outlines Solder balls face up 0.6 ± 0.05 B 0.4 C (0.175 ± 0.05 ) C1 A1 , 0.4 2 x 0.4 = 0.8 (0.175 ± 0.05 ) 0.25 ±0.04 1) 1.15 ± 0.05 0.1 C (0.175 ± 0.05 ) Pin , Technologies AG 2009. All Rights Reserved. Legal Disclaimer The information given in this document shall in , information regarding the application of the device, Infineon Technologies hereby disclaims any and all , circuit for control data lines of an HDMI interface. All external IOs are protected against ESD pulses of


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PDF BGF128 BGF128
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