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Part Manufacturer Description Datasheet Download Buy Part
TPS65053RGETG4 Texas Instruments Configurable Integrated Power Management (PMIC) with 2 DC/DC converters and 3 LDOs 24-VQFN -40 to 85
TPS650532RGET Texas Instruments Configurable Integrated Power Management (PMIC) with 2 DC/DC converters and 3 LDOs 24-VQFN -40 to 85
PDRV5053EAQDBZT Texas Instruments MAGNETIC FIELD SENSOR-HALL EFFECT
DRV5053VAQDBZT Texas Instruments 2.5 to 38 V Bipolar Output Hall Effect Sensor Family 3-SOT-23 -40 to 125
DRV5053EAEDBZTQ1 Texas Instruments Automotive, 2.7 V to 38 V Bipolar Output Hall Effect Sensor Family 3-SOT-23 -40 to 150
DRV5053OAELPGQ1 Texas Instruments Automotive, 2.7 V to 38 V Bipolar Output Hall Effect Sensor Family 3-TO-92 -40 to 150
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CDG1BA50-530 SMC Corporation of America Allied Electronics & Automation - $177.49 $177.49
CDG1BA50-534 SMC Corporation of America Allied Electronics & Automation - $177.49 $177.49
NCDGBA50-5300-X142US SMC Corporation of America Allied Electronics & Automation - $209.20 $209.20

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BA 5053 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1.0 k mef 250

Abstract: ME4003 BC187 BC185 2N5173 2n4121 2n3072 2N2959 transistor me6101 2.2 k mef 250
Text: 20 20 20 4816 4817 4818 4819 4820 4821 4822 5052 5053 5054 5391 5392 5393 21


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PDF semi-820 BYX22-400 BYX22-600 BYX22-800 BYX26-60 YX26-150 BYX36-1 BYX36-300 1.0 k mef 250 ME4003 BC187 BC185 2N5173 2n4121 2n3072 2N2959 transistor me6101 2.2 k mef 250
2001 - BA 5053

Abstract: A9-A11 T6N 700 DDR266B MT46V16M8 MT46V32M4 MT46V8M16
Text: # A0-A11 RA BA0,1 BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row , BA CA = Column Address BA = Bank Address EN AP = Enable Auto Precharge DIS AP = Disable Auto


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PDF 128Mb: MT46V32M4 MT46V16M8 MT46V8M16 128Mx4x8x16DDR BA 5053 A9-A11 T6N 700 DDR266B MT46V16M8 MT46V32M4 MT46V8M16
BA 5053

Abstract: No abstract text available
Text: MITSUBISHI RF POWER MODULE bSMTôÉ?1 0Q17273 } l t a - - h ba " T M57788L 400-430MHZ, 12.5V, 40W, FM MOBILE RADIO OUTLINE DRAWING Dimansions in mm BLOCK DIAGRAM © > © hK >M > hhi> PIN : ® Pin : RF INPUT @VCC1 : 1st. DC SUPPLY @VCC2 : 2nd. DC SUPPLY 0VCC3 : 3rd. DC SUPPLY @PO : RF OUTPUT ®G N D : FIN ABSOLUTE MAXIMUM RATINGS (Tc = 25°C unless , Vcc (V) 7 5 3 10 0.7 0.5 0.3 0.2 f = 430MHz Pir = 0.3W Zg = Z l = 5053 0.1 12 14


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PDF 0Q17273 M57788L 400-430MHZ, 430MHz BA 5053
2001 - BA 5053

Abstract: Bt 2313 64M4 MT46V64M4 MT46V32M8 MT46V16M16 DDR266B DDR266A DDR200 micron ddr
Text: T2 NOP CK CKE HIGH CS# RAS# CAS# WE# A0-A12 RA BA0,1 BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row in a Specific Bank T3 T4 T5 , CA EN AP A10 DIS AP BA0,1 BA CA = Column Address BA = Bank Address EN AP = Enable


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PDF 256Mb: MT46V64M4 MT46V32M8 MT46V16M16 256Mx4x8x16DDR BA 5053 Bt 2313 64M4 MT46V64M4 MT46V32M8 MT46V16M16 DDR266B DDR266A DDR200 micron ddr
2000 - 67512

Abstract: T6N 700 MT46V32M16 MT46V128M4 MT46V64M8 64M8 MT46V64M8 equivalent
Text: # CAS# WE# A0-A12 RA BA0,1 BA RA = Row Address BA = Bank Address Figure 4


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PDF 512Mb: MT46V128M4 MT46V64M8 MT46V32M16 128M4 32M16 66-pin 512Mx4x8x16DDR 67512 T6N 700 MT46V32M16 MT46V128M4 MT46V64M8 64M8 MT46V64M8 equivalent
2001 - BA 5053 circuit diagram

Abstract: BA 5053
Text: BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row in a Specific Bank T3 , A10 DIS AP BA0,1 BA CA = Column Address BA = Bank Address EN AP = Enable Auto Precharge DIS


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PDF 128Mb: 128Mx4x8x16DDR BA 5053 circuit diagram BA 5053
2001 - Not Available

Abstract: No abstract text available
Text: defined by t RRD. CK# CK CKE CS# HIGH RAS# CAS# WE# A0-A12 RA BA0,1 BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row in a Specific Bank T0 CK# CK COMMAND , AP CA EN AP BA0,1 BA CA = Column Address BA = Bank Address EN AP = Enable Auto Precharge


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PDF 256Mb: 256Mx4x8x16DDR
2001 - T6N 700

Abstract: MT46V32M16TG-xx DDR266B MT46V128M4 MT46V32M16 DDR200 PC2100 marking C.S BA 5053 MT46V64M8
Text: # A0-A12 RA BA0,1 BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row


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PDF 512Mb: MT46V128M4 MT46V64M8 MT46V32M16 66-Pin 512Mx4x8x16DDR T6N 700 MT46V32M16TG-xx DDR266B MT46V128M4 MT46V32M16 DDR200 PC2100 marking C.S BA 5053 MT46V64M8
2001 - 57256

Abstract: DDR200 DDR266B MT46V16M16 MT46V32M8 MT46V64M4
Text: BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row in a Specific Bank


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PDF 256Mb: MT46V64M4 MT46V32M8 MT46V16M16 256Mx4x8x16DDR 57256 DDR200 DDR266B MT46V16M16 MT46V32M8 MT46V64M4
2001 - MT46V32M16TG-xx

Abstract: No abstract text available
Text: defined by t RRD. CK# CK CKE CS# HIGH RAS# CAS# WE# A0-A12 RA BA0,1 BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row in a Specific Bank T0 CK# CK COMMAND , DIS AP BA0,1 BA CA = Column Address BA = Bank Address EN AP = Enable Auto Precharge DIS AP =


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PDF 512Mb: 512Mx4x8x16DDR MT46V32M16TG-xx
2000 - DDR266A

Abstract: MT46V16M8 MT46V32M4 MT46V8M16 MT46 Bt 2313
Text: ,1 BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row in a Specific


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PDF 128Mb: MT46V32M4 MT46V16M8 MT46V8M16 128Mx4x8x16DDR DDR266A MT46V16M8 MT46V32M4 MT46V8M16 MT46 Bt 2313
2000 - Not Available

Abstract: No abstract text available
Text: BA RA = Row Address BA = Bank Address Figure 4 Activating a Specific Row in a Specific Bank , , A12 x16: A9, A11, A12 A10 DIS AP CA EN AP BA0,1 BA CA = Column Address BA = Bank Address


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PDF 256Mb: 256Mx4x8x16DDR
potenciometro 1k

Abstract: POTENCIOMETRO potenciometro LINEAR potenciometro 100 K potenciometro 104 linear potenciometer PTC-10 potenciometro 10 K potenciometer BA 5053
Text: A 4 5 V Ê 1 « ti - - Q Fig. 1 / Réf. 5016 J0 « . Fig. 2 / Réf. 5053 0 4.9 , / Potentiometer with spindle: only spindle Forma de Pedido ba )o< How to order spedai PTCtO LH 01 104 + N.a DE


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PDF PTC-10 potenciometro 1k POTENCIOMETRO potenciometro LINEAR potenciometro 100 K potenciometro 104 linear potenciometer PTC-10 potenciometro 10 K potenciometer BA 5053
zbz G156

Abstract: ZBZ M156 ZBV B3 zbv m zbv bg5 ZBZ VG XB4 schneider zbv m1 ZBV BG1 BA 5053
Text: supply light block for BA 9s bulb, ZBV 6. (3) Block for use a light blocks integral LED types ZBV Gp , ) (IP5X, 50 m dust) 5 N/C 1 ­ Low power switching ZB4 BZ1043 1 1 ZBE 5053 n 0 , blocks with BA 9s base fitting Complete body/contact assemblies and light blocks (1) For bulb with BA 9s base fitting (incandescent, neon or LED) Screw clamp terminal connections (Schneider Electric , Harmony® XB4, metal Light bodies for pilot lights with BA 9s base fitting To combine with: heads, see


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PDF 36060-EN/2 36067-EN/2 BZ009 36071-EN/4. BV156 36022-EN/2 36068-EN 36020-EN/2 zbz G156 ZBZ M156 ZBV B3 zbv m zbv bg5 ZBZ VG XB4 schneider zbv m1 ZBV BG1 BA 5053
1998 - MSM6408

Abstract: QFP44 CI 5541 L0619 SAB 3210 DCA34 DICT 393b
Text: ¨1 TPB n2 50­53 1 1 Skip if Pbitn21 RPB n2 60­63 1 1 Pbitn2¨0 SPB n2 , 3F 3 4 PC¨a13 CZP a Ba 1 4 ST¨PC1PC¨2aSP¨SP-4 CAL a12 Aa12 2 4


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PDF J2E0014-38-93 MSM6408 MSM6408 MSM6408CMOS1 I/O36 32RAM 42DIP DIP42-P-600-2 MSM6408-xxxRS 44QFP QFP44 CI 5541 L0619 SAB 3210 DCA34 DICT 393b
3DD52

Abstract: AN 7073 SAB 3210 3DC5 CI 5541 DCA34 MSM6408 msm64084 QFP44
Text: ¨1 TPB n2 50­53 1 1 Skip if Pbitn21 RPB n2 60­63 1 1 Pbitn2¨0 SPB n2 , 3F 3 4 PC¨a13 CZP a Ba 1 4 ST¨PC1PC¨2aSP¨SP-4 CAL a12 Aa12 2 4


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PDF J2E0014-38-93 MSM6408 MSM6408 MSM6408CMOS1 I/O36 32RAM 42DIP DIP42-P-600-2 MSM6408-xxxRS 44QFP 3DD52 AN 7073 SAB 3210 3DC5 CI 5541 DCA34 msm64084 QFP44
NAF-0602

Abstract: WES-1334 MARKING CODE WM9 WD-26p WD-26P thomas and betts WCCP1-25S BP-0273 WC-125 D882 pm 75 hep 154 silicon diode
Text: No file text available


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PDF S-2205/Technical NAF-0602 WES-1334 MARKING CODE WM9 WD-26p WD-26P thomas and betts WCCP1-25S BP-0273 WC-125 D882 pm 75 hep 154 silicon diode
2006 - 16MX16

Abstract: No abstract text available
Text: required to issue MRS command. BA1 BA 0 A 12 to A3 A2 A1 A0 Address Bus 0 , RFU DLL TM CAS Latency BT Burst Length A8 0 1 BA 0 0 1 An ~ A0 DLL Reset No Yes , Bank Activation Timing (CAS Latency = 2; Burst Length = Any) T0 T1 T2 tRAS(min) tRCD(min) CK, CK BA , , CK Command DQS DQ D0 D1 D2 D3 ACT NOP R/w AP NOP NOP NOP NOP BA NOP T4 T5 T6 tRP(min) T7 T8 T9 , , CK Command BA NOP NOP RD AP NOP NOP NOP BA NOP NOP DQS DQ D0 D1 D2 D3 CAS Latency


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PDF V58C2256 16Mbit DDR400 DDR333 DDR266 16MX16
2005 - Not Available

Abstract: No abstract text available
Text: all banks precharge state. 2. Minimum tRP is required to issue MRS command. BA1 BA 0 A 12 , A8 0 1 BA 0 0 1 An ~ A0 DLL Reset No Yes A7 0 1 mode Normal Test A4 0 1 0 1 0 1 0 1 Latency , Length = Any) T0 T1 T2 tRAS(min) tRCD(min) CK, CK BA /Address Command Bank/Row Activate/A Bank/Col Read/A , D3 ACT NOP R/w AP NOP NOP NOP NOP BA NOP T4 T5 T6 tRP(min) T7 T8 T9 Begin Autoprecharge Earliest , , 2.5 Burst Length = 4) T0 T1 T2 T3 T4 T5 T6 tRP(min) T7 T8 T9 tRAS(min) CK, CK Command BA NOP NOP RD


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PDF V58C2256 16Mbit DDR400 DDR333 DDR266
2007 - Not Available

Abstract: No abstract text available
Text: all banks precharge state. 2. Minimum tRP is required to issue MRS command. BA1 BA 0 A 12 , A8 0 1 BA 0 0 1 An ~ A0 DLL Reset No Yes A7 0 1 mode Normal Test A4 0 1 0 1 0 1 0 1 Latency , Length = Any) T0 T1 T2 tRAS(min) tRCD(min) CK, CK BA /Address Command Bank/Row Activate/A Bank/Col Read/A , , CK Command DQS DQ D0 D1 D2 D3 ACT NOP R/w AP NOP NOP NOP NOP BA NOP T4 T5 T6 tRP(min) T7 T8 T9 , , CK Command BA NOP NOP RD AP NOP NOP NOP BA NOP NOP DQS DQ D0 D1 D2 D3 CAS Latency


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PDF V58C2512 16Mbit 32Mbit DDR400 DDR333 200MHz
2003 - Not Available

Abstract: No abstract text available
Text: . Minimum tRP is required to issue MRS command. BA1 0 MRS 0 to A 12 BA 0 MRS A3 , Interleave 1 Half 1 Disable 1 1 Yes 1 Test Burst Length CAS Latency BA 0 , +1 Tn+2 Tn+3 Tn+4 Tn+5 tRC tRP(min) tRAS(min) tRRD(min) tRCD(min) CK, CK BA , NOP NOP NOP BA NOP DQS D0 DQ D1 D2 D3 Begin Autoprecharge Earliest , NOP tRP(min) CK, CK Command BA NOP NOP RD AP NOP NOP NOP BA DQS D0


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PDF V58C2256 16Mbit DDR400 DDR333 DDR266
2005 - Not Available

Abstract: No abstract text available
Text: required to issue MRS command. BA1 BA 0 A 11 to A3 A2 A1 A0 Address Bus 0 , RFU DLL TM CAS Latency BT Burst Length A8 0 1 BA 0 0 1 An ~ A0 DLL Reset No Yes , Bank Activation Timing (CAS Latency = 2; Burst Length = Any) T0 T1 T2 tRAS(min) tRCD(min) CK, CK BA , T2 T3 tRAS(min) CK, CK Command DQS DQ D0 D1 D2 D3 ACT NOP R/w AP NOP NOP NOP NOP BA NOP T4 T5 T6 tRP , T8 T9 tRAS(min) CK, CK Command BA NOP NOP RD AP NOP NOP NOP BA NOP NOP DQS DQ D0 D1


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PDF V58C2128 DDR500 DDR400 DDR333
2005 - Not Available

Abstract: No abstract text available
Text: . Minimum tRP is required to issue MRS command. BA1 0 MRS 0 to A 12 BA 0 MRS A3 , Interleave 1 Half 1 Disable 1 1 Yes 1 Test Burst Length CAS Latency BA 0 , +1 Tn+2 Tn+3 Tn+4 Tn+5 tRC tRP(min) tRAS(min) tRRD(min) tRCD(min) CK, CK BA , NOP NOP NOP NOP BA NOP DQS D0 DQ D1 D2 D3 Begin Autoprecharge , NOP tRP(min) CK, CK Command BA NOP NOP RD AP NOP NOP NOP BA DQS D0


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PDF V58C2256 16Mbit DDR400 DDR333 DDR266
2005 - Not Available

Abstract: No abstract text available
Text: required to issue MRS command. BA1 BA 0 A 12 to A3 A2 A1 A0 Address Bus 0 , RFU DLL TM CAS Latency BT Burst Length A8 0 1 BA 0 0 1 An ~ A0 DLL Reset No Yes , Bank Activation Timing (CAS Latency = 2; Burst Length = Any) T0 T1 T2 tRAS(min) tRCD(min) CK, CK BA , , CK Command DQS DQ D0 D1 D2 D3 ACT NOP R/w AP NOP NOP NOP NOP BA NOP T4 T5 T6 tRP(min) T7 T8 T9 , , CK Command BA NOP NOP RD AP NOP NOP NOP BA NOP NOP DQS DQ D0 D1 D2 D3 CAS Latency


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PDF V58C2256 16Mbit DDR400 DDR333 DDR266
2005 - Not Available

Abstract: No abstract text available
Text: only at all banks precharge state. 2. Minimum tRP is required to issue MRS command. BA1 BA 0 A , Burst Length A8 0 1 BA 0 0 1 An ~ A0 DLL Reset No Yes A7 0 1 mode Normal Test A4 0 1 0 1 0 1 , (CAS Latency = 2; Burst Length = Any) T0 T1 T2 tRAS(min) tRCD(min) CK, CK BA /Address Command Bank/Row , D3 ACT NOP R/w AP NOP NOP NOP NOP BA NOP T4 T5 T6 tRP(min) T7 T8 T9 Begin Autoprecharge Earliest , , 2.5 Burst Length = 4) T0 T1 T2 T3 T4 T5 T6 tRP(min) T7 T8 T9 tRAS(min) CK, CK Command BA NOP NOP RD


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PDF V58C2128 DDR500 DDR400 DDR333
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