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2008 - AN10160

Abstract: PCA9510A VME backplane pinout PCA9510AD PCA9511A PCA9512 PCA9512A PCA9514A
Text: backplane. 06-08-2008 17: 01 :15 They are suitable for use in multi-master I2C/SMBus environments , I2C-SMBus PCA951xA v4.i2 2 06-08-2008 17: 01 :17 PCA9510A/11A/13A/14A pinout diagram PCA9512A pinout , 06-08-2008 17: 01 :18 Selection guide Features PCA9510A PCA9511A PCA9512A PCA9513A PCA9514A , . 1079 NXP I2C-SMBus PCA951xA v4.i4 4 06-08-2008 17: 01 :19 NXP Semiconductors


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PDF PCA951xA PCA951xA AN10160 PCA9510A VME backplane pinout PCA9510AD PCA9511A PCA9512 PCA9512A PCA9514A
2002 - PCD3312P

Abstract: AN255-02 PCA9511DP-T AN10160-01 Philips PCF8583 PCF8593* app note pioneer power amplifier circuit diagram with pcb P82B96 P82B715 PCA9513
Text: range is -40 ºC to 85 ºC. See Philips application note AN10160-01 for more detailed technical , information is presented in application note AN10160-01. Figure 5 shows the PCA9511/12/13/14 used in a , can also be used to translate between 3.3 V and 5 V buses. Refer to Philips application note AN10160-01 , multi-point application. Refer to Philips application note AN10160-01 for more information on the PCA9511/12 , 1.0 V and 5.0 V. See application note AN10145- 01 Bi-Directional Voltage Translators for more


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PDF AN255-02 PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516, PCA9518, P82B96, P82B715 PCD3312P AN255-02 PCA9511DP-T AN10160-01 Philips PCF8583 PCF8593* app note pioneer power amplifier circuit diagram with pcb P82B96 P82B715 PCA9513
2002 - PCD3312P

Abstract: AN10160-01 AN255-02 PCF8593* app note P82B96 LTC4300-2 PCA9516 BZX284-C15 PCA9511D-T PCA9511DP-T
Text: range is -40 ºC to 85 ºC. See Philips application note AN10160-01 for more detailed technical , information is presented in application note AN10160-01. Figure 5 shows the PCA9511/12/13/14 used in a , can also be used to translate between 3.3 V and 5 V buses. Refer to Philips application note AN10160-01 , multi-point application. Refer to Philips application note AN10160-01 for more information on the PCA9511/12 , 1.0 V and 5.0 V. See application note AN10145- 01 Bi-Directional Voltage Translators for more


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PDF AN255-02 PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516, PCA9518, P82B96, P82B715 PCD3312P AN10160-01 AN255-02 PCF8593* app note P82B96 LTC4300-2 PCA9516 BZX284-C15 PCA9511D-T PCA9511DP-T
2004 - AN10160

Abstract: philips master replacement guide IC 24c08 dell MTBF 87C51MX semiconductors master replacement guide 8051 using I2C BUS PCA9564 AN10148 24C08 code example assembly pcf 9515
Text: -232 0 Backplane Length (meters) Semiconductors RS-422 400 kHz 100 kHz 0.1 0.5 LVD , 5 V - Idle detect for live insertion protection · PCA9541/ 01 - defaults to channel 0 on start-up , Number: 9397 750 04323 PCA9500/ 01 Order Number: 9397 750 09897 PCA9504A Order Number: 9397


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PDF 1980s. GTL2010PW, P82B96TD, PCA9551D, PCA9545D, PCA9555D, PCA9557D, PCA9515D PCA9501D AN10160 philips master replacement guide IC 24c08 dell MTBF 87C51MX semiconductors master replacement guide 8051 using I2C BUS PCA9564 AN10148 24C08 code example assembly pcf 9515
2011 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF PCA9510A/11A/12B/13A/14A
2004 - AN10160

Abstract: dell MTBF "VME Backplane" MTBF IPMI "satellite management controller" vita38 intel motherboard wiring diagram A9512 PCA9513 DELL power supply diagram PCA9511
Text: No file text available


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PDF PCA9510/11/12/13/14 PCA9510/11/12/13 PCA9510/11/12/13/14/15 AN10160 dell MTBF "VME Backplane" MTBF IPMI "satellite management controller" vita38 intel motherboard wiring diagram A9512 PCA9513 DELL power supply diagram PCA9511
2002 - SW02147

Abstract: AN10160
Text: . Enable from 0 V to VCC - 0.3 x VCC - - 50 - - - - - - - 0.5 x VCC 0.5 x VCC ± 0.1 130 140 15 1.3 , 100 1.3 0.6 20 + 0.1 x CB 20 + 0.1 x CB NOTES: 1. This specification applies over the full operating , . 5. CB = total capacitance of one bus line in pF. 6. SDA_IN/SCL_IN = 0.1 V, SDA_OUT/SCL_OUT through , 853-2441 01 -A14986 dated 15 December 2003. 2003 Dec 18 20 Philips Semiconductors Product data


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PDF PCA9513; PCA9514 PCA9514 PCA9513 PCA9511, PCA9513, SW02147 AN10160
2003 - PCF8593* app note

Abstract: PCF8565 AN10148 8051 microcontroller LED dot matrix P80C552 PCF8814 8051 microcontroller LED dot matrix 8*8 8*8 led dot MATRIX Driver i2c PCA8565 All nokia mobile ic code image
Text: Purpose 1 Logic 400 KHz 100 KHz 0.1 I2C 0.5 0 RS-485 RS-423 RS-232 Backplane , 5 V - Idle detect for live insertion protection · PCA9541/ 01 - defaults to channel 0 on start-up


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PDF RS-485 RS-423 RS-232 RS-422 P82B96 PCA9555D, PCA9557D, PCA9515D PCA9501D PCF8593* app note PCF8565 AN10148 8051 microcontroller LED dot matrix P80C552 PCF8814 8051 microcontroller LED dot matrix 8*8 8*8 led dot MATRIX Driver i2c PCA8565 All nokia mobile ic code image
2002 - 01a14

Abstract: AN10160
Text: from 0 V to VCC 0.8 - 0.3 x VCC - - 50 - - - - - - - 1.0 0.5 x VCC 0.5 x VCC ± 0.1 130 120 15 , 20 + 0.1 x CB 20 + 0.1 x CB - - - - - - - - - - - 400 - - - - - - - - 300 300 kHz µs , . SDA_IN/SCL_IN = 0.1 V, SDA_OUT/SCL_OUT through resistor to VCC. 7. Delays that can occur after ENABLE and , Description Product data (9397 750 12561); ECN 853-2442 01 -A14987 dated 15 December 2003. 2003 Dec 18 19


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PDF PCA9510; PCA9511 PCA9511 PCA9510 01a14 AN10160
2004 - 01-A15108

Abstract: PCA9514D PCA9514 PCA9513DP PCA9513D PCA9513 PCA9511 JESD78 JESD22-A115 JESD22-A114
Text: from 0 V to VCC - ± 0.1 ±1 µA tEN Enable delay or initialization time - 130 , + 0.1 x CB - 300 ns tr Clock, data rise time Notes 4 and 5 20 + 0.1 x CB - , total capacitance of one bus line in pF. 6. SDA_IN/SCL_IN = 0.1 V, SDA_OUT/SCL_OUT through resistor to , data (9397 750 12609); ECN 853-2441 01 -A15108 dated 06 January 2004. Supersedes data of 18 Dec 2003 , ); ECN 853-2441 01 -A14986 dated 15 December 2003. 2004 Jan 07 20 Philips Semiconductors


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PDF PCA9513; PCA9514 PCA9513 PCA9514 PCA9511, PCA9513, 01-A15108 PCA9514D PCA9513DP PCA9513D PCA9511 JESD78 JESD22-A115 JESD22-A114
2004 - AN10160

Abstract: JESD22-A114 JESD22-A115 JESD78 PCA9512 PCA9517 PCA9518 backplane design cpci
Text: be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge accelerator (about 0.6 V). With great care a system with four buffers may work, but as the VOL moves up from 0.1 V, noise or bounces on the , current ­1 ± 0.1 1 µA tPDOFF ACC delay, on/off - 5 - ns Input­output , and 5 20 + 0.1 × CB - 300 ns tr Clock, data rise time Notes 4 and 5 20 + 0.1


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PDF PCA9512 PCA9512 AN10160 JESD22-A114 JESD22-A115 JESD78 PCA9517 PCA9518 backplane design cpci
2002 - LTC4300-2

Abstract: AN10160
Text: 4 Note 4 Notes 4 and 5 Notes 4 and 5 0 0.5 VCC2 0.5 VCC2 ± 0.1 5 75 - 0.7 VCC2 ±1 - 150 , 1.3 0.6 20 + 0.1 × CB 20 + 0.1 × CB - - - - - - - - - - - 400 - - - - - - - -


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PDF PCA9512 PCA9512 LTC4300-2 AN10160
2002 - LTC4300-2

Abstract: No abstract text available
Text: 4 Note 4 Notes 4 and 5 Notes 4 and 5 0 0.5 VCC2 0.5 VCC2 ± 0.1 5 75 - 0.7 VCC2 ±1 - 150 , 1.3 0.6 20 + 0.1 × CB 20 + 0.1 × CB - - - - - - - - - - - 400 - - - - - - - -


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PDF PCA9512 PCA9512 LTC4300-2
2002 - Not Available

Abstract: No abstract text available
Text: ; Note 1. Note 1. MIN. 2.7 - - LIMITS TYP. - 2.8 0.1 MAX. 5.5 6 - UNIT V mA µA Power supply VCC , . 0.8 50 - 0.3 x VCC - - - - - - - 1.0 110 0.5 x VCC 0.5 x VCC ± 0.1 100 10 150 10 ± 0.1 - , tt Clock, data fall time tr Clock, data rise time 70 - 0 1.3 0.6 0.6 0.6 300 100 1.3 0.6 20 + 0.1 x CB 20 + 0.1 x CB 92 - - - - - - - - - - - - 120 ±5 400 - - - - - - - - , , not production tested. 5. CB = total capacitance of one bus line in pF. 6. SDA_IN/SCL_IN = 0.1 V


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PDF PCA9511; PCA9513; PCA9514 PCA9514 PCA9511, PCA9513,
2009 - JESD22-A114

Abstract: JESD22-A115 JESD78 PCA9511 PCA9512 PCA9517 PCA9518
Text: if lightly loaded the VOL may be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge accelerator (about 0.6 V). With great care a system with four buffers may work, but as the VOL moves up from 0.1 V , input current ­1 ± 0.1 1 µA tPDOFF ACC delay, on/off - 5 - ns , time Notes 4 and 5 20 + 0.1 × CB - 300 ns tr Clock, data rise time Notes 4 and


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PDF PCA9511 PCA9512 PCA9512 JESD22-A114 JESD22-A115 JESD78 PCA9511 PCA9517 PCA9518
2006 - low capacitance buffer

Abstract: PICMG 3.0 Revision 2.0 PICMG 2.0 PCA9518 JESD78 JESD22-A115 JESD22-A114 VME pci TSSOP8 Package compactPCI failure mode
Text: if lightly loaded the VOL may be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge accelerator (about 0.6 V). With great care a system with four buffers may work, but as the VOL moves up from 0.1 V , 0.3VCC 0.5VCC - V - ± 0.1 ±1 µA - 130 - µs 50 120 250 µs , . SDA_IN/SCL_IN = 0.1 V, SDA_OUT/SCL_OUT through resistor to VCC. 7. Delays that can occur after ENABLE


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PDF PCA9511 PCA9510; PCA9511 low capacitance buffer PICMG 3.0 Revision 2.0 PICMG 2.0 PCA9518 JESD78 JESD22-A115 JESD22-A114 VME pci TSSOP8 Package compactPCI failure mode
2006 - JESD22-A114

Abstract: JESD22-A115 JESD78 PCA9510 PCA9511 PCA9517 PCA9518 SW02345 SW02153
Text: if lightly loaded the VOL may be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge accelerator (about 0.6 V). With great care a system with four buffers may work, but as the VOL moves up from 0.1 V , - ± 0.1 ±1 µA tEN Enable delay or initialization time - 130 - µs , tested. 5. Cb = total capacitance of one bus line in pF. 6. SDA_IN/SCL_IN = 0.1 V, SDA_OUT/SCL_OUT


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PDF PCA9510 PCA9510; PCA9511 PCA9510 JESD22-A114 JESD22-A115 JESD78 PCA9517 PCA9518 SW02345 SW02153
2004 - JESD22-A114

Abstract: 01A15 PCA9518 PCA9517 PCA9514 PCA9513 PCA9511 PCA9510 JESD22-A115 01-A15108
Text: , although if lightly loaded the VOL may be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge , 0.1 V, noise or bounces on the line will result in firing the rising edge accelerator thus , Enable input current - ± 0.1 ±1 µA tEN Enable delay or initialization time - , Note 4 0.6 - - µs tt Clock, data fall time Notes 4 and 5 20 + 0.1 × CB -


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PDF PCA9513; PCA9514 PCA9513 PCA9514 PCA9511, PCA9513, JESD22-A114 01A15 PCA9518 PCA9517 PCA9511 PCA9510 JESD22-A115 01-A15108
2004 - JESD22-A114

Abstract: JESD22-A115 JESD78 PCA9510 PCA9511 PCA9517 PCA9518
Text: , although if lightly loaded the VOL may be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge , 0.1 V, noise or bounces on the line will result in firing the rising edge accelerator thus , - ± 0.1 ±1 µA tEN Enable delay or initialization time - 130 - µs , Note 4 0.6 - - µs tt Clock, data fall time Notes 4 and 5 20 + 0.1 x CB -


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PDF PCA9510; PCA9511 PCA9510 PCA9511 JESD22-A114 JESD22-A115 JESD78 PCA9517 PCA9518
2009 - JESD22-A114

Abstract: JESD22-A115 PCA9510 PCA9511 PCA9513 PCA9514 PCA9517 PCA9518 SW02345
Text: be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge accelerator (about 0.6 V). With great care a system with four buffers may work, but as the VOL moves up from 0.1 V, noise or bounces on the , Enable input current - ± 0.1 ±1 µA tEN Enable delay or initialization time - , fall time Notes 4 and 5 20 + 0.1 × CB - 300 ns tr Clock, data rise time Notes


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PDF PCA9513; PCA9514 PCA9513 PCA9514 PCA9511, PCA9513, JESD22-A114 JESD22-A115 PCA9510 PCA9511 PCA9517 PCA9518 SW02345
2009 - PCA9517

Abstract: PCA9518 JESD22-A114 JESD22-A115 JESD78 PCA9511 PCA9511D SW02345 DSAE002976
Text: mA will produce VOL < 0.4 V, although if lightly loaded the VOL may be 0.1 V. Assuming VOL = 0.1 V and VOS = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the , , but as the VOL moves up from 0.1 V, noise or bounces on the line will result in firing the rising , 0.3VCC 0.5VCC - V IEN Enable input current - ± 0.1 ±1 µA tEN Enable , . SDA_IN/SCL_IN = 0.1 V, SDA_OUT/SCL_OUT through resistor to VCC. 7. Delays that can occur after ENABLE


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PDF PCA9511 PCA9511 PCA9517 PCA9518 JESD22-A114 JESD22-A115 JESD78 PCA9511D SW02345 DSAE002976
2009 - AN10160

Abstract: pca9510ad
Text: buffer 8.3 Maximum number of devices in series Each buffer adds about 0.1 V dynamic level offset at , lightly loaded the VOL may be ~ 0.1 V. Assuming VOL = 0.1 V and Voffset = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.1 V below the threshold of the rising edge accelerator (about 0.6 V). With great care a system with four buffers may work, but as the VOL moves up from 0.1 V , VCC VI = VCC or GND [4] [3] 0.5 × VCC 0.7 × VCC V 0.5 × VCC ± 0.1 110 105 30 1.2 0.8 ±0.3 1.9 2.5


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PDF PCA9510A PCA9510A AN10160 pca9510ad
2005 - 9513a

Abstract: PA9513A PA9514A JESD22-A115 P82B96 JESD22-A114 PCA9514A PCA9517 metal detector service manual PCA9511A
Text: PCA9513A; PCA9514A Hot swappable I2C-bus and SMBus bus buffer Rev. 01 - 11 October 2005 , © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 - 11 October 2005 2 of 25 , . Rev. 01 - 11 October 2005 3 of 25 PCA9513A; PCA9514A Philips Semiconductors Hot , Electronics N.V. 2005. All rights reserved. Rev. 01 - 11 October 2005 4 of 25 PCA9513A; PCA9514A , . Rev. 01 - 11 October 2005 5 of 25 PCA9513A; PCA9514A Philips Semiconductors Hot


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PDF PCA9513A; PCA9514A PCA9513A PCA9514A 9513a PA9513A PA9514A JESD22-A115 P82B96 JESD22-A114 PCA9517 metal detector service manual PCA9511A
2005 - AN255

Abstract: JESD22-A114 JESD22-A115 JESD78 P82B96 PCA9510A PCA9511A PCA9517
Text: PCA9510A Hot swappable I2C-bus and SMBus bus buffer Rev. 01 - 8 September 2005 Product data , data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 - 8 , data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 - 8 , Electronics N.V. 2005. All rights reserved. Rev. 01 - 8 September 2005 4 of 23 PCA9510A Philips , series Each buffer adds about 0.1 V dynamic level offset at 25 °C with the offset larger at higher


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PDF PCA9510A PCA9510A AN255 JESD22-A114 JESD22-A115 JESD78 P82B96 PCA9511A PCA9517
2009 - JESD22-A114

Abstract: JESD22-A115 P82B96 PCA9511A PCA9514A PCA9517 PA9514A
Text: buffer adds about 0.1 V dynamic level offset at 25 °C with the offset larger at higher temperatures , specification of 3 mA will produce VOL < 0.4 V, although if lightly loaded the VOL may be 0.1 V. Assuming VOL = 0.1 V and Voffset = 0.1 V, the level after four buffers would be 0.5 V, which is only about 0.3 V , buffers may work, but as the VOL moves up from 0.1 V, noise or bounces on the line will result in firing , pin ENABLE - ± 0.1 ±1 µA enable time [2] - 110 - µs tidle(READY


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PDF PCA9513A; PCA9514A PCA9513A PCA9514A PCA95ns JESD22-A114 JESD22-A115 P82B96 PCA9511A PCA9517 PA9514A
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