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SN74ALS163BDRE4 Texas Instruments Synchronous 4-Bit Binary Counters 16-SOIC 0 to 70
SNJ54ALS163BFK Texas Instruments Synchronous 4-Bit Binary Counters 20-LCCC -55 to 125
SN74ALS163BDR Texas Instruments Synchronous 4-Bit Binary Counters 16-SOIC 0 to 70
SN54ALS163BJ Texas Instruments Synchronous 4-Bit Binary Counters 16-CDIP -55 to 125
SN74ALS163BD Texas Instruments Synchronous 4-Bit Binary Counters 16-SOIC 0 to 70
SN74ALS163BN3 Texas Instruments Synchronous 4-Bit Binary Counters 16-PDIP 0 to 70
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54ALS163B/BFA Rochester Electronics - - -
54ALS163BFK/B Rochester Electronics - - -
54ALS163BJ/883 National Semiconductor Corporation Rochester Electronics 56 $2.48 $2.02
74ALS163BD Rochester Electronics - - -
74ALS163BN Texas Instruments ComS.I.T. 765 - -
DM74ALS163BM Fairchild Semiconductor Corporation Chip One Exchange 20 - -
DM74ALS163BM ON Semiconductor Chip1Stop 1,854 $0.20 $0.17
DM74ALS163BM Fairchild Semiconductor Corporation Rochester Electronics 1,994 $0.29 $0.24
DM74ALS163BMX Fairchild Semiconductor Corporation Rochester Electronics 30,000 $0.29 $0.24
DM74ALS163BMX National Semiconductor Corporation Chip One Exchange 445 - -
DM74ALS163BN National Semiconductor Corporation Chip One Exchange 2,000 - -
DM74ALS163BN Fairchild Semiconductor Corporation America II Electronics 1,773 - -
DM74ALS163BN Fairchild Semiconductor Corporation Chip One Exchange 15 - -
DM74ALS163BN Fairchild Semiconductor Corporation Rochester Electronics 45,530 $0.29 $0.24
SN54ALS163BJ Texas Instruments Avnet 77 $8.29 $7.19
SN54ALS163BJ Texas Instruments Avnet - €8.89 €6.69
SN74ALS163B Texas Instruments Chip One Exchange 80 - -
SN74ALS163BD Texas Instruments Avnet - $0.57 $0.49
SN74ALS163BD Texas Instruments Rochester Electronics 29,700 $0.72 $0.59
SN74ALS163BD Texas Instruments Avnet - €0.77 €0.46
SN74ALS163BD Texas Instruments Texas Instruments 1,173 $1.17 $0.45
SN74ALS163BD Texas Instruments Bristol Electronics 37 - -
SN74ALS163BD Texas Instruments Bristol Electronics 416 - -
SN74ALS163BDBR Texas Instruments Rochester Electronics 4,000 $0.74 $0.60
SN74ALS163BDR Texas Instruments Avnet - $0.47 $0.41
SN74ALS163BDR Texas Instruments America II Electronics 2,500 - -
SN74ALS163BDR Texas Instruments Rochester Electronics 41,200 $0.60 $0.49
SN74ALS163BDR Texas Instruments Bristol Electronics 47 - -
SN74ALS163BN Texas Instruments Bristol Electronics 476 $0.94 $0.30
SN74ALS163BN Texas Instruments Farnell element14 880 £0.85 £0.47
SN74ALS163BN Texas Instruments Bristol Electronics 620 - -
SN74ALS163BN Chip One Exchange 4,000 - -
SN74ALS163BN Texas Instruments Chip One Exchange 1,075 - -
SN74ALS163BN Texas Instruments element14 Asia-Pacific 591 $1.46 $0.54
SN74ALS163BN Texas Instruments Texas Instruments 1,189 $1.08 $0.41
SN74ALS163BN Texas Instruments Avnet - $0.52 $0.45
SN74ALS163BN Texas Instruments Chip1Stop 665 $0.72 $0.56
SN74ALS163BN Texas Instruments Avnet - €0.70 €0.42
SN74ALS163BN3 Texas Instruments Avnet - $0.57 $0.49
SN74ALS163BN3 Motorola Semiconductor Products Chip One Exchange 360 - -
SNJ54ALS163BJ Texas Instruments Avnet - $14.19 $12.29
SNJ54ALS163BJ Texas Instruments Bristol Electronics 3 - -
SNJ54ALS163BJ Texas Instruments Avnet 5 €15.19 €11.49

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ALS163B Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - 162b- d

Abstract: 163B DM74ALS161B DM74ALS161BM 162BM 161B
Text: 'ALS162B is a four-bit decade counter, while the 'ALS161B and ' ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and ' ALS163B clear synchronously. The carry output is , inputs. These two counters are provided with a clear on power-up feature. The 'ALS162B and ' ALS163B , ' ALS163B are also permissible regardless of the levels of logic on the clock, enable or load inputs , 'ALS161B through ' ALS163B may occur regardless of the logic level on the clock. The 'ALS161B through


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PDF DM74ALS161B, ALS162B ALS161B ALS163B 162b- d 163B DM74ALS161B DM74ALS161BM 162BM 161B
Not Available

Abstract: No abstract text available
Text: ALS162B are four-bit decade counters, while the ALS161B and ALS163B are four-bit bi nary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchro nously. The carry , inputs. These two counters are provided with a clear on power-up feature. The ALS162B and ALS163B clear , all low outputs. Low to high transitions at the clear input of the ALS162B and ALS163B are also , the ALS160B through ALS163B may occur regardless of the logic level on the clock. The ALS160B through


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PDF DM54ALS/DM74ALS160B, ALS160B ALS162B ALS161B ALS163B ALS160B,
Not Available

Abstract: No abstract text available
Text: ’ ALS163B are four-bit binary counters. The ’ALS161B clears asynchronously, while the ’ALS162B and ’ ALS163B clear synchronously. The carry output is decoded to prevent spikes during normal , counters are provided with a clear on power-up feature. The ’ALS162B and ’ ALS163B clear function is , all low outputs. Low to high transitions at the clear input of the ’ALS162B and ’ ALS163B are , transitions at the enable P or T inputs of the ’ALS161B through ’ ALS163B may occur regardless of the


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PDF DM74ALS161B, ALS162B ALS161B ALS163B
ad508

Abstract: No abstract text available
Text: €™ALS161B and ’ ALS163B are four-bit binary counters. The ’ALS161B clears asynchronously, while the ’ALS162B and ’ ALS163B clear synchronously. The carry output is decoded to prevent spikes during normal , provided with a clear on power-up feature. The ’ALS162B and ’ ALS163B clear function is synchronous , all low outputs. Low to high transitions at the clear input of the ’ALS162B and ’ ALS163B are , through ’ ALS163B may occur regardless of the logic level on the clock. The ’ALS161B through â


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PDF DM74ALS161B, ALS162B ALS161B ALS163B ALS161B DS006206-3 ALS162B ad508
162BM

Abstract: 163B DM74ALS161B DM74ALS161BM DM74ALS161BN ALS161B
Text: speed counting designs. The 'ALS162B is a four-bit decade counter, while the 'ALS161B and ' ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and ' ALS163B clear , 'ALS162B and ' ALS163B clear function is synchronous; and a low level at the clear input sets all four of , ' ALS163B are also permissible regardless of the levels of logic on the clock, enable or load inputs. The , enable P or T inputs of the 'ALS161B through ' ALS163B may occur regardless of the logic level on the


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PDF DM74ALS161B, ALS162B ALS161B ALS163B TL/F/6206â 00fi2S72 162BM 163B DM74ALS161B DM74ALS161BM DM74ALS161BN
1994 - SN54ALS161B

Abstract: SN74AS163 SN74AS161 SN74ALS163B SN74ALS161B SN54AS163 SN54AS161 SN54ALS163B SN54ALS162B ctrdiv10
Text: designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, ' ALS163B , 'AS161, and 'AS163 devices , CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, ' ALS163B , and 'AS163 devices is , LOAD ENT ENP CLK A B C D 10 7 2 3 4 5 6 ' ALS163B AND 'AS163 BINARY COUNTERS WITH , (positive logic) CLR LOAD ENT ENP CLK 1 ' ALS163B and 'AS163 9 10 15 7 RCO 2 C1 , , preset, count, and inhibit sequences 'ALS161B, 'AS161, ' ALS163B , and 'AS163 The following sequence is


Original
PDF SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SDAS276A SN54ALS161B SN74AS163 SN74AS161 SN74ALS163B SN74ALS161B SN54AS163 SN54AS161 SN54ALS163B SN54ALS162B ctrdiv10
1994 - Not Available

Abstract: No abstract text available
Text: designs. The SN54ALS162B is a 4-bit decade counter. The ’ALS161B, ’ ALS163B , ’AS161, and ’AS163 , the CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, ’ ALS163B , and ’AS163 , DIRECT CLEAR 1 CLR 9 LOAD ENT ENP CLK A B C D 10 7 2 3 4 5 6 ’ ALS163B AND â , €™ ALS163B and ’AS163 9 10 15 7 RCO 2 C1 14 QA 1D A 3 C1 13 QB 1D , €™ALS161B, ’AS161, ’ ALS163B , and ’AS163 The following sequence is illustrated below: 1. Clear


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PDF SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SDAS276A
2000 - Not Available

Abstract: No abstract text available
Text: designs. The SN54ALS162B is a 4-bit decade counter. The ’ALS161B, ’ ALS163B , ’AS161, and ’AS163 , the CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, ’ ALS163B , and ’AS163 , DIRECT CLEAR 1 CLR 9 LOAD ENT ENP CLK A B C D 10 7 2 3 4 5 6 ’ ALS163B AND â , €™ ALS163B and ’AS163 9 10 15 7 RCO 2 C1 14 QA 1D A 3 C1 13 QB 1D , €™ALS161B, ’AS161, ’ ALS163B , and ’AS163 The following sequence is illustrated below: 1. Clear


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PDF SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SDAS276A
1997 - 163B

Abstract: DM74ALS161B DM74ALS161BM 162BM
Text: 'ALS161B and ' ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and ' ALS163B clear synchronously. The carry output is decoded to prevent spikes during normal , with a clear on power-up feature. The 'ALS162B and ' ALS163B clear function is synchronous; and a low , transitions at the clear input of the 'ALS162B and ' ALS163B are also permissible regardless of the levels of , transitions at the enable P or T inputs of the 'ALS161B through ' ALS163B may occur regardless of the logic


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PDF ALS162B ALS161B ALS163B ds006206 163B DM74ALS161B DM74ALS161BM 162BM
Not Available

Abstract: No abstract text available
Text: and ALS162B are four-bit decade counters, while the ALS161B and ALS'163B are four-bit binary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchronously. The , ALS163B clear function is synchronous; and a low level at the clear Input sets all four of the flip-flop , counter to all (ow outputs. Low to high transitions at the clear input of the ALS162B and ALS163B are also , the ALS160B through ALS163B may occur regardless of the logic level on the clock. The ALS160B through


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PDF DM54ALS/DM74ALS160B, ALS160B ALS162B ALS161B ALS163B S01122
ALS161

Abstract: 163B DM74ALS161B DM74ALS161BM 162BM
Text: ' ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and ' ALS163B , 'ALS162B and ' ALS163B clear function is synchronous; and a low level at the clear input sets all four of , ' ALS163B are also permissible regardless of the levels of logic on the clock, enable or load inputs. The , enable P or T inputs of the 'ALS161B through ' ALS163B may occur regardless of the logic level on the clock. The 'ALS161B through ' ALS163B feature a fully Independent clock circuit, changes made to control


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PDF DM74ALS161B, ALS162B ALS161B ALS163B DM74ALS161 162BM 163BM ALS161 163B DM74ALS161B DM74ALS161BM
1982 - CTRDIV16

Abstract: SN54ALS160B SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B SN74AS162
Text: , and the 'ALS161B, ' ALS163B , 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is , . 'ALS162B and 'AS162 decade counters are similar; however the clear is synchronous as shown for the ' ALS163B , COUNTERS WITH DIRECT CLEAR ' ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 CLR , [2] 5 12 [4] 6 11 [8] QA QB QC QD ' ALS163B and 'AS163 logic diagram , sequences 'ALS161B, 'AS161, ' ALS163B , 'AS163 Illustrated below is the following sequence: 1. Clear


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PDF SN54ALS160B SN54ALS163B, SN54AS160 SN54AS163 SN74ALS160B SN74ALS163B, SN74AS160 SN74AS163 SDAS024A D2661, CTRDIV16 SN74AS163 SN74ALS163B SN54AS163 SN54ALS163B SN74AS162
ctrdiv10

Abstract: AS163 SN74AS162 SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B
Text: , ' ALS163B , 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is provided by having all , 'ALS162B, ' ALS163B , 'AS162, and 'AS163 is synchronous and a low level at the clear input sets all four of , synchronous as shown for the ' ALS163B and 'AS163 binary counters. 2-150 Texas ^ Instruments POST OFFICE BOX , ) (21 (3) 1,5D [ 1 ] (4) (131 12] 15) [4] (6) (11) [8] Qa Qb Qc Qd als163b , ] (4) (131 [2] (5) (12) [4] (6) (111 Qa Qb Qc Qd E ' ALS163B and 'AS163 logic


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PDF SN54ALS160B SN54ALS163B, SN54AS160 SN54AS163 SN74ALS160B SN74ALS163B, SN74AS160 SN74AS163 D2661, 1982-REVISED ctrdiv10 AS163 SN74AS162 SN74ALS163B SN54ALS163B
1994 - SN54ALS162

Abstract: No abstract text available
Text: application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, ' ALS163B , . The clear function for the SN54ALS162B, ' ALS163B , and 'AS163 devices is synchronous, and a low level , M2 G3 G4 C5/2,3,4+ 1, 5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 15 ' ALS163B AND 'AS163 BINARY , ENT ENP 1 9 10 7 15 RCO ' ALS163B and 'AS163 CLK 2 C1 1D 3 14 QA A C1 1D 13 QB B , inhibit sequences 'ALS161B, 'AS161, ' ALS163B , and 'AS163 The following sequence is illustrated below


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PDF SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SDAS276A SN54ALS162
SN74ALS161

Abstract: 30715 SN54AS183 SN74AS163 SN74AS161 SN74ALS163B SN74ALS161B SN54AS163 SN54AS161 SN54ALS163B
Text: typical clear, preset, count, and inhibit sequences 'ALS161B, AS161, ALS163B. 'AS163 Illustrated below , 'ALS161B, ' ALS163B , 'AS 161, and 'AS 163 are 4-bit binary counters. Synchronous operation is provided by , clear function for the ' ALS163B and 'AS163 Is synchronous and a low level at the clear input sets all , COUNTERS WITH DIRECT CLEAR ' ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CLR LOAD ENT ENP â , ) 1,5D [1) (4) (131 121 (SI (41 (12) (6) (11) 181 ' ALS163B and 'AS163 logic diagram


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PDF SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SN54ALS161B, SN54ALS163B, SN54AS161, SN54AS163 D2661, 300-mil SN74ALS161 30715 SN54AS183 SN74AS161 SN74ALS163B SN74ALS161B SN54AS161 SN54ALS163B
1995 - 162b- d

Abstract: ALS161B 163B DM74ALS161B DM74ALS161BM DM74ALS161BN 162BM
Text: 'ALS162B is a four-bit decade counter while the 'ALS161B and ' ALS163B are four-bit binary counters The 'ALS161B clears asynchronously while the 'ALS162B and ' ALS163B clear synchronously The carry output is , provided with a clear on power-up feature The 'ALS162B and ' ALS163B clear function is synchronous and a , high transitions at the clear input of the 'ALS162B and ' ALS163B are also permissible regardless of , 'ALS161B through ' ALS163B may occur regardless of the logic level on the clock C1995 National


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PDF DM74ALS161B ALS162B ALS161B ALS163B 162b- d 163B DM74ALS161BM DM74ALS161BN 162BM
dm74als

Abstract: No abstract text available
Text: ALS161B and ALS163B are four-bit bi nary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchro nously. The carry output is decoded to prevent spikes during normal , provided with a clear on power-up feature. The ALS162B and ALS163B clear func tion is synchronous; and a , transitions at the clear input of the ALS162B and ALS163B are also permissible regardless of the levels of , cascaded stages. High to low level transitions at the enable P or T inputs of the ALS160B through ALS163B


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PDF 160B/DM74ALS161B/DM74ALS162B/DM74ALS163B DM54ALS/DM74ALS160B, ALS160B ALS162B ALS161B ALS163B dm74als
162b- d

Abstract: 163B DM54ALS160BJ 162BM ALS160B/161B
Text: , while the ALS161B and ALS163B are four-bit binary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchronously. The carry output is decoded to prevent spikes during , power-up feature. The ALS162B and ALS163B clear function is synchronous; and a low level at the clear input , input of the ALS162B and ALS163B are also permissible regardless of the levels of logic on the clock , . High to low level transitions at the enable P or T Inputs of the ALS160B through ALS163B may occur


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PDF DM54ALS/DM74ALS160B, ALS160B ALS162B ALS161B ALS163B ALS160B 162b- d 163B DM54ALS160BJ 162BM ALS160B/161B
1982 - SN54ALS160B

Abstract: CTRDIV16 ALS160 SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B
Text: , and the 'ALS161B, ' ALS163B , 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is , . 'ALS162B and 'AS162 decade counters are similar; however the clear is synchronous as shown for the ' ALS163B , COUNTERS WITH DIRECT CLEAR ' ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 CLR , [2] 5 12 [4] 6 11 [8] QA QB QC QD ' ALS163B and 'AS163 logic diagram , sequences 'ALS161B, 'AS161, ' ALS163B , 'AS163 Illustrated below is the following sequence: 1. Clear


Original
PDF SN54ALS160B SN54ALS163B, SN54AS160 SN54AS163 SN74ALS160B SN74ALS163B, SN74AS160 SN74AS163 SDAS024A D2661, CTRDIV16 ALS160 SN74AS163 SN74ALS163B SN54AS163 SN54ALS163B
74ALS163BN

Abstract: 74ALS 74ALS161B 74ALS161BD 74ALS161BN 74ALS163B 74ALS163BD
Text: ) • Synchronous Reset (' ALS163B ) • High speed synchronous expansion • Typical count rate of 140MHz DESCRIPTION Synchronous presettable 4-bit binary counters ('ALS161B, ' ALS163B ) feature an , function). For the ' ALS163B the clear function is synchronous. A Low level at the Synchronous Reset (SR , , 74ALS163B PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL(IEEEZIEC) ALS163B SR E m vcc CP Q ¡3 TC , ) Hold (do nothing) H X X 1 h X L MODE SELECT-FUNCTION TABLE for ' ALS163B INPUTS OUTPUTS


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PDF ALS161B ALS163 ALS161B) ALS163B) 140MHz ALS161B, 74ALS 500ns 74ALS163BN 74ALS161B 74ALS161BD 74ALS161BN 74ALS163B 74ALS163BD
1982 - CTRDIV16

Abstract: SN74AS162
Text: , ' ALS163B , 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is provided by having all , ; however the clear is synchronous as shown for the ' ALS163B and 'AS163 binary counters. 2 POST OFFICE , ' ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 5CT=0 ' ALS163B and 'AS163 logic , 'ALS161B, 'AS161, ' ALS163B , 'AS163 Illustrated below is the following sequence: 1. Clear outputs to zero ('ALS161B and 'AS161 are asynchronous; ' ALS163B and 'AS163 are synchronous) 2. Preset to binary twelve 3


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PDF SN54ALS160B SN54ALS163B, SN54AS160 SN54AS163 SN74ALS160B SN74ALS163B, SN74AS160 SN74AS163 SN54ALS' SN54AS' CTRDIV16 SN74AS162
1994 - Not Available

Abstract: No abstract text available
Text: application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, ' ALS163B , . The clear function for the SN54ALS162B, ' ALS163B , and 'AS163 devices is synchronous, and a low level , M2 G3 G4 C5/2,3,4+ 1, 5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 15 ' ALS163B AND 'AS163 BINARY , ENT ENP 1 9 10 7 15 RCO ' ALS163B and 'AS163 CLK 2 C1 1D 3 14 QA A C1 1D 13 QB B , inhibit sequences 'ALS161B, 'AS161, ' ALS163B , and 'AS163 The following sequence is illustrated below


Original
PDF SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SDAS276A
1994 - Not Available

Abstract: No abstract text available
Text: application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, ' ALS163B , . The clear function for the SN54ALS162B, ' ALS163B , and 'AS163 devices is synchronous, and a low level , M2 G3 G4 C5/2,3,4+ 1, 5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 15 ' ALS163B AND 'AS163 BINARY , ENT ENP 1 9 10 7 15 RCO ' ALS163B and 'AS163 CLK 2 C1 1D 3 14 QA A C1 1D 13 QB B , inhibit sequences 'ALS161B, 'AS161, ' ALS163B , and 'AS163 The following sequence is illustrated below


Original
PDF SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SDAS276A
1982 - CTRDIV16

Abstract: SN54ALS160B ALS161B SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B
Text: , and the 'ALS161B, ' ALS163B , 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is , the ' ALS163B and 'AS163 binary counters. 2 · POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST , REVISED MAY 1986 logic symbols 'ALS161B AND 'AS161 BINARY COUNTERS WITH DIRECT CLEAR ' ALS163B AND , [8] QA QB QC QD ' ALS163B and 'AS163 logic diagram (positive logic) CLR LOAD ENT ENP 1 , 1986 typical clear, preset, count, and inhibit sequences 'ALS161B, 'AS161, ' ALS163B , 'AS163


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PDF SN54ALS160B SN54ALS163B, SN54AS160 SN54AS163 SN74ALS160B SN74ALS163B, SN74AS160 SN74AS163 SDAS024A D2661, CTRDIV16 ALS161B SN74AS163 SN74ALS163B SN54AS163 SN54ALS163B
1982 - SN74AS162

Abstract: No abstract text available
Text: , ' ALS163B , 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is provided by having all , ; however the clear is synchronous as shown for the ' ALS163B and 'AS163 binary counters. 2 POST OFFICE , ' ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 5CT=0 ' ALS163B and 'AS163 logic , 'ALS161B, 'AS161, ' ALS163B , 'AS163 Illustrated below is the following sequence: 1. Clear outputs to zero ('ALS161B and 'AS161 are asynchronous; ' ALS163B and 'AS163 are synchronous) 2. Preset to binary twelve 3


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PDF SN54ALS160B SN54ALS163B, SN54AS160 SN54AS163 SN74ALS160B SN74ALS163B, SN74AS160 SN74AS163 SN54ALS' SN54AS' SN74AS162
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