1998  162b d
Abstract: 163B DM74ALS161B DM74ALS161BM 162BM 161B
Text: 'ALS162B is a fourbit decade counter, while the ' ALS161B and 'ALS163B are fourbit binary counters. The ' ALS161B clears asynchronously, while the 'ALS162B and 'ALS163B clear synchronously. The carry output is , the clock or enable inputs. The ' ALS161B clear function is asynchronous. A low level at the clear , ' ALS161B through 'ALS163B may occur regardless of the logic level on the clock. The ' ALS161B through , 40 MHz tSETUP Setup Time 2 V 0 15 (Note 2) ns ALS161B 15 (Note 2) ns

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DM74ALS161B,
ALS162B
ALS161B
ALS163B
162b d
163B
DM74ALS161B
DM74ALS161BM
162BM
161B

2000  Not Available
Abstract: No abstract text available
Text: designs. The SN54ALS162B is a 4bit decade counter. The â ALS161B , âALS163B, âAS161, and âAS163 , internal connection The clear function for the â ALS161B and âAS161 devices is asynchronous. A low , for operation from 0Â°C to 70Â°C. logic symbolsâ â ALS161B AND âAS161 BINARY COUNTERS WITH , , J, and N packages. â ALS161B and âAS161 synchronous binary counters are similar; however, CLR is , ALS161B , âAS161, âALS163B, and âAS163 The following sequence is illustrated below: 1. Clear

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SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A

Not Available
Abstract: No abstract text available
Text: high speed counting deÂ signs. The âALS162B is a fourbit decade counter, while the â ALS161B and âALS163B are fourbit binary counters. The â ALS161B clears asynchronously, while the âALS162B , inputs. The â ALS161B clear function is asynchronous. A low level at the clear input sets all four of , transitions at the enable P or T inputs of the â ALS161B through âALS163B may occur regardless of the , ALS161B through âALS163B feature a fully indepenÂ dent clock circuit, changes made to control inputs

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DM74ALS161B,
ALS162B
ALS161B
ALS163B

1994  SN54ALS161B
Abstract: SN74AS163 SN74AS161 SN74ALS163B SN74ALS161B SN54AS163 SN54AS161 SN54ALS163B SN54ALS162B ctrdiv10
Text: designs. The SN54ALS162B is a 4bit decade counter. The ' ALS161B , 'ALS163B, 'AS161, and 'AS163 devices , internal connection The clear function for the ' ALS161B and 'AS161 devices is asynchronous. A low level , °C to 70°C. logic symbols ' ALS161B AND 'AS161 BINARY COUNTERS WITH DIRECT CLEAR 1 CLR 9 , 1D D 6 Pin numbers shown are for the D, DB, J, and N packages. ' ALS161B and 'AS161 , , preset, count, and inhibit sequences ' ALS161B , 'AS161, 'ALS163B, and 'AS163 The following sequence is

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SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A
SN54ALS161B
SN74AS163
SN74AS161
SN74ALS163B
SN74ALS161B
SN54AS163
SN54AS161
SN54ALS163B
SN54ALS162B
ctrdiv10

1994  Not Available
Abstract: No abstract text available
Text: designs. The SN54ALS162B is a 4bit decade counter. The â ALS161B , âALS163B, âAS161, and âAS163 , internal connection The clear function for the â ALS161B and âAS161 devices is asynchronous. A low , for operation from 0Â°C to 70Â°C. logic symbolsâ â ALS161B AND âAS161 BINARY COUNTERS WITH , , J, and N packages. â ALS161B and âAS161 synchronous binary counters are similar; however, CLR is , ALS161B , âAS161, âALS163B, and âAS163 The following sequence is illustrated below: 1. Clear

Original

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SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A

1995  162b d
Abstract: ALS161B 163B DM74ALS161B DM74ALS161BM DM74ALS161BN 162BM
Text: 'ALS162B is a fourbit decade counter while the ' ALS161B and 'ALS163B are fourbit binary counters The ' ALS161B clears asynchronously while the 'ALS162B and 'ALS163B clear synchronously The carry output is , inputs The ' ALS161B clear function is asynchronous A low level at the clear input sets all four of the , ' ALS161B through 'ALS163B may occur regardless of the logic level on the clock C1995 National Semiconductor Corporation TL F 6206 The ' ALS161B through 'ALS163B feature a fully independent clock

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DM74ALS161B
ALS162B
ALS161B
ALS163B
162b d
163B
DM74ALS161BM
DM74ALS161BN
162BM

ad508
Abstract: No abstract text available
Text: ALS161B and âALS163B are fourbit binary counters. The â ALS161B clears asynchronously, while the â , â ALS161B clear function is asynchronous. A low level at the clear input sets all four of the , successive cascaded stages. High to low level transitions at the enable P or T inputs of the â ALS161B through âALS163B may occur regardless of the logic level on the clock. The â ALS161B through â , ) ns ALS161B 1 5 t (Note 2) ns ALS162B/163B 1 5 t (Note 2) ns 15T (Note 2) En P

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DM74ALS161B,
ALS162B
ALS161B
ALS163B
ALS161B
DS0062063
ALS162B
ad508

1982  CTRDIV16
Abstract: SN54ALS160B SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B SN74AS162
Text: , and the ' ALS161B , 'ALS163B, 'AS161, and 'AS163 are 4bit binary counters. Synchronous operation is , 'ALS160B, ' ALS161B , 'AS160, and 'AS161 is asynchronous and a low level at the clear input sets all four of , COUNTERS SDAS024A D2661, APRIL 1982 REVISED MAY 1986 logic symbols ' ALS161B AND 'AS161 BINARY , shown are for D, J, and N packages. ' ALS161B and 'AS161 synchronous binary counters are similar , sequences ' ALS161B , 'AS161, 'ALS163B, 'AS163 Illustrated below is the following sequence: 1. Clear

Original

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SN54ALS160B
SN54ALS163B,
SN54AS160
SN54AS163
SN74ALS160B
SN74ALS163B,
SN74AS160
SN74AS163
SDAS024A
D2661,
CTRDIV16
SN74AS163
SN74ALS163B
SN54AS163
SN54ALS163B
SN74AS162

1994  SN54ALS163B
Abstract: SN54AS161 SN54AS163 SN74ALS161B SN74ALS163B SN74AS161 SN74AS163 SN54ALS161B SN54ALS162B
Text: counting designs. The SN54ALS162B is a 4bit decade counter. The ALS161B , ALS163B, AS161, and AS163 are 4 , connection The clear function for the ALS161B and AS161 is asynchronous. A low level at the clear (CLR , ALS161B AND AS161 BINARY COUNTERS WITH DIRECT CLEAR 1 CLR 9 LOAD ENT ENP CLK A B C D 10 , , and N packages. ALS161B and AS161 synchronous binary counters are similar; however, CLR is , , preset, count, and inhibit sequences ALS161B , AS161, ALS163B, and AS163 The following sequence is

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SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276
SN54ALS163B
SN54AS161
SN54AS163
SN74ALS161B
SN74ALS163B
SN74AS161
SN74AS163
SN54ALS161B
SN54ALS162B

1997  163B
Abstract: DM74ALS161B DM74ALS161BM 162BM
Text: ' ALS161B and 'ALS163B are fourbit binary counters. The ' ALS161B clears asynchronously, while the 'ALS162B , ' ALS161B clear function is asynchronous. A low level at the clear input sets all four of the flipflop , transitions at the enable P or T inputs of the ' ALS161B through 'ALS163B may occur regardless of the logic level on the clock. The ' ALS161B through 'ALS163B feature a fully independent clock circuit. changes , ALS161B 15 (Note 2) ns ALS162B/163B 15 (Note 2) ns 15 (Note 2) ns ns Data; A, B

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ALS162B
ALS161B
ALS163B
ds006206
163B
DM74ALS161B
DM74ALS161BM
162BM

74ALS163BN
Abstract: 74ALS 74ALS161B 74ALS161BD 74ALS161BN 74ALS163B 74ALS163BD
Text: ï»¿74 ALS161B ,74 ALS163 B Counters FEATURES â¢ Synchronous counting and loading â¢ Two count enable inputs (or nbit cascading â¢ Positive edgetriggered clock â¢ Asynchronous Reset (' ALS161B , 140MHz DESCRIPTION Synchronous presettable 4bit binary counters (' ALS161B , 'ALS163B) feature an , level at the Master Reset (MR) input sets all the four outputs of the flipflops (Qq Q3) in " ALS161B to , input (active Low) for ' ALS161B 1.0/1.0 20(iA/0.1mA SR Synchronous Heset input (active Low) tor

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ALS161B
ALS163
ALS161B)
ALS163B)
140MHz
ALS161B,
74ALS
500ns
74ALS163BN
74ALS161B
74ALS161BD
74ALS161BN
74ALS163B
74ALS163BD

162BM
Abstract: 163B DM74ALS161B DM74ALS161BM DM74ALS161BN ALS161B
Text: speed counting designs. The 'ALS162B is a fourbit decade counter, while the ' ALS161B and 'ALS163B are fourbit binary counters. The ' ALS161B clears asynchronously, while the 'ALS162B and 'ALS163B clear , regardless of the logic levels on the clock or enable inputs. The ' ALS161B clear function is asynchronous. A , enable P or T inputs of the ' ALS161B through 'ALS163B may occur regardless of the logic level on the clock. The ' ALS161B through 'ALS163B feature a fully independent clock circuit, changes made to control

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DM74ALS161B,
ALS162B
ALS161B
ALS163B
TL/F/6206â
00fi2S72
162BM
163B
DM74ALS161B
DM74ALS161BM
DM74ALS161BN

ALS161
Abstract: 163B DM74ALS161B DM74ALS161BM 162BM
Text: application In high speed counting designs. The 'ALS162B Is a fourbit decade counter, while the ' ALS161B and 'ALS163B are fourbit binary counters. The ' ALS161B clears asynchronously, while the 'ALS162B and 'ALS163B , regardless of the logic levels on the clock or enable inputs. The ' ALS161B clear function Is asynchronous. A , enable P or T inputs of the ' ALS161B through 'ALS163B may occur regardless of the logic level on the clock. The ' ALS161B through 'ALS163B feature a fully Independent clock circuit, changes made to control

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DM74ALS161B,
ALS162B
ALS161B
ALS163B
DM74ALS161
162BM
163BM
ALS161
163B
DM74ALS161B
DM74ALS161BM

1982  SN54ALS160B
Abstract: CTRDIV16 ALS160 SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B
Text: , and the ' ALS161B , 'ALS163B, 'AS161, and 'AS163 are 4bit binary counters. Synchronous operation is , 'ALS160B, ' ALS161B , 'AS160, and 'AS161 is asynchronous and a low level at the clear input sets all four of , COUNTERS SDAS024A D2661, APRIL 1982 REVISED MAY 1986 logic symbols ' ALS161B AND 'AS161 BINARY , shown are for D, J, and N packages. ' ALS161B and 'AS161 synchronous binary counters are similar , sequences ' ALS161B , 'AS161, 'ALS163B, 'AS163 Illustrated below is the following sequence: 1. Clear

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SN54ALS160B
SN54ALS163B,
SN54AS160
SN54AS163
SN74ALS160B
SN74ALS163B,
SN74AS160
SN74AS163
SDAS024A
D2661,
CTRDIV16
ALS160
SN74AS163
SN74ALS163B
SN54AS163
SN54ALS163B


1994  SN54ALS162
Abstract: No abstract text available
Text: application in highspeed counting designs. The SN54ALS162B is a 4bit decade counter. The ' ALS161B , 'ALS163B , clear function for the ' ALS161B and 'AS161 devices is asynchronous. A low level at the clear (CLR) input , , SN74AS161, and SN74AS163 are characterized for operation from 0°C to 70°C. logic symbols ' ALS161B AND , , DB, J, and N packages. ' ALS161B and 'AS161 synchronous binary counters are similar; however, CLR is , inhibit sequences ' ALS161B , 'AS161, 'ALS163B, and 'AS163 The following sequence is illustrated below

Original

PDF

SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A
SN54ALS162

1994  SN54ALS161B
Abstract: SN74AS163 SN74AS161 SN74ALS163B SN74ALS161B SN54AS163 SN54AS161 SN54ALS163B SN54ALS162B CTRDIV16
Text: designs. The SN54ALS162B is a 4bit decade counter. The ' ALS161B , 'ALS163B, 'AS161, and 'AS163 devices , internal connection The clear function for the ' ALS161B and 'AS161 devices is asynchronous. A low level , °C to 70°C. logic symbols ' ALS161B AND 'AS161 BINARY COUNTERS WITH DIRECT CLEAR 1 CLR 9 , 1D D 6 Pin numbers shown are for the D, DB, J, and N packages. ' ALS161B and 'AS161 , , preset, count, and inhibit sequences ' ALS161B , 'AS161, 'ALS163B, and 'AS163 The following sequence is

Original

PDF

SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A
SN54ALS161B
SN74AS163
SN74AS161
SN74ALS163B
SN74ALS161B
SN54AS163
SN54AS161
SN54ALS163B
SN54ALS162B
CTRDIV16

SN54ALS181
Abstract: MSI01
Text: counting designs. The SN54ALS162B is a 4bit decade counter. The ' ALS161B , 'ALS163B, 'AS161, and 'AS163 are , clear function for the ' ALS161B and 'AS161 is asynchronous. A low level at the clear (CLR) input sets , symbolst ALS161B AND 'AS161 BINARY COUNTERS WITH DIRECT CLEAR CTRDIV1# rs CT=0 · N M1 15 ALS163B AND AS183 , logic diagram (positive logic) Pin numbers shown are for the D, J, and N packages. ' ALS161B and , SDAS276  DE CE M B E R 1994 typical clear, preset, count, and Inhibit sequences ALS161B , AS181

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SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276
SN54ALS181
MSI01

1994  Not Available
Abstract: No abstract text available
Text: application in highspeed counting designs. The SN54ALS162B is a 4bit decade counter. The ' ALS161B , 'ALS163B , clear function for the ' ALS161B and 'AS161 devices is asynchronous. A low level at the clear (CLR) input , , SN74AS161, and SN74AS163 are characterized for operation from 0°C to 70°C. logic symbols ' ALS161B AND , , DB, J, and N packages. ' ALS161B and 'AS161 synchronous binary counters are similar; however, CLR is , inhibit sequences ' ALS161B , 'AS161, 'ALS163B, and 'AS163 The following sequence is illustrated below

Original

PDF

SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A

1994  Not Available
Abstract: No abstract text available
Text: application in highspeed counting designs. The SN54ALS162B is a 4bit decade counter. The ' ALS161B , 'ALS163B , clear function for the ' ALS161B and 'AS161 devices is asynchronous. A low level at the clear (CLR) input , , SN74AS161, and SN74AS163 are characterized for operation from 0°C to 70°C. logic symbols ' ALS161B AND , , DB, J, and N packages. ' ALS161B and 'AS161 synchronous binary counters are similar; however, CLR is , inhibit sequences ' ALS161B , 'AS161, 'ALS163B, and 'AS163 The following sequence is illustrated below

Original

PDF

SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A

1982  ALS162
Abstract: SN74AS162
Text: highspeed counting designs. The 'ALS160B, 'ALS162B, 'AS160, and 'AS162 are decade counters, and the ' ALS161B , regardless of the levels of the enable inputs. The clear function for the 'ALS160B, ' ALS161B , 'AS160, and , COUNTERS SDAS024A  D2661, APRIL 1982  REVISED MAY 1986 logic symbols ' ALS161B AND 'AS161 BINARY , packages. ' ALS161B and 'AS161 synchronous binary counters are similar; however the clear is asynchronous as , ' ALS161B , 'AS161, 'ALS163B, 'AS163 Illustrated below is the following sequence: 1. Clear outputs to zero

Original

PDF

SN54ALS160B
SN54ALS163B,
SN54AS160
SN54AS163
SN74ALS160B
SN74ALS163B,
SN74AS160
SN74AS163
SN54ALS'
SN54AS'
ALS162
SN74AS162

1994  Not Available
Abstract: No abstract text available
Text: designs. The SN54ALS162B is a 4bit decade counter. The â ALS161B , âALS163B, âAS161, and âAS163 , internal connection The clear function for the â ALS161B and âAS161 devices is asynchronous. A low , SYNCHRONOUS CLEAR â ALS161B AND âAS161 BINARY COUNTERS WITH DIRECT CLEAR 1 CLR 9 LOAD ENT ENP , , J, and N packages. â ALS161B and âAS161 synchronous binary counters are similar; however, CLR is , ALS161B , âAS161, âALS163B, and âAS163 The following sequence is illustrated below: 1. Clear

Original

PDF

SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A

1982  CTRDIV16
Abstract: SN54ALS160B ALS161B SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B
Text: , and the ' ALS161B , 'ALS163B, 'AS161, and 'AS163 are 4bit binary counters. Synchronous operation is , , ' ALS161B , 'AS160, and 'AS161 is asynchronous and a low level at the clear input sets all four of the , REVISED MAY 1986 logic symbols ' ALS161B AND 'AS161 BINARY COUNTERS WITH DIRECT CLEAR 'ALS163B AND , . ' ALS161B and 'AS161 synchronous binary counters are similar; however the clear is asynchronous as shown for , 1986 typical clear, preset, count, and inhibit sequences ' ALS161B , 'AS161, 'ALS163B, 'AS163

Original

PDF

SN54ALS160B
SN54ALS163B,
SN54AS160
SN54AS163
SN74ALS160B
SN74ALS163B,
SN74AS160
SN74AS163
SDAS024A
D2661,
CTRDIV16
ALS161B
SN74AS163
SN74ALS163B
SN54AS163
SN54ALS163B

1982  SN74AS162
Abstract: No abstract text available
Text: highspeed counting designs. The 'ALS160B, 'ALS162B, 'AS160, and 'AS162 are decade counters, and the ' ALS161B , regardless of the levels of the enable inputs. The clear function for the 'ALS160B, ' ALS161B , 'AS160, and , COUNTERS SDAS024A  D2661, APRIL 1982  REVISED MAY 1986 logic symbols ' ALS161B AND 'AS161 BINARY , packages. ' ALS161B and 'AS161 synchronous binary counters are similar; however the clear is asynchronous as , ' ALS161B , 'AS161, 'ALS163B, 'AS163 Illustrated below is the following sequence: 1. Clear outputs to zero

Original

PDF

SN54ALS160B
SN54ALS163B,
SN54AS160
SN54AS163
SN74ALS160B
SN74ALS163B,
SN74AS160
SN74AS163
SN54ALS'
SN54AS'
SN74AS162

1994  Not Available
Abstract: No abstract text available
Text: application in highspeed counting designs. The SN54ALS162B is a 4bit decade counter. The ' ALS161B , 'ALS163B , clear function for the ' ALS161B and 'AS161 devices is asynchronous. A low level at the clear (CLR) input , , SN74AS161, and SN74AS163 are characterized for operation from 0°C to 70°C. logic symbols ' ALS161B AND , , DB, J, and N packages. ' ALS161B and 'AS161 synchronous binary counters are similar; however, CLR is , inhibit sequences ' ALS161B , 'AS161, 'ALS163B, and 'AS163 The following sequence is illustrated below

Original

PDF

SN54ALS161B,
SN54ALS162B,
SN54ALS163B,
SN54AS161,
SN54AS163
SN74ALS161B,
SN74ALS163B,
SN74AS161,
SN74AS163
SDAS276A

ctrdiv10
Abstract: AS163 SN74AS162 SN74AS163 SN74AS160 SN74ALS163B SN74ALS160B SN54AS163 SN54AS160 SN54ALS163B
Text: highspeed counting designs. The 'ALS160B, 'ALS162B, 'AS160, and 'AS162 are decade counters, and the ' ALS161B , COUNTERS logic symbols f ' ALS161B and "AS161 BINARY COUNTERS WITH DIRECT CLEAR clr load ent enp clk a , , and inhibit sequences ' ALS161B , 'AS161, ALS163B, AS163 Illustrated below is the following sequence , Clock frequency 0 22 0 40 MHz tw Pulse duration CLK high or low 20 12.5 ns 'ALS160B, ' ALS161B CLR , , ' ALS161B 25 15 'ALS162B, 'ALS163B 20 15 'ALS160B, ' ALS161B CLR inactive 10 10 'ALS162B. 'ALS163B

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SN54ALS160B
SN54ALS163B,
SN54AS160
SN54AS163
SN74ALS160B
SN74ALS163B,
SN74AS160
SN74AS163
D2661,
1982REVISED
ctrdiv10
AS163
SN74AS162
SN74ALS163B
SN54ALS163B
