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Part Manufacturer Description Datasheet Download Buy Part
AE101MD1AQ (1-1437556-1) TE Connectivity Ltd Toggle Switches; AE101MD1AQ=SP SEALED SWITCH ( Alcoswitch )
AE101SD1CQ (2-1437556-8) TE Connectivity Ltd Toggle Switches; AE101SD1CQ=SEALED TOGGLE PC TE ( Alcoswitch )
AE101MD1CQ (1-1437556-7) TE Connectivity Ltd Toggle Switches; AE101MD1CQ=SP GEMINI SEALED ( Alcoswitch )
AE101MD1AV2B (1-1437556-2) TE Connectivity Ltd Toggle Switches; AE101MD1AV2B=SP SEALED TOG VRA ( Alcoswitch )
AE101SD1V30B (2-1437556-9) TE Connectivity Ltd Toggle Switches; AE101SD1V30B=SP SEALED TOGGLE ( Alcoswitch )
AE101MD1CB (1-1437556-5) TE Connectivity Ltd Toggle Switches; AE101MD1CB=GEMINI TOGGLE ( Alcoswitch )

AE101-2 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2011 - AE413RAA

Abstract: No abstract text available
Text: subject to change without notice. Document AE101-2 Revised 10/20/11 1102 Silver Lake Road Cary IL , 0.115 0.110 2 ,92 2 ,79 Typical L vs Frequency D C max D ref 0.080 0.020 2 ,03 0,51 E F 0.080 0.020 2 ,03 0,51 Suggested Land Pattern G H I J 0.060 0.100 0.040 0.050 1,52 2 ,54 1,02 , MHz 5600 @ 7.9 MHz 6800 @ 7.9 MHz 8200 @ 7.9 MHz 5, 2 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5


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PDF InductorsAE413RAA 6197A 8753ES CCF1297 CCF858 AE101-2 AE413RAA
2011 - AE101-1

Abstract: AE413R AE413RAA392
Text: AE101-2 Revised 10/20/11 1102 Silver Lake Road Cary IL 60013 © Coilcraft, Inc. 2011 Phone , 0.020 0.0600.1000.0400.050 2 ,92 2 ,79 2 ,03 0,51 2 ,03 0,51 1,522,541,021,27 Note: Dimensions are , 5, 2 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 5, 2 5, 2 5, 2 5, 2 5, 2 5, 2 5, 2 5 5 5 , Tolerance: F =1%G = 2 % J = 5% Testing:Z =COTS H = Screening per Coilcraft CP-SA-10001 N = Screening per


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PDF InductorsAE413RAA 6197A 8753ES CCF1297 CCF858 AE101-2 AE101-1 AE413R AE413RAA392
2010 - AE413RAA

Abstract: AE413 AE101-1 AE413RAA122 AE413RAA820 AE413RAA682 AE413RAA471 AE413RAA821 AE413RAA332 AE413RAA330
Text: . Specification subject to change without notice. Document AE101-2 Revised 06/15/10 1102 Silver Lake Road , ,38 both ends Frequency (MHz) Typical L vs Frequency A max B max 0.115 0.110 2 ,92 2 ,79 1,000 900 D C max D ref 0.080 0.020 2 ,03 0,51 E F 0.080 0.020 2 ,03 0,51 Suggested Land Pattern G H I J 0.060 0.100 0.040 0.050 1,52 2 ,54 1,02 1,27 All dimensions are without , 7.9 MHz 4700 @ 7.9 MHz 5600 @ 7.9 MHz 6800 @ 7.9 MHz 8200 @ 2.5 MHz 5, 2 5, 2 5, 2 5, 2 5, 2 ,1


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PDF AE413RAA 1008CS 8753D CCF840 AE101-2 AE413RAA AE413 AE101-1 AE413RAA122 AE413RAA820 AE413RAA682 AE413RAA471 AE413RAA821 AE413RAA332 AE413RAA330
2012 - AE413RAA471

Abstract: SRF 1140 SRF+1140
Text: Doc 362 "Soldering Surface Mount Components" before soldering. ® Document AE101-2 Revised 02/15 , 0.0600.1000.0400.050 2 ,92 2 ,79 2 ,03 0,51 2 ,03 0,51 1,522,541,021,27 Note: Dimensions are before solder application , 820@25 MHz AE413RAA911_SZ 910@25 MHz AE413RAA102_SZ 1000@25 MHz 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 44@500 MHz 45@500 MHz 50@500 MHz 50 @350 MHz 55@350 MHz 55@350 MHz 60@350


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PDF InductorsAE413RAA 306197A 8753ES CCF1297 CCF858 AE101-2 AE413RAA471 SRF 1140 SRF+1140
2009 - Not Available

Abstract: No abstract text available
Text: . Specification subject to change without notice. Document AE101-2 Revised 02/12/09 1102 Silver Lake Road Cary , 2 ,54 1,02 1,27 Typical L vs Frequency 1,000 900 800 750 nH A max B max 0.115 0.110 2 ,92 2 ,79 C max D ref 0.080 0.020 2 ,03 0,51 E F 0.080 0.020 2 ,03 0,51 All dimensions are without solder , Percent tolerance 5, 2 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 5, 2 5, 2 5, 2 5, 2 5, 2 5, 2 5, 2 5


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PDF AE413RAA 1008CS 8753D CCF840 AE101-2
2013 - AE413RAA

Abstract: chip inductors
Text: 0.115 0.110 0.080 0.020 0.080 0.020 0.060 0.100 0.040 0.050 2 ,92 2 ,79 2 ,03 0,51 2 ,03 0,51 1,52 2 ,54 1,02 1,27 Note: Dimensions are before solder application. For maximum overall , 5, 2 5, 2 5, 2 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1 5, 2 ,1   DCR max5 min4 Imax (MHz) (Ohms) (mA)   SRF 44 @ 500 MHz


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PDF AE413RAA 8753ES CCF1297 CCF858 AE101-2â AE413RAA chip inductors
2010 - AE83375

Abstract: AE83395 ms24266r AE559 AE167 AE774 d38999 connector cross reference MS27467 AE556 AE550 MS3476
Text: Aero-Electric Connector, Inc. Table of Contents Mil Spec Catalog (AE101) MIL-DTL-38999 Series I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ­19 MS27466 (AE166 , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 MIL-DTL-26482 Series 2 . . , S III 26482 S 2 83723 S III 26500 ­ 1 ­ sales@aero-electric.com Conesys


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PDF AE101) MIL-DTL-38999 MS27466 AE166) MS27656 AE156) MS27496 AE196) AE665R* MS24266R* AE83375 AE83395 ms24266r AE559 AE167 AE774 d38999 connector cross reference MS27467 AE556 AE550 MS3476
2003 - AF121

Abstract: AH211 U221 MPC8250EC MPC8250 n17 insulation board j29 pinout AD211 aa251 AA231
Text: Freescale Semiconductor Document Number: MPC8250EC Rev. 2 , 07/2009 MPC8250 Hardware , rights reserved. 1. 2 . 3. 4. 5. 6. 7. Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Electrical and Thermal Characteristics . . . . . . . . . . . , at 200 MHz; 280 Dhrystones MIPS at 200 MHz) MPC8250 Hardware Specifications, Rev. 2 2 Freescale , /performance optimization - Internal core/bus clock multiplier that provides 1.5:1, 2 :1, 2.5:1, 3:1, 3.5:1, 4


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PDF MPC8250EC MPC8250 MPC8250 AF121 AH211 U221 MPC8250EC n17 insulation board j29 pinout AD211 aa251 AA231
2003 - ah171

Abstract: AC201 AF131 AE91 AF241 AF181 AD211 ac221 aa251 AA191
Text: : Topic Page Section 1.1, "Features" 2 Section 1.2, "Electrical and Thermal Characteristics , Block Diagram 1.1 Features The major features of the MPC8250 are as follows: · · 2 , frequencies for power/performance optimization - Internal core/bus clock multiplier that provides 1.5:1, 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios - Internal CPM/bus clock multiplier that provides 2 :1, 2.5:1 , , single-master, and slave modes - Up to four TDM interfaces ­ Supports one group of four TDM channels ­ 2 ,048


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PDF MPC8250EC/D MPC8250 MPC8250 ah171 AC201 AF131 AE91 AF241 AF181 AD211 ac221 aa251 AA191
2003 - AF121

Abstract: AC261
Text: Freescale Semiconductor Document Number: MPC8250EC Rev. 2 , 07/2009 MPC8250 Hardware , , 2009. All rights reserved. 1. 2 . 3. 4. 5. 6. 7. Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Electrical and Thermal Characteristics . . . . . , , Rev. 2 2 Freescale Semiconductor Features • • • • • • • â , multiplier that provides 1.5:1, 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios — Internal CPM/bus clock


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PDF MPC8250EC MPC8250 MPC8250 AF121 AC261
2003 - AG151

Abstract: MPC860 MPC8280 MPC8260 MPC8250EC MPC8250 k241 j29 pinout aa251 AH-61
Text: reserved. 1. 2 . 3. 4. 5. 6. 7. Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Electrical and Thermal Characteristics . . . . . . . . . . . . 6 Clock , ) MPC8250 Hardware Specifications, Rev. 1 2 Freescale Semiconductor Features · · · · · , core/bus clock multiplier that provides 1.5:1, 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios - Internal CPM/bus clock multiplier that provides 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios 64-bit data


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PDF MPC8250EC MPC8250 MPC8250 AG151 MPC860 MPC8280 MPC8260 MPC8250EC k241 j29 pinout aa251 AH-61
2003 - AD251

Abstract: AC201 AG151 MPC8280 MPC8260 MPC8250 rena3 b261 AC221 AF121
Text: , "Features" 2 Section 1.2, "Electrical and Thermal Characteristics" 5 Section 1.2.1, "DC , : · · 2 Footprint-compatible with the MPC8260 Dual-issue integer core - A core version of , optimization - Internal core/bus clock multiplier that provides 1.5:1, 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios - Internal CPM/bus clock multiplier that provides 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios , , single-master, and slave modes - Up to four TDM interfaces ­ Supports one group of four TDM channels ­ 2 ,048


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PDF MPC8250EC/D MPC8250 MPC8250 AD251 AC201 AG151 MPC8280 MPC8260 rena3 b261 AC221 AF121
2007 - PPC405GP3FE200C

Abstract: AD143 PPC405GP-3KE200C PPC405GP PPC405GP equivalent E22-E21 AF82 PPC405GP-3BE200C PPC405GP-3BE266C
Text: 2 AMCC Revision 2.02 ­ March 13, 2007 405GP ­ Power PC 405GP Embedded Processor Data , PPC405GP PPC405GP PPC405GP PPC405GP PPC405GP PPC405GP PPC405GP PPC405GP PPC405GP Order Part Number1, 2 , Number indicates a tape-and-reel shipping package. Otherwise, the chips are shipped in a tray. 2 . Package , Internal Peripherals IIC0 OPB Arbiter GPIO Controller Registers Ethernet Controller Registers 2 Start , automatically configured at reset to the address range listed above. 2 . If PCI boot is selected, a PLB-to-PCI


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PDF 405GP 405GP 32-bit 266MHz 133MHz 40-bit 32-bit, PPC405GP3FE200C AD143 PPC405GP-3KE200C PPC405GP PPC405GP equivalent E22-E21 AF82 PPC405GP-3BE200C PPC405GP-3BE266C
1999 - y51 h 120c

Abstract: PPC405GP
Text: . . . . . . . . . 56 2 PowerPC 405GP Embedded Processor Data Sheet Figures PPC405GP , SDRAM, ROM or Peripherals. 2 . The Boot ROM and Expansion ROM area of the memory map are intended for use , Reserved DMA Controller Registers Reserved Ethernet MAL Registers Reserved [0: 2 ] = 011 [0:3] = 0100 parm , Bus Power Management v1.1 compliant · Supports 1:1, 2 :1, 3:1, 4:1 clock ratios from PLB to PCI · , addressing modes are programmable. Features include: · 11x8 to 13x11 addressing for SDRAM ( 2 - and 4-bank) ·


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PDF 405GP 32-bit PC-100 40-bit 32-bit, 66MHz) SA14-2521-02 y51 h 120c PPC405GP
1999 - y51 h 120c

Abstract: PPC405GP IBM25PPC405GP-3BC200C
Text: . . . . . . . . . 56 2 PowerPC 405GP Embedded Processor Data Sheet Figures PPC405GP , SDRAM, ROM or Peripherals. 2 . The Boot ROM and Expansion ROM area of the memory map are intended for use , Reserved DMA Controller Registers Reserved Ethernet MAL Registers Reserved [0: 2 ] = 011 [0:3] = 0100 parm , Bus Power Management v1.1 compliant · Supports 1:1, 2 :1, 3:1, 4:1 clock ratios from PLB to PCI · , addressing modes are programmable. Features include: · 11x8 to 13x11 addressing for SDRAM ( 2 - and 4-bank) ·


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PDF 405GP 32-bit PC-100 40-bit 32-bit, 66MHz) SA14-2521-01 y51 h 120c PPC405GP IBM25PPC405GP-3BC200C
1999 - y51 h 120c

Abstract: IBM PPC405Gp IBM25PPC405GP-3BD200C 3DD200 IBM25PPC405GP3BD200CZ PPC405GP IBM25PPC405GP IBM powerpc 405gp 64kb/y51 h 120c
Text: . . . . . . . . . . . . . 56 2 Preliminary PowerPC 405GP Embedded Controller Data Sheet , or Peripherals. 2 . The Boot ROM and Expansion ROM area of the memory map are intended for use by ROM , Reserved DMA Controller Registers Reserved Ethernet MAL Registers Reserved [0: 2 ] = 011 [0:3] = 0100 parm , : - PCI Bus Power Management v1.1 compliant · Supports 1:1, 2 :1, 3:1, 4:1 clock ratios from PLB to PCI , for SDRAM ( 2 - and 4-bank) · Memory bus operates at same frequency as PLB · 32-bit memory interface


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PDF 405GP 32-bit PC-100 40-bit 32-bit, 66MHz) SA14-2521-00 y51 h 120c IBM PPC405Gp IBM25PPC405GP-3BD200C 3DD200 IBM25PPC405GP3BD200CZ PPC405GP IBM25PPC405GP IBM powerpc 405gp 64kb/y51 h 120c
1999 - y51 h 120c

Abstract: IBM powerpc 405gp 456-BALL PPC405GP
Text: . . . . . . . . . . . . . 56 2 Preliminary PowerPC 405GP Embedded Controller Data Sheet , or Peripherals. 2 . The Boot ROM and Expansion ROM area of the memory map are intended for use by ROM , Reserved DMA Controller Registers Reserved Ethernet MAL Registers Reserved [0: 2 ] = 011 [0:3] = 0100 parm , : - PCI Bus Power Management v1.1 compliant · Supports 1:1, 2 :1, 3:1, 4:1 clock ratios from PLB to PCI , for SDRAM ( 2 - and 4-bank) · Memory bus operates at same frequency as PLB · 32-bit memory interface


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PDF 405GP 32-bit PC-100 40-bit 32-bit, 66MHz) SA14-2521-00 y51 h 120c IBM powerpc 405gp 456-BALL PPC405GP
2003 - Pinout Diagram for IC 7400 motorola

Abstract: AH221 AH271 MPC8250ACVRIHBC ag151 taipan 10200a AF121 KMPC8250ACZUMHBC Pinout Diagram for IC 7400
Text: " Section 1.6, "Ordering Information" Page 2 5 5 10 10 11 19 19 22 28 53 56 The MPC8250 is available in , cache coherency - Floating-point unit (FPU) The major features of the MPC8250 are as follows: 2 , multiplier that provides 1.5:1, 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios - Internal CPM/bus clock multiplier that provides 2 :1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios 64-bit data and 32-bit address 60x bus , interfaces ­ Supports one group of four TDM channels ­ 2 ,048 bytes of SI RAM ­ Bit or byte resolution ­


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PDF MPC8250EC/D MPC8250 XPC8250AZUIFBA XPC8250AZUMHBA XPC8250AZUPHBA MC33702 Pinout Diagram for IC 7400 motorola AH221 AH271 MPC8250ACVRIHBC ag151 taipan 10200a AF121 KMPC8250ACZUMHBC Pinout Diagram for IC 7400
2007 - PPC405GP-3EE200C

Abstract: PPC405GP-3BE266C PPC405GP-3FE200C PPC405GP PPC405GP-3BE133C PPC405GP-3EE266C ppc405gp-3de200 PPC405GP-3BE200C powerpc 405gp EPBGA
Text: . . . . . . . . . . . . . . . . . . . . . . . . . . 55 2 AMCC Revision 2.03 ­ September 7 , Product Name Order Part Number1, 2 Processor Frequency Package Rev Level PVR Value , . Otherwise, the chips are shipped in a tray. 2 . Package types F (35mm) and K (27mm) are lead-free. The , 0x00000000 0xE7FFFFFF 3712MB Boot-up Peripheral Bus Boot 1 PCI Boot 2 0xE8010000 , . 2 . If PCI boot is selected, a PLB-to-PCI mapping is automatically configured at reset to the address


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PDF 405GP 405GP 32-bit 266MHz 133MHz 40-bit 32-bit, 66MHz) PPC405GP-3EE200C PPC405GP-3BE266C PPC405GP-3FE200C PPC405GP PPC405GP-3BE133C PPC405GP-3EE266C ppc405gp-3de200 PPC405GP-3BE200C powerpc 405gp EPBGA
1999 - IBM25PPC405GP-3BE266C

Abstract: ibm25ppc405gp-3be200c IBM25PPC405GP3BE200CZ IBM25PPC405GP-3EE200C PPC405GP IBM25PPC405GP-3BE266CZ IBM25PPC405GP-3DE266 RISCwatch IBM25PPC405GP-3EE266C AD143
Text: . . . . . . . . . . . 55 2 PowerPC 405GP Embedded Processor Data Sheet Figures PPC405GP , 0xE87FFFFF 8MB 0xEC000000 0xEEBFFFFF 44MB Boot-up Peripheral Bus Boot PCI Boot 2 , . 2 . If PCI boot is selected, a PLB-to-PCI mapping is automatically configured at reset to the address , · Power Management: - PCI Bus Power Management v1.1 compliant · Supports 1:1, 2 :1, 3:1, 4:1 clock , to 13x11 addressing for SDRAM ( 2 - and 4-bank) · 32-bit memory interface support · Programmable


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PDF 405GP 32-bit 266MHz 66MHz) PC-133 40-bit 10/100Mbps SA14-2521-11 IBM25PPC405GP-3BE266C ibm25ppc405gp-3be200c IBM25PPC405GP3BE200CZ IBM25PPC405GP-3EE200C PPC405GP IBM25PPC405GP-3BE266CZ IBM25PPC405GP-3DE266 RISCwatch IBM25PPC405GP-3EE266C AD143
2004 - PPC405GP

Abstract: PPC405GP equivalent 3DE2 PPC405GP-3BE266C powerpc 405gp PPC405GP-3DE133C PPC405GP-3BE200C PPC405GP-3BE133C 3DE200 IBM powerpc 405gp
Text: . 69 2 AMCC PPC405GP ­ PowerPC 405GP Embedded Processor Revision 1.01 ­ August 27, 2004 , . 6 Figure 2 . 25mm, 413-Ball E-PBGA Package , . 7 Table 2 . DCR Address Map 4KB Device Configuration Registers , 0xEF500000 0xF0000000 Peripheral Bus Boot 1 Boot-up PCI Boot 2 PCI I/O PCI I/O PCI Configuration Registers , to the address range listed above. 2 . If PCI boot is selected, a PLB-to-PCI mapping is automatically


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PDF PPC405GP PPC405GP 405GP 32-bit 266MHz 133MHz 40-bit 32-bit, PPC405GP equivalent 3DE2 PPC405GP-3BE266C powerpc 405gp PPC405GP-3DE133C PPC405GP-3BE200C PPC405GP-3BE133C 3DE200 IBM powerpc 405gp
2000 - cir 2262 af

Abstract: MS3402 OEP-220 om-15 oil en2997 M28748/10 m28748 OM 15 MIL-H-5606 ms3406 Douglas BAN 7025 standard
Text: . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Performance Specifications . . . . . . . . . , monoblock inserts JTVG is UL approved J-Tech is ISO 9001 and AS9100B certified www.conesys.com ­ 2 ­ , requirements of MIL-DTL-5015 Series I Solder Test Condition 2 (no lockwires required) Plating 2 ­ silver , over nickel sulfamate Y ­ aluminum shell, zinc cobalt black over nickel sulfamate 2 ­ aluminum shell , -8625 type III class 2 , color black (consult factory for other finish or material options) Maximum


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PDF AS9100-certified, cir 2262 af MS3402 OEP-220 om-15 oil en2997 M28748/10 m28748 OM 15 MIL-H-5606 ms3406 Douglas BAN 7025 standard
2004 - PPC405GP equivalent

Abstract: AD143 PPC405GP PPC405GP-3BE200C
Text: Part Number 405GP Revision 2.00 ­ December 2 , 2004 405GP Features Data Sheet Power PC , 1 405GP ­ Power PC 405GP Embedded Processor Revision 2.00 ­ December 2 , 2004 Data Sheet , 2 AMCC Revision 2.00 ­ December 2 , 2004 Data Sheet Figures 405GP ­ Power PC 405GP , 49 AMCC 3 405GP ­ Power PC 405GP Embedded Processor Revision 2.00 ­ December 2 , 2004 , , 413 E-PBGA 4 AMCC Revision 2.00 ­ December 2 , 2004 Data Sheet 405GP ­ Power PC 405GP


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PDF 405GP 405GP 32-bit 266MHz 133MHz 40-bit 32-bit, PPC405GP equivalent AD143 PPC405GP PPC405GP-3BE200C
1999 - PPC405GP

Abstract: No abstract text available
Text: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 2 PowerPC 405GP , for any of the above functions. Peripheral Bus Boot 1 PCI Boot 2 PCI I/O PCI I/O PCI Configuration , to the address range listed above. 2 . If PCI boot is selected, a PLB-to-PCI mapping is automatically , Power Management v1.1 compliant · Supports 1:1, 2 :1, 3:1, 4:1 clock ratios from PLB to PCI · Buffering , programmable. Features include: · 11x8 to 13x11 addressing for SDRAM ( 2 - and 4-bank) · 32-bit memory interface


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PDF 405GP 32-bit PC-133 40-bit 32-bit, 66MHz) SA14-2521-07 PPC405GP
1999 - PPC405GP

Abstract: IBM powerpc 405gp powerpc 405gp 405GP pci register AD143 405GP SA-12E PPC405GP equivalent Y51 h 85c
Text: . . . . . . . . . . . 55 Page 2 of 58 4/14/03 PowerPC 405GP Embedded Processor Data Sheet , Boot-up Peripheral Bus Boot PCI Boot 2 0xEF3FFFFF 6MB 0xEF500000 0xEF5FFFFF 1MB , bank 0 is automatically configured at reset to the address range listed above. 2 . If PCI boot is , .1 compliant · Supports 1:1, 2 :1, 3:1, 4:1 clock ratios from PLB to PCI · Buffering between PLB and PCI: - , addressing for SDRAM ( 2 - and 4-bank) · 32-bit memory interface support · Programmable address compare for


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PDF 405GP 32-bit 266MHz PC-133 40-bit 66MHz) 10/100Mbps SA14-2521-12 PPC405GP IBM powerpc 405gp powerpc 405gp 405GP pci register AD143 SA-12E PPC405GP equivalent Y51 h 85c
Supplyframe Tracking Pixel