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AM5718AABCXQ1 Texas Instruments Sitara Processor: Arm Cortex-A15 & DSP, Multimedia 760-FCBGA -40 to 125
TPS6590379ZWSR Texas Instruments Power Management IC (PMIC) for ARM Cortex A15 Processors 169-NFBGA -40 to 85
AM5726BABCXAR Texas Instruments Sitara Processor: Dual Arm Cortex-A15 & Dual DSP 760-FCBGA -40 to 105
AM5716AABCD Texas Instruments Sitara Processor: Arm Cortex-A15 & DSP 760-FCBGA 0 to 90
XAM5708ACBDJEA Texas Instruments Sitara Processor: ARM Cortex-A15 & DSP, Multimedia 538-FCBGA -40 to 105
O9038A35AIZWSRQ1 Texas Instruments Automotive Power Management IC (PMIC) for ARM Cortex A15 processors 169-NFBGA -40 to 85
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2001 - DSTINI1-1MG

Abstract: CRC-16 DS2480 DS80C390 DTR232 RX232 a0-a7 ROM
Text: NEXT INSTR READ A8-A15 A8-A15 A8-A15 A8-A15 PORT 4 ­ CE0-3 PORT 5 ­ PCE0-3 A9-A16 , ADDR D0-D7 D0-D7 MOVX DATA ADDR NEXT INSTR READ A8-A15 A8-A15 A8-A15 A8-A15 , ADDRESS MOVX INSTR PORT 2 A8-A15 D0-A7 D0-A7 MOVX DATA ADDR NEXT INSTR READ A8-A15 A8-A15 A8-A15 A16-A19 A16-A19 A16-A19 A16-A19 A0-A7 A0-A7 A0-A7 A0-A7 PORT


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PDF DS80C390 10/100Base-T 512K/1MByte DSTINI1-512 432MHz, 864MHz. DSTINI1-1MG CRC-16 DS2480 DTR232 RX232 a0-a7 ROM
1996 - A8-A15

Abstract: AN-121 3 bit parity checker using cmos
Text: Parity B0-B7 8 8 8 A8-A15 PA2 PB2 A0-A7 B0-B7 8 16 Data N/C PB1 , FCT374T Registers Data & Parity 8 N/C A8-A15 B8-B15 PA2 PB2 8 N/C VCC N/C N , Latch Enable 280 Clock * 8 P1 D8-D15 P2 N/C DIR A8-A15 CLKBA GEN/CHK ODD , A0-A7 PA1 8 PB2 125 FCT245T LEBA CLKAB D0-D7 PB1 125 B0-B7 PB1 A8-A15 , A8-A15 N/C ParityError A0-A7 PA1 8 A8-A15 PA2 PERA B0-B7 8 PB1 B8-B15 B0-B7


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PDF AN-121 162511T A8-A15 AN-121 3 bit parity checker using cmos
AD00-AD07

Abstract: DIODE B31 DIODE B23 A16-A23 74ACTQ3283T
Text: . Pin Description Pin Names Description A0-A7 Aq Byte Inputs/Outputs A8-A15 A1 Byte Inputs/Outputs , of the two 32-bit A8-A15 A08-A15 8 I/O busses serviced by the A16-A23 A16-A23 8 I/O 'ACTQ3283T. , A8-A15 B8-B15 a16-a23 B16-B23 a24-a31 b24-b31 B0-B7 b00-b07 8 I/O One of the two 32-bit B8-B15 b08-b15 , transfer from B bus to A bus the signal associations are: B0-B7 AQ-A7 B8-B15 A8-A15 B16-B23 A16-A23 b24-b31 , to the B side. Signal associations are: GAB0 Aq-A7 B0-B7 GABi A8-A15 B8-B15 GAB2 A16-A23 B16-B23 GAB3


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PDF 74ACTQ3283T 32-Bit ACTQ3283T 16-b60 20-3A AD00-AD07 DIODE B31 DIODE B23 A16-A23
SDA 555XFL A14

Abstract: SDA 555xFL SDA-555XFL data Sheet SDA555XFL PMQFP64 THE DIAGRAM IC SDA 555XFL A14 6251-556-2AN
Text: high while writing the addresses to the address latch. The address bits are grouped: A0-A7, A8-A15 , flash module is not reset. 0 A8-A15 2 ASEL1 0 Micronas SDA 555xFL APPLICATION , ) XX A0-A7 A8-A15 A0-A7 A16 A8-A15 D0-D7 A16 Fig. 4­4: Inserting address and , P3.6 t1 P1.7 t2 Port 0 XX A0-A7 A8-A15 A16-A20 XX D0-D7 XX D0-D7 XX , t10 t12 t9 A0-A7 A0-A7 A0-A15 A8-A15 A0-A20 A16-A20 D0-D7 from Port XX


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PDF 6251-556-2AN 555xFL SDA 555XFL A14 SDA 555xFL SDA-555XFL data Sheet SDA555XFL PMQFP64 THE DIAGRAM IC SDA 555XFL A14 6251-556-2AN
IN80C31N

Abstract: IN80C51N TCLCL-50 IN805 80C51
Text: tPLAZ tPXIX PORT 0 A0-A7 INSTR IN A0-A7 tAVIV PORT 2 A0-A15 A8-A15 1 , DATA IN A0-A7 FROM PCL INSTR IN tRHDX tAVWL tAVDV P2.0-P2.7 OR A8-A15 FROM DPH , PORT2 P2.0-P2.7 OR A8-A15 FROM A0-A15 FROM PCH 3. . , 220064, , . 12 : +375 (17) 278


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PDF IN80C31N/IN80C51N IN80C51N IN8051N 80C51) 80C31) A8-A15 A0-A15 IN80C31N IN80C51N TCLCL-50 IN805 80C51
1993 - AN-121

Abstract: No abstract text available
Text: A8-A15 PA2 PERA PB2 PERB B0-B7 8 16 Data N/C PB1 N/C PB1 B8-B15 A0-A7 PA1 N/C 8 D8 -D15 ODD/EVEN 8 N/C A8-A15 B8-B15 PA2 PB2 N/C N/C VCC , Clock * D0-D7 8 P1 D8-D15 P2 N/C PB1 125 FCT245T DIR A8-A15 CLKBA GEN/CHK , A A0-A7 PA1 8 PB2 125 B0-B7 PB1 A8-A15 B8-B15 PA2 PERA 8 PB2 PERB , 8 A8-A15 PA2 PERA B0-B7 8 PB1 B8 -B15 B0 -B7 PB1 8 B8 -B15 PB2 PB2


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PDF AN-121 162511T FCT162511T AN-121
1997 - MB84256C

Abstract: mb84256c-70 74LS373 74ls373 datasheet PIC16C74 011B A8-15 TB011 MB84256
Text: A8-A15 RB0-7 32K x 8 PIC16C74 OE WE D0-D7 74LS373 A15 PD0-7 ALE RE2 CS A0-A7 , ;* ;* Initialize the Multiplexed Address/Data Bus ;* ;* AD0-AD7 is PORTD 0-7 ;* A8-A15 is PORTB 0-7 ;* ALE is , 0xf8 TRISE,F ;switch to bank 1 registers ;set A8-A15 as output ;set AD0-AD7 as output STATUS,RP0 ;switch to bank 0 registers ADHIGH ADLOW 3 PORTE ;set A8-A15 to 0 (PORTB) ;set , ;* ;* Write to External Memory on muxed bus ;* INPUT: PORTB= A8-A15 , PORTD = AD0-AD7, W= 8-bit data to write


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PDF TB011 PIC16CXXX PIC16C74 PIC16C74. MB84256C mb84256c-70 74LS373 74ls373 datasheet 011B A8-15 TB011 MB84256
1997 - mb84256c

Abstract: PIC16c74 block diagram MB84256C-70 porte TB011 PIC16C74 A8-15 74LS373 011B AD07
Text: A8-A15 RB0-7 32K x 8 PIC16C74 OE WE D0-D7 74LS373 A15 PD0-7 ALE RE2 CS A0-A7 , ;* ;* Initialize the Multiplexed Address/Data Bus ;* ;* AD0-AD7 is PORTD 0-7 ;* A8-A15 is PORTB 0-7 ;* ALE is , 0xf8 TRISE,F ;switch to bank 1 registers ;set A8-A15 as output ;set AD0-AD7 as output STATUS,RP0 ;switch to bank 0 registers ADHIGH ADLOW 3 PORTE ;set A8-A15 to 0 (PORTB) ;set , ;* ;* Write to External Memory on muxed bus ;* INPUT: PORTB= A8-A15 , PORTD = AD0-AD7, W= 8-bit data to write


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PDF TB011 PIC16CXXX PIC16C74 PIC16C74. 1011A-page mb84256c PIC16c74 block diagram MB84256C-70 porte TB011 A8-15 74LS373 011B AD07
GBA 616

Abstract: 74ACTQ3283T B1623
Text: performed. 'ACTQ3283T Symbol Discrete Symbol # of Pins Type* Function a0-a7 A8-A15 Ai6-A23 A24-A31 , 'actq3283t. During transfer from a bus to b bus the signal associations are: a0-a7 b0-b7 A8-A15 b8-b15 A16-A23 , bus the signal associations are: b0-b7 A0-a7 bg-b-,5 A8-A15 B16-B23 A16-A23 b24-b31 A24-A31 , . Signal associations are: GAB0 Aq-A7 b0-b7 GAB! A8-A15 B8-B15 5ab2 a16-a23 b16-b23 gab3 a24-a31 b24-b31 *l , associations are: b0-b7 AQ-a7 be-bis a8-a15 B-16-B23 a-I6-A23 B24-B31 a24-a31 bpar0-bpar3 bpar0-bpar3 4 I


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PDF 74ACTQ3283T 32-Bit ACTQ3283T 16-bit 32-Bit) 16-Bit) TL/F/10979-15 GBA 616 B1623
1998 - MSM85C154VS

Abstract: 10KW 27C128 MSM83C154S MSM85C154HVS Xtal12 mhz
Text: No file text available


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PDF J2E1024-27-Y2 MSM85C154HVS MSM85C154HVS MSM83C154S MSM85C154HVSMSM83C154S8 122MHz1622MHz 25V116MHz MSM85C154VS 827C128 MSM85C154VS 10KW 27C128 MSM83C154S Xtal12 mhz
1995 - IBM 2568

Abstract: PC-9800 a10-p00 EP-78365GF-R RA78K3 uPD78P368AKL uPD78P368AGF uPD78P368A uPD78366A uPD78356
Text: AD0-AD7 Address/Data Bus P90-P93 Port9 A8-A15 Address Bus RTP0-RTP3 Real-time Port , UNIT TI TIUD 8 A8-A15 & 8 AD0-AD7 PREFETCH CONTROL 17 A0-A16 8 D0-D7 , RxD1 P40-P47 AD0-AD7 P50-P57 A8-A15 P70-P77 , - AD0-AD7 A8-A15 ASTB P40-P47 P50-P57 AD0-AD7, A8-A15 - , 30 0.8 VDD2.2 V 0.2 VDD0.8 V µPD78P368A tCYK CLK A8-A15 tSAST AD0-AD7


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PDF PD78P368A PD78P368APD78366AROMPROMEPROM PD78366A U10205J PD78356 IEU-853 ROMPD78366A PROM48 PROMPD27C1001A IBM 2568 PC-9800 a10-p00 EP-78365GF-R RA78K3 uPD78P368AKL uPD78P368AGF uPD78P368A uPD78366A uPD78356
1996 - mb84256c

Abstract: mb84256c-70 mb84256c70 MB84256 pic16c74 applications A8-15 TB011 PIC16CXX PIC16C74 LS373
Text: . RB<7:0> A15 A8-A15 A0-A7 CS D0-D7 32K x 8 PIC16C74 OE WE D0-D7 RD WR , ;* ;* Initialize the Multiplexed Address/Data Bus ;* ;* AD0-AD7 is PORTD 0-7 ;* A8-A15 is PORTB 0-7 ;* ALE is , 0xf8 TRISE,F ;switch to bank 1 registers ;set A8-A15 as output ;set AD0-AD7 as output STATUS,RP0 ;switch to bank 0 registers ADHIGH ADLOW 3 PORTE ;set A8-A15 to 0 (PORTB) ;set , ;* ;* Write to External Memory on muxed bus ;* INPUT: PORTB= A8-A15 , PORTD = AD0-AD7, W= 8-bit data to write


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PDF TB011 PIC16CXX PIC16C74 PIC16C74. PIC16C74 DS91011A mb84256c mb84256c-70 mb84256c70 MB84256 pic16c74 applications A8-15 TB011 PIC16CXX LS373
1995 - EP-78365GF-R

Abstract: uPD78356 uPD78366A uPD78P368A uPD78P368AGF uPD78P368AKL IE-78365-R-EM1 RA78K3 IBM 2568
Text: AD0-AD7 Address/Data Bus P90-P93 Port9 A8-A15 Address Bus RTP0-RTP3 Real-time Port , UNIT TI TIUD 8 A8-A15 & 8 AD0-AD7 PREFETCH CONTROL 17 A0-A16 8 D0-D7 , RxD1 P40-P47 AD0-AD7 P50-P57 A8-A15 P70-P77 , - AD0-AD7 A8-A15 ASTB P40-P47 P50-P57 AD0-AD7, A8-A15 - , 30 0.8 VDD2.2 V 0.2 VDD0.8 V µPD78P368A tCYK CLK A8-A15 tSAST AD0-AD7


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PDF PD78P368A PD78P368APD78366AROMPROMEPROM PD78366A U10205J PD78356 IEU-853 ROMPD78366A PROM48 PROMPD27C1001A EP-78365GF-R uPD78356 uPD78366A uPD78P368A uPD78P368AGF uPD78P368AKL IE-78365-R-EM1 RA78K3 IBM 2568
1992 - HS-65643

Abstract: Harris Semiconductor, rad hard, HCS373 HCTS373 HS-65647RH
Text: A8-A15 OR A8-A12 D HCS373 The Harris SOS 64K SRAMs provide excellent single event and total , E or E1 signal to the 373's LE pin as shown in Figure 1. Q OE FIGURE 1. A8-A15 OR


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PDF HCS373 HCTS373 HCS373 HS-65643 Harris Semiconductor, rad hard, HS-65647RH
toshiba scheme

Abstract: TC220C TC220E hard disk toshiba
Text: No file text available


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PDF TC220C/E TC220C TC220E AS31950497 toshiba scheme hard disk toshiba
2008 - Intel 8237 dma controller block diagram

Abstract: C8237 3S50-5 Intel 8237 16 bit register in verilog BIT20
Text: 0 1 A8-A15 0 W0-W7 0 1 1 W8-W15 0 A0-A7 0 1 0 1 A8-A15 , 1 0 0 1 A8-A15 CH 2 Base and Current Word Count 0 W0-W7 0 1 0 1 1 W8-W15 CH 3 Base and Current Address 0 A0-A7 0 1 1 0 1 A8-A15


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PDF C8237 C8237 Intel 8237 dma controller block diagram 3S50-5 Intel 8237 16 bit register in verilog BIT20
1999 - CDP6805E3E

Abstract: CDP6805E2 CDP6805E2C CDP6805E2CE CDP6805E2E CDP6805E3 CDP6805E3C CDP6805E3CE
Text: 0.25mA) A8-A15 , B0-B7 VOH 2.7 - V (ILOAD = 0.1mA) PA0-PA7, PB0-PB7 VOH 2.7 - V (ILOAD = 0.25mA) DS, AS, R/W VOH 2.7 - V (ILOAD = 0.25mA) A8-A15 , B0-B7 VOL - 0.3 , , AS, R/W, A8-A15 , PA0-PA7, PB0-PB7, B0-B7 NOTES: 2. Test conditions are Quiescent Current Values are , ) IDD - 200 µA (ILOAD = 1.6mA) A8-A15 , B0-B7 VOH 4.1 - V (ILOAD = 0.36mA , = 1.6mA) A8-A15 , B0-B7 VOL - 0.4 V (ILOAD = 1.6mA) PA0-PA7, PB0-PB7 VOL -


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PDF CDP6805E2, CDP6805E2C, CDP6805E3, CDP6805E3C CDP6805E2 CDP6805E3 CDP6805 CDP6805E3E CDP6805E2C CDP6805E2CE CDP6805E2E CDP6805E3C CDP6805E3CE
LVT162245

Abstract: 74LVT162245MTD H4344 74LVT162245 2227b 74LVT162245MEAX 74LVT162245MTDX MS48A MTD48 A6-A15
Text: L L L H H X Bus B8-B15 Data to Bus A8-A15 Bus A8-A15 Data to Bus Bs-B^ HIGH-Z State on A6-A15


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PDF 74LVT162245 16-Bit LVT162245 B8-B15 A8-A15 A6-A15, 74LVT162245MTD H4344 74LVT162245 2227b 74LVT162245MEAX 74LVT162245MTDX MS48A MTD48 A6-A15
2008 - C8237

Abstract: Intel 8237 dma controller block diagram
Text: A8-A15 0 0 0 1 0 1 W0-W7 W8-W15 0 A0-A7 A8-A15 0 1 0 0 0 1 , A8-A15 W0-W7 W8-W15 0 1 0 CH 2 Base and Current Word Count 0 1 0 1 0 1 CH 3 Base and Current Address 0 1 1 0 0 1 A0-A7 A8-A15 CH 3 Base and


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PDF C8237 Intel 8237 dma controller block diagram
2000 - Intel 8237

Abstract: vhdl code for 4 channel dma controller Intel 8237 dma controller block diagram C8237 vhdl code for flip-flop Intel 8237 dma EP1K30 EP20K60E EPF10K100B EPF10K30A
Text: 0 0 0 1 CH 2 Base and Current Word Count 1 W0-W7 1 0 A8-A15 0 CH 3 , 1 W0-W7 1 0 A8-A15 0 1 A0-A7 1 0 W8-W15 0 CH 2 Base and Current Address 0 W0-W7 1 0 A8-A15 0 CH 1 Base and Current Word Count A0-A7 1 , and Current Address 0 A8-A15 0 0 A0-A7 A1 DB0-DB7 0 CH 0 Base and Current


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PDF C8237 C8237 Intel 8237 vhdl code for 4 channel dma controller Intel 8237 dma controller block diagram vhdl code for flip-flop Intel 8237 dma EP1K30 EP20K60E EPF10K100B EPF10K30A
1996 - I2C-bus specification 3

Abstract: sot187-3 P83CE528EFB P83CE528EBB P83CE528 P80CE528EFB P80CE528EFA P80CE528EBB P80CE528EBA P80CE528
Text: BUS (PORT 0) ADDRESS A8-A15 INST IN ADDRESS A0-A7 INST IN ADDRESS A8-A15 ADDRESS A0-A7 ADDRESS A8-A15 DATA OUTPUT OR DATA INPUT ADDRESS A8-A15 ADDRESS A0-A7 READ OR WRITE OF EXTERNAL DATA MEMORY PORT 2 PORT OUTPUT ADDRESS A8-A15 OR PORT 2 OUT ADDRESS A8-A15 OLD DATA NEW DATA PORT INPUT SAMPLING TIME OF I/O PORT PINS DURING INPUT (INCLUDING , ADDRESS A8-A15 Philips Semiconductors


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PDF P8xCE528 80C51 P83CE528, P80CE528 P8xCE528) PCB80C51 P8xCE528 80C51. P83CE528: 32kbytes I2C-bus specification 3 sot187-3 P83CE528EFB P83CE528EBB P83CE528 P80CE528EFB P80CE528EFA P80CE528EBB P80CE528EBA P80CE528
82C37A DMA Controller

Abstract: 82C37A-5 80C86 8085AH Intel 8237A intel 80C88 -harris -intersil cpu intel 8085 82c37 DMA compatible 82C37 8237A transfer modes
Text: occur when A8-A15 need updating (see Address Generation). Timing for compressed transfers is found in , and speed transfers, the 82C37A-5 executes S1 states only when updating of A8-A15 in the latch is , and Current Address Write 0 1 0 0 0 0 0 0 A0-A7 0 1 0 0 0 0 0 1 A8-A15 . Current Address Read 0 0 1 0 0 0 0 0 A0-A7 0 0 1 0 0 0 0 1 A8-A15 Base and Current Word Count Write 0 1 0 0 0 0 1 0 , W8-W15 1 Base and Current Address Write 0 1 0 0 0 1 0 0 A0-A7 0 1 0 0 0 1 0 1 A8-A15 Current


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PDF 82C37A-5 237A-5 40-Lead 82C37A-5 82C37A DMA Controller 80C86 8085AH Intel 8237A intel 80C88 -harris -intersil cpu intel 8085 82c37 DMA compatible 82C37 8237A transfer modes
1998 - psd3xx

Abstract: 80c196 intel 80c196 microcontroller 80C31 intel 80c251 80C198 A815 zilog z80 80C196 intel 68hc711
Text: A8-A15 LOWER ADDRESS LATCH A0-A7 CONTROL ALE/AS RD/E/DS · Latches for Multiplexed , &C51 FAMILIES P1 0-7 P0 0-7 P2 0-7 RESET A8-A15 PSD6XX/7XX PSD8XXF ADDRESS /DATA , DATA ADDRESS FLASH or SRAM 80C251 FAMILY P1 0-7 P0 0-7 P2 0-7 RESET A8-A15 , DATA ADDRESS FLASH or SRAM 80C188 FAMILY A8-A15 PSD6XX/7XX PSD8XXF ADDRESS /DATA , FLASH or SRAM PSD2XX PSD3XX PC 0-7 ADDRESS /DATA A8-A15 PB 0-7 PC1 OE\ AD8


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PDF wsi98web4a 80C31/51 80C251 80C51XA 80C196 80C186 80C188 80C386EX 68HC05 68HC11 psd3xx 80c196 intel 80c196 microcontroller 80C31 intel 80c251 80C198 A815 zilog z80 80C196 intel 68hc711
3-P42

Abstract: 3P23 P30C P32E 83C152 3p04 3p46 P34E ECL 10102
Text: TPLIV \ A0-A7 / TPLAZ -TAVIV - TPXIX INSTR IN TPXIZ A0-A7 A8-A15 A8-A15 270188-6 EXTERNAL DATA MEMORY , .0-P2.7 OR A8-A15 FROM DPH X A8-A15 FROM PCH 270188-7 10-110 Powered by ICminer.com Electronic-Library , TQVWX DATA OUT P2.0-P2.7 OR A8-A15 FROM DPH X-V TWHLH — TWHQX Q(A0-A7 FROM PCL)——(iNSTR. IN* X A8-A15 FROM PCH 270188-8 EXTERNAL CLOCK DRIVE Symbol Parameter Min Max Units 1 /TCLCL Oscillator


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PDF T-52-33-05 83C152A 80C152A 80C51BH 3-P42 3P23 P30C P32E 83C152 3p04 3p46 P34E ECL 10102
80C152

Abstract: 80C51BH
Text: . —»f«-TPLPH - -TLLIV- TPLIV \ A0-A7 / TPLAZ -TAVIV - TPXIX INSTR IN TPXIZ A0-A7 A8-A15 A8-A15 , TWHLH DATA IN TRHDZ ^ I(AO-A7 FROM PCL) (iNSTR. I P2.0-P2.7 OR A8-A15 FROM DPH X A8-A15 FROM PCH , .0-p2.7 or a8-a15 from dph X-V twhlh — twhqx Q(ao-A7 from pcl)——(instr. in* X a8-a15 from pch


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PDF T-52-33-05 83C152A 80C152A 80C51BH 80C152A 80C152
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