The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
AM5718AABCXQ1 Texas Instruments Sitara Processor: Arm Cortex-A15 & DSP, Multimedia 760-FCBGA -40 to 125
TPS6590379ZWSR Texas Instruments Power Management IC (PMIC) for ARM Cortex A15 Processors 169-NFBGA -40 to 85
AM5726BABCXAR Texas Instruments Sitara Processor: Dual Arm Cortex-A15 & Dual DSP 760-FCBGA -40 to 105
AM5716AABCD Texas Instruments Sitara Processor: Arm Cortex-A15 & DSP 760-FCBGA 0 to 90
XAM5708ACBDJEA Texas Instruments Sitara Processor: ARM Cortex-A15 & DSP, Multimedia 538-FCBGA -40 to 105
O9038A35AIZWSRQ1 Texas Instruments Automotive Power Management IC (PMIC) for ARM Cortex A15 processors 169-NFBGA -40 to 85
SF Impression Pixel

Search Stock (29)

  You can filter table by choosing multiple options from dropdownShowing 26 results of 29
Part Manufacturer Supplier Stock Best Price Price Each Buy Part
8.5000.A15A.0010.0150 Fritz Kuebler Gmbh Allied Electronics & Automation - $484.46 $460.24
CSTLA8M00T55A15A0 Murata Manufacturing Co Ltd ComS.I.T. 41,000 - -
DKA15A-05 Mean Well Sager - $18.08 $16.92
DKA15A-05 Mean Well Master Electronics 31 $18.89 $16.19
DKA15A-05 Mean Well TME Electronic Components 16 $20.46 $16.90
DKA15A-05 Mean Well Jameco Electronics 15 $16.49 $15.49
RS2A15A0KA4 Sanyo-Denki Servo Sager - - -
SKA-15A-05 Mean Well Sager - $16.71 $15.64
SKA15A-033 Mean Well Master Electronics 7 $17.31 $14.84
SKA15A-033 Mean Well TME Electronic Components 4 $16.00 $13.21
SKA15A-05 Mean Well Schukat electronic 66 €12.54 €11.24
SKA15A-05 Mean Well TME Electronic Components 67 $16.00 $13.20
SKA15A-05 Mean Well Jameco Electronics 50 $15.49 $14.49
SKA15A-05 Mean Well Master Electronics 10 $17.31 $14.84
TS02A15A00J0G Amphenol FCi Avnet - - -
TS03A15A00J0G Amphenol FCi Avnet - - -
TS04A15A00J0G Amphenol FCi Avnet - - -
TS05A15A00J0G Amphenol FCi Avnet - - -
TS06A15A00J0G Amphenol FCi Avnet - - -
TS07A15A00J0G Amphenol FCi Avnet - - -
TS08A15A00J0G Amphenol FCi Avnet - - -
TS09A15A00J0G Amphenol FCi Avnet - - -
TS10A15A00J0G Amphenol FCi Avnet - - -
TS12A15A00J0G Amphenol FCi Avnet - - -
TS13A15A00J0G Amphenol FCi Avnet - - -
TS16A15A00J0G Amphenol FCi Avnet - - -

No Results Found

Show More

A15-A0 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
Not Available

Abstract: No abstract text available
Text: 6 Timing Diagrams 6.1. IBM31T1602 in Host DMA Mode, ISA I/O Write Cycle A15-A0 X X , Diagrams 88 6.2. IBM31T1602 in Host DMA Mode, ISA I/O Read Cycle A15-A0 X AEN X , State A15-A0 X AEN -IOWC>r -MW \ / X \ \ / \ / tw tdfW 4 -» th tdfW thA thAEN / \ tsuA M , A15-A0 X AEN .in u u i" >r -M W X \ / \ \ / / \ tsuA -4 / IOCH RDY \ / _ D7-D0 , . IBM31T1602 in Shared Memory Mode, Local Memory Write Cycle A15-A0 X -RAMCE -DAMUUD / X \ / \ tsuA


OCR Scan
PDF IBM31T1602 A15-A0 A15-AÖ
L4C381

Abstract: L4C381GC L4C381GC26 p15c0
Text: 22 FTAB = 1, FTF = 0 A15-A0 , B15-B0 ' — 36 46 37 — 30 40 32 — 22 22 22 Clock 32 , €” 42 42 42 32 34 35 — 22 22 22 FTAB = 1, FTF = 1 A15-A0 , B15-B0 55 36 46 37 40 30 40 , Hold Setup Hold Setup Hold A15-A0 , B15-B0 8 2 35 2 8 2 28 2 8 2 16 2 Co 21 0 21 0 16 0 16 0 8 0 8 0 , 13 15 14 15 14 FTAB = 1, FTF = 0 A15-A0 , B15-B0 Clock Co S2-S0, OSA, OSB — 16 20 17 — — 14 14 — 18 20 18 — 14 15 14 — — 13 13 — 14 15 14 FTAB = 1, FTF = 1 A15-A0 , B15-B0 Clock


OCR Scan
PDF L4C381 16-bit MIL-STD-883, 68-pin L4C381 381-type L4C381GC L4C381GC26 p15c0
1999 - IDT7383

Abstract: L4C383
Text: select codes are shown in Table 1. ALU STATUS A15-A0 B15-B0 16 16 A REGISTER ENA , 0 10 S4-S0 2 21 C0 A15-A0 , B15-B0 2 10 2 10 2 10 2 8 2 , - 34 42 37 - 22 42 55 56 37 55 FTAB = 1, FTF = 1 A15-A0 , B15-B0 Clock C0 S4-S0 N - 32 - - FTAB = 1, FTF = 0 A15-A0 , B15-B0 Clock C0 S4-S0 C16 F15-F0 36 38 , L4C383-20 TRI-STATE ENABLE/DISABLE TIMES Notes 9, 10, 11 (ns) A15-A0 , B15-B0 5 Setup Hold 0


Original
PDF L4C383 16-bit L4C383 32-bit IDT7383
L4C383

Abstract: DIODE S4 DIODE S4 39 DIODE S4 56 DIODE S4 66 IDT7383
Text: . ALU STATUS A15-A0 B15-B0 16 16 A REGISTER ENA ENB B REGISTER FTAB FFFFH , 0 10 S4-S0 2 21 C0 A15-A0 , B15-B0 2 10 2 10 2 10 2 8 2 , - 34 42 37 - 22 42 55 56 37 55 FTAB = 1, FTF = 1 A15-A0 , B15-B0 Clock C0 S4-S0 N - 32 - - FTAB = 1, FTF = 0 A15-A0 , B15-B0 Clock C0 S4-S0 C16 F15-F0 36 38 , L4C383-20 TRI-STATE ENABLE/DISABLE TIMES Notes 9, 10, 11 (ns) A15-A0 , B15-B0 5 Setup Hold 0


Original
PDF L4C383 16-bit L4C383 32-bit DIODE S4 DIODE S4 39 DIODE S4 56 DIODE S4 66 IDT7383
1999 - smd diode f4 4d

Abstract: L4C381 L4C381GC26
Text: operations. See "Cascading the L4C381" toward L4C381 BLOCK DIAGRAM A15-A0 B15-B0 16 16 B , 44 0 32 0 32 0 18 0 18 0 10 S2-S0, OSA, OSB 2 21 C0 A15-A0 , 22 22 - 18 22 22 - 18 22 55 56 37 55 FTAB = 1, FTF = 1 A15-A0 , B15-B0 Clock (OSA, OSB = 0) C0 S2-S0, OSA, OSB 53 34 42 - 32 - - FTAB = 1, FTF = 0 A15-A0 , 14 FTAB = 1, FTF = 0 A15-A0 , B15-B0 Clock C0 S2-S0, OSA, OSB - 11 - - 16 - -


Original
PDF L4C381 16-bit L4C381 381-type 68-pin smd diode f4 4d L4C381GC26
L4C381

Abstract: P15C
Text: L4C381 BLOCK DIAGRAM A15-A0 B15-B0 16 16 B REGISTER A REGISTER ENA the end of this , , OSB 2 21 C0 A15-A0 , B15-B0 2 10 2 10 2 10 2 8 2 8 2 FTAB , 55 FTAB = 1, FTF = 1 A15-A0 , B15-B0 Clock (OSA, OSB = 0) C0 S2-S0, OSA, OSB 53 34 42 - 32 - - FTAB = 1, FTF = 0 A15-A0 , B15-B0 Clock C0 S2-S0, OSA, OSB 38 - 42 56 , 15 15 13 14 FTAB = 1, FTF = 0 A15-A0 , B15-B0 Clock C0 S2-S0, OSA, OSB - 11 - -


Original
PDF L4C381 16-bit 68-pin L4C381 381-type P15C
16F15

Abstract: L4C381-15
Text: Flexibility u 68-pin PLCC, J-Lead L4C381 BLOCK DIAGRAM A15-A0 16 B15-B0 16 ENA A REGISTER B , A15-A0 , B15-B0 - 36 46 37 - 30 40 32 - 22 22 22 , A15-A0 , B15-B0 55 36 46 37 40 30 40 32 26 22 22 22 , ) Input A15-A0 , B15-B0 C0 S2-S0, OSA, OSB ENA, ENB, ENF , , FTF = 0 A15-A0 , B15-B0 Clock C0 S2-S0, OSA, OSB FTAB = 1, FTF = 1 A15-A0 , B15-B0 Clock (OSA, OSB = 0


Original
PDF L4C381 16-bit L4C381 381-type 68-pin 16F15 L4C381-15
1996 - Z86193

Abstract: Z86295 Z86C95 Z86C9500ZUSP064 Z86C9501ZUSP064 MICROCONTROLLER 16 bit cmos 16 bit counter
Text: Mass Storage Mass Storage MULTI Block Diagram Zilog SuperintegrationTM Pr oducts Guide SERVO MAILBOX UART DIV MULTI UART DIV CPU DSP DAC PWM DAC PWM 48 RAM CLOCK ADC SPI ADC SPI SEARCH MERGE A15-A0 P2 P2 P3 MULTI A15-0 P2 Z86C95 Device UART DIV P3 CPU Z86295 P3 OSC A15-A0 Z86193 88-BIT R-S ECC SRAM/ DRAM CTRL AT/DE DISK MCU HOST INTER- INTERINTERFACE FACE FACE Z86018


Original
PDF A15-A0 A15-0 Z86C95 Z86295 Z86193 88-BIT Z86018 10-Bit Z86193 Z86295 Z86C95 Z86C9500ZUSP064 Z86C9501ZUSP064 MICROCONTROLLER 16 bit cmos 16 bit counter
1996 - PB10

Abstract: PB12 PC10 A15A0
Text: Control General Purpose I/O Default Function A15-A0 D15-D0 RD WR PS DS PB0 PB1 PB2 , T3 T0 CLKO A15-A0 PS, DS WR RD D15-D0 Data In Data Out AA0130 Figure , T0 T1 CLKO A15-A0 PS, DS WR RD Data In D15-D0 Data Out AA0133 Figure 4-4


Original
PDF DSP56L811 A0-A15 D0-D15 PB10 PB12 PC10 A15A0
1988 - AEN 6

Abstract: D3159 SN74BCT2420 SN74ACT2440
Text: No file text available


Original
PDF SN74BCT2420 SDIS007A D3159, SN74ACT2440 AEN 6 D3159 SN74BCT2420 SN74ACT2440
2001 - Not Available

Abstract: No abstract text available
Text: ADSC ADSP A15-A0 Q1 CE A1' A1 64K x 32 MEMORY ARRAY CLR 16 D Q 14 , tAVH tAVS Suspend Burst ADV tAS A15-A0 tAH RD1 RD2 tWS tWH tWS RD3 , ADSC initiate Write ADSC tAVH ADV must be inactive for ADSP Write tAVS ADV tAS A15-A0 tAH , inactive ADSP tSS tSH ADSC ADV tAS A15-A0 tAH RD1 WR1 tWS RD3 tWH tWS , ADSP ADSC ADV A15-A0 RD2 RD1 GW BWE BW4-BW1 tCES tCEH tCES tCEH


Original
PDF IS61S6432N
1997 - SR012

Abstract: IS61SF6432
Text: BINARY COUNTER ADV CE ADSC ADSP A1' CLR A15-A0 16 D Q1 Q A1 64K x , ADSC initiate read tSH ADSC tAVH tAVS Suspend Burst ADV tAS tAH A15-A0 RD1 , inactive for ADSP Write tAVS ADV tAS A15-A0 tAH WR1 WR2 tWS tWH tWS tWH tWS , tAS A15-A0 tAH RD1 WR1 tWS RD3 tWH tWS RD2 tWH GW BWE tWS tWH , ADSP ADSC ADV A15-A0 RD1 RD2 GW BWE BW4-BW1 tCES tCEH tCES tCEH


Original
PDF IS61SF6432 100-Pin SR0012-0A SR012 IS61SF6432
2013 - Not Available

Abstract: No abstract text available
Text: from Array A15-A0 - D7-D0, . WRITE 0000 X010 Write Data to Array A15-A0 D7-D0, . - Read the page dedicated to A15-A0 D7-D0, . - A15-A0 D7-D0, . - A15-A0 D7-D0, . - A15-A0 D7-D0, . - [4] Read Identification Page 1000 X011


Original
PDF GT25C256
1998 - IS61SF6436

Abstract: No abstract text available
Text: COUNTER ADV CE ADSC ADSP A1' CLR A15-A0 16 D Q1 Q A1 64K x 36 MEMORY , ADV tAS tAH A15-A0 RD1 RD2 tWS tWH tWS RD3 tWH GW BWE BW4-BW1 tCES , ADSP Write tAVS ADV tAS A15-A0 tAH WR1 WR2 tWS tWH tWS tWH tWS tWH WR3 , ADSP is blocked by CE inactive ADSP tSS tSH ADSC ADV tAS A15-A0 tAH RD1 WR1 , ADSP ADSC ADV A15-A0 RD1 RD2 GW BWE BW4-BW1 tCES tCEH tCES tCEH


Original
PDF IS61SF6436 100-Pin IS61SF6436-8 IS61SF6436-9TQ IS61SF6436-9PQ IS61SF6436-10TQ IS61SF6436-10PQ IS61SF6436
2001 - IS61SF6432

Abstract: No abstract text available
Text: BINARY COUNTER ADV ADSC ADSP A15-A0 Q1 CE A1' A1 64K x 32 MEMORY ARRAY CLR 16 , tAVH tAVS Suspend Burst ADV tAS tAH A15-A0 RD1 RD2 tWS tWH tWS RD3 , tAS A15-A0 tAH WR1 WR2 tWS tWH tWS tWH tWS tWH WR3 GW BWE , ADSC ADV tAS A15-A0 tAH RD1 WR1 tWS RD3 tWH tWS RD2 tWH GW BWE , TIMING tKC CLK tSS tSH tAS tKH tKL tAH ADSP ADSC ADV A15-A0 RD2 RD1


Original
PDF IS61SF6432 100-Pin IS61SF6432
2001 - Not Available

Abstract: No abstract text available
Text: 14 16 A15-A0 16 D Q ADDRESS REGISTER CE CLK 32 32 GW BWE BW4 D Q , ADV tAS tAH A15-A0 RD1 tWS tWH RD2 RD3 GW tWS tWH BWE BW4-BW1 tCES tCEH CE , ADSP ADSC initiate Write ADSC ADV must be inactive for ADSP Write tAVS ADV tAS tAH tAVH A15-A0 , ® CLK tSS ADSP is blocked by CE inactive ADSP tSS tSH ADSC ADV tAS tAH A15-A0 RD1 , ISSI tSS tSH tKH tKL ® CLK ADSP ADSC ADV tAS tAH A15-A0 RD1 RD2 GW BWE


Original
PDF IS61SF6432 100-Pin
TC55328

Abstract: MCL T4-1 tc5588 TMS320C16 cy7c291 D1115
Text: ‹ ÏÔWË MEN BIO MC/MP INT RS A15-A0 / PA2-PA0 " —«- — » — o - »- c o o Program Bus 16 à , timing CLKOUT MEN A15-A0 ÏOEN D15-D0 Legend: 1. IN instruction prefetch 2. Next instruction , PROCESSOR JANUARY 1987 — REVISED JULY 1991 OUT Instruction timing clkout MEN A15-A0 ÏÔWE D15-D0 , address valid TBLR instruction timing clkout men A15-A0 □15-DO TBLW instruction timing clkout , summarize these timings at 35 MHz CLKIN. CLKOUT men A15-A0 D15-D0 where: Figure 11. : (access time


OCR Scan
PDF TMS320C16 114-ns 32-Bit 16-Bit 64-Pin 256-Word 32-Blt TC55328 MCL T4-1 tc5588 TMS320C16 cy7c291 D1115
2001 - IS61SF6436

Abstract: No abstract text available
Text: BINARY COUNTER ADV ADSC ADSP A15-A0 Q1 CE A1' A1 64K x 36 MEMORY ARRAY CLR 16 , Suspend Burst ADV tAS tAH A15-A0 RD1 RD2 tWS tWH tWS RD3 tWH GW BWE , for ADSP Write tAVS ADV tAS A15-A0 tAH WR1 WR2 tWS tWH tWS tWH tWS tWH , blocked by CE inactive ADSP tSS tSH ADSC ADV tAS A15-A0 tAH RD1 RD2 WR1 tWS , A15-A0 RD2 RD1 GW BWE BW4-BW1 tCES tCEH tCES tCEH tCES tCEH CE CE2


Original
PDF IS61SF6436 100-Pin The/01 IS61SF6436-8 IS61SF6436-9TQ IS61SF6436-9PQ IS61SF6436-10TQ IS61SF6436-10PQ IS61SF6436
2000 - IC61SF6432

Abstract: No abstract text available
Text: CLK CLK A0' A0 BINARY COUNTER ADSC ADSP A15-A0 Q1 CE ADV A1' A1 , Burst ADV tAS tAH A15-A0 RD1 RD2 tWS tWH tWS RD3 tWH GW BWE , ADSP Write tAVS tAVH ADV tAS A15-A0 tAH WR1 WR2 tWS tWH tWS tWH tWS , tKH tKL ADSP is blocked by CE inactive ADSP tSS tSH ADSC ADV tAS A15-A0 tAH , tKC CLK tSS tSH tAS tKH tKL tAH ADSP ADSC ADV A15-A0 RD1 RD2


Original
PDF IC61SF6432 SSR017-0A IC61SF6432-9TQ IC61SF6432-9PQ IC61SF6432-10TQ IC61SF6432-10PQ IC61SF6432-10TQI IC61SF6432-10PQI IC61SF6432
1997 - IS61SF6436

Abstract: No abstract text available
Text: COUNTER ADV CE ADSC ADSP A1' CLR A15-A0 16 D Q1 Q A1 64K x 36 MEMORY , initiate read tSH ADSC tAVH tAVS Suspend Burst ADV tAS tAH A15-A0 RD1 RD2 tWS , initiate Write ADSC tAVH ADV must be inactive for ADSP Write tAVS ADV tAS A15-A0 tAH WR1 , tKH tKL ADSP is blocked by CE inactive ADSP tSS tSH ADSC ADV tAS A15-A0 tAH , TIMING tKC CLK tSS tSH tAS tKH tKL tAH ADSP ADSC ADV A15-A0 RD1 RD2


Original
PDF IS61SF6436 100-Pin IS61SF6436-8 IS61SF6436-9TQ IS61SF6436-9PQ IS61SF6436-10TQ IS61SF6436-10PQ IS61SF6436
1998 - Not Available

Abstract: No abstract text available
Text: x 32 MEMORY ARRAY 14 16 A15-A0 16 D Q ADDRESS REGISTER CE CLK 32 32 GW BWE , ADV tAS tAH A15-A0 RD1 tWS tWH RD2 RD3 GW tWS tWH BWE BW4-BW1 tCES tCEH CE , A15-A0 WR1 tWS tWH WR2 WR3 GW tWS tWH BWE tWS tWH tWS tWH BW4-BW1 tCES tCEH WR1 , ADSC ADV tAS tAH A15-A0 RD1 tWS tWH WR1 RD2 RD3 GW tWS tWH BWE tWS tWH , ADSP ADSC ADV tAS tAH A15-A0 RD1 RD2 GW BWE BW4-BW1 tCES tCEH CE1 tCES


Original
PDF IS61SF6432 100-Pin SR0012-0C
1987 - Not Available

Abstract: No abstract text available
Text: CLKOUT2 D15-D0 A15-A0 PS, DS, IS R/W STRB RS INT2-INT0 MP/MC MSC IACK READY BR XF HOLD HOLDA SYNC BIO DR , ) MUX 16 A15-A0 3 16 Program Bus 16 PFC(16) 16 MUX 16 16 16 QIR(16) IR(16) STO(16) ST1(16) RPTC


Original
PDF TMS320 SPRS010B 80-ns TMS320E25) TMS320C25) 32-Bit 16-Bit 68-Pin
1987 - TMS320

Abstract: TMS32020 TMS320C25 TMS320C25-50 TMS320E25 1125Q
Text: CLKOUT2 D15-D0 A15-A0 PS, DS, IS R/W STRB RS INT2-INT0 MP/MC MSC IACK READY BR XF HOLD , ) IR(16) 16 STO(16) Controller MUX ST1(16) 16 16 3 A15-A0 16 16 16


Original
PDF TMS320 SPRS010B TMS320C25) 32-Bit 16-Bit 68-Pin TMS32020 TMS320C25 TMS320C25-50 TMS320E25 1125Q
1987 - Not Available

Abstract: No abstract text available
Text: CLKOUT2 D15-D0 A15-A0 PS, DS, IS R/W STRB RS INT2-INT0 MP/MC MSC IACK READY BR XF HOLD HOLDA SYNC BIO DR , ) MUX 16 A15-A0 3 16 Program Bus 16 PFC(16) 16 MUX 16 16 16 QIR(16) IR(16) STO(16) ST1(16) RPTC


Original
PDF TMS320 SPRS010B 80-ns TMS320E25) TMS320C25) 32-Bit 16-Bit 68-Pin
1987 - Not Available

Abstract: No abstract text available
Text: X2/CLKIN CLKOUT1 CLKOUT2 D15-D0 A15-A0 PS, DS, IS R/W STRB RS INT2-INT0 MP/MC MSC IACK READY BR XF , HOLDA MSC BIO RS IACK MP/MC INT(2-0) A15-A0 MUX 16 Program Bus 16 PFC(16) 16 16 16 16 QIR(16


Original
PDF TMS320 SPRS010B 80-ns TMS320E25) TMS320C25) 32-Bit 16-Bit 68-Pin 68-ti
Supplyframe Tracking Pixel