ZARLINK ASIC Search Results

ZARLINK ASIC Result Highlights (5)

Part	Manufacturer	Description
SM28VLT32SKGD1	Texas Instruments	32-Mbit High-Temp Flash ASIC With Serial Peripheral Interface (SPI) Bus 0-XCEPT
SM28VLT32KGDS1	Texas Instruments	32-Mbit High-Temp Flash ASIC With Serial Peripheral Interface (SPI) Bus 0-XCEPT
TPS53667RTAR	Texas Instruments	6-Phase, D-CAP+ step-down driverless buck controller with NVM and PMBus interface for ASIC 40-WQFN -40 to 125
TPS53667RTAT	Texas Instruments	6-Phase, D-CAP+ step-down driverless buck controller with NVM and PMBus interface for ASIC 40-WQFN -40 to 125
TPS53647RTAT	Texas Instruments	4-Phase, D-CAP+TM Step-Down Buck Controller with NVM and PMBus Interface for ASIC 40-WQFN -40 to 125

ZARLINK ASIC Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
rtss 159 Abstract: 3022h 6042H 3002H 3032h ZARLINK FPGA MT90500 MT90500AL MVIP-90 Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ MT90500	Original	MT90500 64kbps rtss 159 3022h 6042H 3002H 3032h ZARLINK FPGA MT90500 MT90500AL MVIP-90	PDF
low power and area efficient carry select adder v Abstract: IMPLEMENTATION of 4-BIT LEFT SHIFT BARREL SHIFTER 16 bit carry select adder 32 bit carry select adder 8 bit carry select adder full subtractor implementation using NOR gate 32 bit ripple carry adder carry select adder full subtractor circuit using nor gates BCD adder use rom Contextual Info: MVA60000 MVA60000 Series 1.4 Micron CMOS MEGACELL ASICs DS5499 ISSUE 3.1 March 1991 GENERAL DESCRIPTION Very large scale integrated circuits, requiring large RAM and ROM blocks, often do not suit even high complexity gate arrays, such as Zarlink Semiconductors' CLA60000 series.	Original	MVA60000 MVA60000 DS5499 CLA60000 low power and area efficient carry select adder v IMPLEMENTATION of 4-BIT LEFT SHIFT BARREL SHIFTER 16 bit carry select adder 32 bit carry select adder 8 bit carry select adder full subtractor implementation using NOR gate 32 bit ripple carry adder carry select adder full subtractor circuit using nor gates BCD adder use rom	PDF
VP2611 Abstract: VP2612 VP2614 VP2615 VP510 VP520S H261 Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ VP2614 VP2614	Original	VP2614 HB3923-2 DS3735 VP2615 VP2611 VP2612 VP2614 VP510 VP520S H261	PDF
RJ11 4/4 connector Abstract: OCT8304 IBM POS schematics 176-PQFP 14DIP300 tdm telephone design RJ11 8DIP300 MT92210 PLCC20 54TSOP Contextual Info: MT92210 Evaluation Board User Guide Part Number: MT92210 Revision Number: 1.3 Issue Date: December 2003 MT92210 2 Zarlink Semiconductor Inc. Evaluation Board User Guide MT92210 Evaluation Board User Guide Table of Contents 1.0 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4	Original	MT92210 RJ11 4/4 connector OCT8304 IBM POS schematics 176-PQFP 14DIP300 tdm telephone design RJ11 8DIP300 MT92210 PLCC20 54TSOP	PDF
scr tic 106 Abstract: TIC 122 Transistor tic 122 TIC 136 Transistor tic 120 tic 154 tic 225 datasheet scr tic 106 ac TIC 107 TCXO 10MHz Contextual Info: GP4020 GPS Baseband Processor Design Manual Publication Number: DM5280 Issue: 3 Revision: 002 Issued: January 2002 Zarlink Semiconductor, Cheney Manor Swindon, Wiltshire, United Kingdom, SN2 2QW Manual Revision History Version Revision Date Update Summary	Original	GP4020 DM5280 scr tic 106 TIC 122 Transistor tic 122 TIC 136 Transistor tic 120 tic 154 tic 225 datasheet scr tic 106 ac TIC 107 TCXO 10MHz	PDF
GR-1244 Abstract: ZL30407 CTS 03-42126 Contextual Info: Model 03-42126 Dual-In-Line 20.0 MHz Stratum 3 OCXO ♦Low Cost ASIC Based Design ♦Frequency Stability to Stratum 3 of GR-1244 ♦Use with Zarlink SONET/SDH Synchronizer ZL30407 ♦+3.3Vdc or +5.0Vdc Operation ♦Precision Low Aging “AT” Cut Crystal	Original	GR-1244 ZL30407 GR-1244 ZL30407 CTS 03-42126	PDF
SMD MARKING CODE 813 Contextual Info: E2801 SMD TCXO GR-253 Core SONET minimum clock Outline mm Description ▪▪ Zarlink approved TCXO for GR-253 Core SONET minimum 0.6 clock ITU G.813 Option 2 applications, manufactured for us by Rakon utilising their Pluto ASIC technology 7.0±0.15	Original	E2801 GR-253 2002/95/EC 100Hz 110dBc/Hz 125dBc/Hz 10kHz 135dBc/Hz SMD MARKING CODE 813	PDF
TCXO rakon E3179 Abstract: E3179 RAKON E3179 Contextual Info: E3179 SMD TCXO GR-1244 & GR253 STRATUM 3 ISSUE 4; 1 NOVEMBER 2008 - RoHS 2002/95/EC Outline mm 3 applications, manufactured for us by Rakon utilising their Pluto ASIC technology 7.0±0.15 0.6 ▪▪ Zarlink approved TCXO for GR-1244 & GR-253 Stratum	Original	E3179 GR-1244 GR253 2002/95/EC GR-253 10-60Hz TCXO rakon E3179 RAKON E3179	PDF
E2889 Abstract: TCXO rakon E2889 Contextual Info: E2889 SMD TCXO GR-1244 & GR253 STRATUM 3 ISSUE 5; 1 NOVEMBER 2008 - RoHS 2002/95/EC Outline mm ▪▪ Zarlink approved TCXO for GR-1244 & GR-253 Stratum 3 applications, manufactured for us by Rakon utilising their Pluto ASIC technology 6.2 max Description	Original	E2889 GR-1244 GR253 2002/95/EC GR-253 980m/s 10-60Hz 60-500Hz TCXO rakon E2889	PDF
hp 4552 Abstract: O2-A2 CQFP100 PSOP24-MP0816 CLT84 gh 312 clt82xxx CQFP44 diode gp 421 PS-3306 Series Contextual Info: CLA80000 Series High Density CMOS Gate Arrays DS3820 ISSUE 2.1 July 1997 INTRODUCTION ARRAY SIZES The CLA80k gate array series from Zarlink Semiconductor offers advantages in speed and density over previous array series. Improvements in design combined with advances in	Original	CLA80000 DS3820 CLA80k 210ps hp 4552 O2-A2 CQFP100 PSOP24-MP0816 CLT84 gh 312 clt82xxx CQFP44 diode gp 421 PS-3306 Series	PDF
CQFP44 Abstract: hp 4552 CLA80000 Series MQFP52 clt82xxx O2-A2 CQFP100 gh 312 PS-3306 Series cqfp120 Contextual Info: CLA80000 Series High Density CMOS Gate Arrays DS3820 ISSUE 2.1 July 1997 INTRODUCTION ARRAY SIZES The CLA80k gate array series from Zarlink Semiconductor offers advantages in speed and density over previous array series. Improvements in design combined with advances in	Original	CLA80000 DS3820 CLA80k 210ps CQFP44 hp 4552 CLA80000 Series MQFP52 clt82xxx O2-A2 CQFP100 gh 312 PS-3306 Series cqfp120	PDF
MT90500 Abstract: MT90500AL MVIP-90 zarlink asic Contextual Info: Zarlink Semiconductor, formerly Mitel Semiconductor, announced its new trade identity on May 29, 2001. To reflect that new identity, rebranding of all product documentation will be completed by August 31, 2001. MT90500 Multi-Channel ATM AAL1 SAR Features •	Original	MT90500 DS5171 64kbps MT90500 MT90500AL MVIP-90 zarlink asic	PDF
USART 8251 interfacing with 8051 microcontroller Abstract: full 1816 barrel shifter design 1816 barrel shifter design USART 8251 USART 8251 expanded block diagram 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER P4QFP100-GH-1420 interfacing 8051 with ppi USART 8251 interfacing M8490 scsi Contextual Info: CLA90000 Series High Density CMOS Gate Arrays DS5500 ISSUE 2.0 INTRODUCTZarlinkION BENEFITS The CLA90000 family of gate arrays from Zarlink Semiconductor consists of 14 fixed-size arrays with the option of building optimized arrays with up to 1.1 million gates. This	Original	CLA90000 DS5500 USART 8251 interfacing with 8051 microcontroller full 1816 barrel shifter design 1816 barrel shifter design USART 8251 USART 8251 expanded block diagram 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER P4QFP100-GH-1420 interfacing 8051 with ppi USART 8251 interfacing M8490 scsi	PDF
disposable camera Abstract: Wireless Camera transmitter wireless camera circuit of wireless camera glucometer of glucometer Contextual Info: mpt_2 26/10/04 5:38 PM Page 32 INNER SPACE Medical technology goes sci-fi with the introduction of new ultra low-power wireless medical devices, writes Francois Pelletier of Zarlink Semiconductor. Swallowable camera capsules, communicating medical implants, gizmos	Original		PDF

E2791 Contextual Info: IQD Frequency Products Oscillator Specification Incorporating IQD FOQ GmbH Model: E2791 ISSUE 7; July 2012 - RoHS 2011/65/EU Outline mm Description Zarlink approved TCXO for GR-1244 & GR-253 Stratum 3 applications, manufactured for us by Rakon utilising their Pluto(TM)	Original	2011/65/EU E2791 GR-1244 GR-253 00MHz 28ppm EIA-481-D 32ppm E2791	PDF
8251 uart vhdl Abstract: microprocessors interface 8086 to 8251 microprocessors architecture of 8251 DS4812 8048 8251 8086 microprocessor kit manual Contextual Info: CLA200 Series CMOS Gate Arrays Advance Information DS4812 ISSUE 1.3 July 1997 INTRODUCTION The CLA200 Series Arrays from Zarlink Semiconductor offer designers the capability to integrate designs of more than 2 million gates. There are 14 fixed arrays optimised for low to	Original	CLA200 DS4812 8251 uart vhdl microprocessors interface 8086 to 8251 microprocessors architecture of 8251 DS4812 8048 8251 8086 microprocessor kit manual	PDF
E3199LF Contextual Info: IQD Frequency Products TCXO Specification Incorporating IQD FOQ GmbH Model: E3199LF ISSUE 5; January 2013 - RoHS 2011/65/EU Outline mm Description Zarlink approved TCXO for GR-1244 & GR-253 Stratum 3 applications, manufactured for us by Rakon utilising their Pluto (TM)	Original	2011/65/EU E3199LF GR-1244 GR-253 00MHz 28ppm EIA-481-D E3199LF	PDF
digital access cross connect switch Contextual Info: MT90820 Large Digital Switch Features & Benefits Guide Revision 1.0 MT90820 Large Digital Switch Features & Benefits Guide Summary Zarlink’s Large Digital Switch • • • • • MT90820 is non-blocking switch operating at 2.048, 4.096 and 8.192 Mb/s data rates with a	Original	MT90820 digital access cross connect switch	PDF
CLA60000 Abstract: zarlink cla5000 CLA5000 16-LINE TO 4-LINE PRIORITY ENCODERS 4 bit binary multiplier CLA5000 Series Zarlink gate array RAD32D MVA50 Contextual Info: CLA60000 Series Channel less CMOS Gate Arrays This new family of gate arrays uses many innovative techniques to achieve 110K gates per chip with system clock speeds of up to 70MHz. The combination of high speed, high gate complexity and low power operation places Zarlink Semiconductor	Original	CLA60000 70MHz. zarlink cla5000 CLA5000 16-LINE TO 4-LINE PRIORITY ENCODERS 4 bit binary multiplier CLA5000 Series Zarlink gate array RAD32D MVA50	PDF
O2-A2 Abstract: CLA60000 16-LINE TO 4-LINE PRIORITY ENCODERS DRF4T101 4 bit binary multiplier Gray to BCD converter CLA5000 J K flip-flop CLA64 design octal counter using j-k flipflop Contextual Info: CLA60000 Series Channel less CMOS Gate Arrays This new family of gate arrays uses many innovative techniques to achieve 110K gates per chip with system clock speeds of up to 70MHz. The combination of high speed, high gate complexity and low power operation places Zarlink Semiconductor	Original	CLA60000 70MHz. O2-A2 16-LINE TO 4-LINE PRIORITY ENCODERS DRF4T101 4 bit binary multiplier Gray to BCD converter CLA5000 J K flip-flop CLA64 design octal counter using j-k flipflop	PDF
full adder circuit using nor gates Abstract: full subtractor circuit using nand gate full subtractor circuit using nor gates full subtractor circuit using decoder 8 bit carry select adder verilog codes half adder 74 full subtractor circuit nand gates 8 bit subtractor 3 bit carry select adder verilog codes full subtractor circuit using nand gates Contextual Info: CLA70000 Series High Density CMOS Gate Arrays DS2462 Recent advances in CMOS processing technology and improvements in design architecture have led to the development of a new generation of array-based ASIC products with vastly improved gate integration densities. This	Original	CLA70000 DS2462 full adder circuit using nor gates full subtractor circuit using nand gate full subtractor circuit using nor gates full subtractor circuit using decoder 8 bit carry select adder verilog codes half adder 74 full subtractor circuit nand gates 8 bit subtractor 3 bit carry select adder verilog codes full subtractor circuit using nand gates	PDF
full subtractor circuit using decoder Abstract: full subtractor circuit using nor gates tdb 158 dp VHDL program 4-bit adder 8 bit carry select adder verilog codes full subtractor circuit using nand gate full adder circuit using nor gates full subtractor circuit using nand gates full subtractor circuit nand gates 0-99 counter by using 4 dual jk flip flop Contextual Info: CLA70000 Series High Density CMOS Gate Arrays DS2462 Recent advances in CMOS processing technology and improvements in design architecture have led to the development of a new generation of array-based ASIC products with vastly improved gate integration densities. This	Original	CLA70000 DS2462 full subtractor circuit using decoder full subtractor circuit using nor gates tdb 158 dp VHDL program 4-bit adder 8 bit carry select adder verilog codes full subtractor circuit using nand gate full adder circuit using nor gates full subtractor circuit using nand gates full subtractor circuit nand gates 0-99 counter by using 4 dual jk flip flop	PDF
2-bit half adder Abstract: microprocessors architecture of 8251 USART 8251 interfacing with 8051 microcontroller microprocessors interface 8086 to 8251 8255 interfacing with 8086 USART 6402 USART 8251 interfacing "2-bit half adder" 8086 interfacing with 8254 peripheral philips 8251 microprocessor microcontroller Contextual Info: GSC200 Series 0.35µ CMOS Standard Cell ASICs Advance Information DS4830 ISSUE 3.1 November 1998 INTRODUCTION The GSC200 standard cell ASIC family from Mitel Semiconductor is a standard cell product combining low power, mixed voltage capability with a very high density	Original	GSC200 DS4830 2-bit half adder microprocessors architecture of 8251 USART 8251 interfacing with 8051 microcontroller microprocessors interface 8086 to 8251 8255 interfacing with 8086 USART 6402 USART 8251 interfacing "2-bit half adder" 8086 interfacing with 8254 peripheral philips 8251 microprocessor microcontroller	PDF
2-bit half adder Abstract: 6402 uart microprocessors interface 8086 to 8251 microprocessors architecture of 8251 USART 8251 interfacing with 8051 microcontroller vhdl source code for 8086 microprocessor 8253 usart programming DAC 8048 8255 interfacing with 8086 82530 Contextual Info: GSC200 Series 0.35µ CMOS Standard Cell ASICs Advance Information DS4830 ISSUE 3.1 November 1998 INTRODUCTION The GSC200 standard cell ASIC family from Mitel Semiconductor is a standard cell product combining low power, mixed voltage capability with a very high density	Original	GSC200 DS4830 2-bit half adder 6402 uart microprocessors interface 8086 to 8251 microprocessors architecture of 8251 USART 8251 interfacing with 8051 microcontroller vhdl source code for 8086 microprocessor 8253 usart programming DAC 8048 8255 interfacing with 8086 82530	PDF

ZARLINK ASIC Search Results

ZARLINK ASIC Result Highlights (5)

ZARLINK ASIC Datasheets Context Search

rtss 159

low power and area efficient carry select adder v

VP2611

RJ11 4/4 connector

scr tic 106

GR-1244

SMD MARKING CODE 813

TCXO rakon E3179

E2889

hp 4552

CQFP44

MT90500

USART 8251 interfacing with 8051 microcontroller

disposable camera

E2791

8251 uart vhdl

E3199LF

digital access cross connect switch

CLA60000

O2-A2

full adder circuit using nor gates

full subtractor circuit using decoder

2-bit half adder

2-bit half adder