Y 4M Search Results

Xilinx XC2S150E

Abstract: AMD flash xilinx so20 XC17S
Contextual Info: XC18V512 512Kb Y Y Y 3.3V Y Y XC18V01 1Mb Y Y Y 3.3V Y Y XC18V02 2Mb Y Y 3.3V Y Y XC18V04 4Mb Y Y 3.3V Y Y Y Y Y Y Y Y Y 3.3V Y Y XC17V04 4Mb Y Y Y 3.3V Y Y 3.3V I/O Voltage 2.5V VQ44 Y PC20 Y Y 3.3V Y SO20 Y 3.3V Y Y VO8 Y 16Mb PD8 8Mb XC17V16 FPGA XC17V08

XC2S100E

Contextual Info: XC18V512 512Kb Y Y Y 3.3V Y Y XC18V01 1Mb Y Y Y 3.3V Y Y XC18V02 2Mb Y Y 3.3V Y Y XC18V04 4Mb Y Y 3.3V Y Y Y Y Y Y Y Y Y 3.3V Y Y XC17V04 4Mb Y Y Y 3.3V Y Y 3.3V I/O Voltage 2.5V VQ44 Y PC20 Y Y 3.3V Y SO20 Y 3.3V Y Y VO8 Y 16Mb PD8 8Mb XC17V16 FPGA XC17V08

RA10X

Contextual Info: ESMT M52D2561616A 2F (Preliminary) Mobile SDRAM 4M x 16 Bit x 4 Banks Mobile Synchronous DRAM ORDERING INFORMATION FEATURES y y y y y y y y y y 1.8V power supply LVCMOS compatible with multiplexed address Four banks operation MRS cycle with address key programs

M12L2561616A-5TG2S

Contextual Info: ESMT M12L2561616A 2S SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 )

M12L2561616A-5TG2A

Abstract: M12L2561616A-7TG2A M12L2561616A-6TG2A
Contextual Info: ESMT M12L2561616A 2A SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 )

M12L2561616A-7TIG2K

Abstract: M12L25616 M12L2561616A-6TIG2K
Contextual Info: ESMT M12L2561616A 2K Operation Temperature Condition -40°C~85°C SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation

Contextual Info: ESMT M12L2561616A 4M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES ORDERING INFORMATION y y y y y y y y y JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3

M12L2561616A-5T

Contextual Info: ESMT M12L2561616A 2S Automotive Grade SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y y GENERAL DESCRIPTION The M12L2561616A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 16 bits. Synchronous design allows precise

M12L25616

Abstract: M12L2561616A-7TG M12L2561616A M12L2561616A-6BG M12L2561616A-6TG
Contextual Info: ESMT M12L2561616A 4M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3

SDRAM

Abstract: M12L2561616A-5T 54-lead M12L2561616A
Contextual Info: ESMT M12L2561616A 2A Automotive Grade SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y GENERAL DESCRIPTION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs

M12L2561616A6TG

Contextual Info: ESMT M12L2561616A 4M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply-+ LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3

M12L2561616A-7TG

Abstract: M12L2561616A M12L2561616A-6TG M12L2561616A-6BG
Contextual Info: ESMT M12L2561616A SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3

MAKING A10 BGA

Abstract: M12L2561616A M12L2561616A-6TG M12L2561616A-7TG M12L2561616A-6BG
Contextual Info: ESMT M12L2561616A 4M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply-+ LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3

M12L2561616A-7TI

Contextual Info: ESMT M12L2561616A Operation Temperature Condition -40~85°C 4M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs

M12L2561616A-6T

Abstract: M12L2561616A-7TI M12L2561616A-7BIG CKE 2009 M12L25616 M12L2561616A-6TIG M12L2561616A-6BI M12L2561616A-7TIG MAKING A10 BGA M12L2561616A
Contextual Info: ESMT M12L2561616A Operation Temperature Condition -40~85°C 4M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs

M11L1

Abstract: M11L1644A M11B1644A
Contextual Info: $% M11B1644A / M11B1644SA M11L1644A / M11L1644SA DRAM 4M x 4 DRAM EDO PAGE MODE ORDERING INFORMATION - PACKAGE FEATURES y y y y y y y y y X4 organization EDO Extended Data-Out access mode Single power supply : 5V ± 10% Vcc for 5V product 3.3V ± 10% Vcc for 3.3V product

Contextual Info: $% M11B1644A / M11B1644SA M11L1644A / M11L1644SA DRAM 4M x 4 DRAM EDO PAGE MODE ORDERING INFORMATION - PACKAGE FEATURES y y y y y y y y y X4 organization EDO Extended Data-Out access mode Single power supply : 5V ± 10% Vcc for 5V product 3.3V ± 10% Vcc for 3.3V product

M15502

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µ PD4442161-Y, 4442181-Y, 4442321-Y, 4442361-Y 4M-BIT CMOS SYNCHRONOUS FAST SRAM FLOW THROUGH OPERATION Description The µPD4442161-Y is a 262,144-word by 16-bit, the µPD4442181-Y is a 262,144-word by 18-bit, the µPD4442321-Y

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µ PD4442162-Y, 4442182-Y, 4442322-Y, 4442362-Y 4M-BIT CMOS SYNCHRONOUS FAST SRAM PIPELINED OPERATION SINGLE CYCLE DESELECT Description The µPD4442162-Y is a 262,144-word by 16-bit, the µPD4442182-Y is a 262,144-word by 18-bit, µPD4442322-Y is

Contextual Info: EliteMT M10B11664A DRAM 64 K x 16 DRAM FAST PAGE MODE FEATURES ORDERING INFORMATION - PACKAGE y y y X16 organization FAST PAGE access mode 2 CAS Byte/Word Read/Write operation y y y y Single 5V ± 10% power supply TTL-compatible inputs and outputs 256-cycle refresh in 4ms

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µ PD4442163-Y, 4442183-Y, 4442323-Y, 4442363-Y 4M-BIT CMOS SYNCHRONOUS FAST SRAM PIPELINED OPERATION DOUBLE CYCLE DESELECT Description The µPD4442163-Y is a 262,144-word by 16-bit, the µPD4442183-Y is a 262,144-word by 18-bit, µPD4442323-Y is

F25L004A

Abstract: 100DG
Contextual Info: ESMT F25L004A 4Mbit 512Kx8 3V Only Serial Flash Memory „ FEATURES y Single supply voltage 2.7~3.6V y Speed - Read max frequency : 33MHz - Fast Read max frequency : 50MHz; 75MHz; 100MHz y y y Auto Address Increment (AAI) WORD Programming - Decrease total chip programming time over

Contextual Info: ESMT F25L004A Operation Temperature condition -40 °C ~85 °C 4Mbit 512Kx8 3V Only Serial Flash Memory „ FEATURES y Single supply voltage 2.7~3.6V y Speed - Read max frequency : 33MHz - Fast Read max frequency : 50MHz; 75MHz; 100MHz y y y Auto Address Increment (AAI) WORD Programming

soic-8 200mil

Abstract: F25L004A
Contextual Info: ESMT Preliminary F25L004A 4Mbit 512Kx8 3V Only Serial Flash Memory „ FEATURES y Single supply voltage 2.7~3.6V y Speed - Read max frequency : 33MHz - Fast Read max frequency : 50MHz; 75MHz; 100MHz y y y Low power consumption - typical active current - 15 A typical standby current