XTAL1 CLOCK AND IOW PULSE SYNCHRONIZATION ISSUE Search Results

XTAL1

Abstract: AN10608 AN10312 XTAL1 clock and IOW pulse synchronization issue
Contextual Info: AN10608 XTAL1 clock and IOW pulse synchronization issue Rev. 01 — 23 April 2007 Application note Document information Info Content Keywords non-B, 16C UART, transmitter error Abstract Non-B 16C UARTs might occasionally send an extra character from the transmit FIFO. This application note discusses the root cause, impact to

ST16C450

Abstract: icl 7017 icl 7017 datasheet ST16C450IP40 ST16C450IQ48 16C450 NS16450 ST16C450CJ44 ST16C450CP40 ST16C450CQ48
Contextual Info: ST16C450 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART September 2003 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34

icl 7017

Abstract: ST16C450CQ48 ST16C450IJ44 ST16C450IP40 ST16C450IQ48 16C450 NS16450 ST16C450 ST16C450CJ44 ST16C450CP40
Contextual Info: ST16C450 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33

ST16C450

Contextual Info: ST16C450 -UART with Higher Operating Speed and Lower Access Time HomeNewsCareers Investor Relations Contact Us PartnerNet Login Search CommunicationsInterfacePower Management ST16C450 Support Info Request How to Order Samples How to Buy Print this page UART with Higher Operating Speed and Lower Access Time

ST16C550

Abstract: Code T6S t15d 16-BYTE 16C550 NS16C550 ST16C450 ST16C550CJ44 ST16C550CP40 ST16C550CQ48
Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s April 2005 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0 14 32

16-BYTE

Abstract: 16C550 NS16C550 ST16C450 ST16C550 ST16C550CJ44 ST16C550CP40 ST16C550CQ48 ST16C550IJ44 ST16C550IP40
Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s April 2005 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0 14 32

ST16C550A

Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s February 2005 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0 14

ST16C550IQ48

Abstract: 16-BYTE 16C550 NS16C550 ST16C450 ST16C550 ST16C550CJ44 ST16C550CP40 ST16C550CQ48 ST16C550IJ44
Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0 14 32 -RXRDY CS1

icl 7017

Abstract: icl 7017 datasheet NS16C550 Code T6S 16-BYTE 16C550 ST16C450 ST16C550 ST16C550CJ44 ST16C550CP40
Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s November 2000 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0 14

t15d

Abstract: ST16C450 16-BYTE 16C550 NS16C550 ST16C550 ST16C550CJ44 ST16C550CP40 ST16C550CQ48 ST16C550IJ44
Contextual Info: ST16C550 UART WITH 16-BYTE FIFO’s September 2003 GENERAL DESCRIPTION D4 D3 D2 D1 D0 N.C. VCC -RI -CD -DSR -CTS 6 5 4 3 2 1 44 43 42 41 40 PLCC Package D5 7 39 RESET D6 8 38 -OP1 D7 9 37 -DTR RCLK 10 36 -RTS RX 11 35 -OP2 N.C. 12 34 N.C. TX 13 33 INT CS0

INS8250

Abstract: NS16450 ST16C2450 ST16C2450CJ44 ST16C2450CP40 ST16C2450CQ48 ST16C2450IJ44 ST16C2450IP40 ST16C2450IQ48 ST16C2550
Contextual Info: ST16C2450 DUAL ASYNCHRONOUS RECEIVER AND TRANSMITTER UART DESCRIPTION The ST16C2450 (2450) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2450 is an improved version of the NS16450 UART with higher operating speed and lower access time. The 2450 provides

ST16C1450

Abstract: ST16C1450CJ28 icl 7017 16C450 73M1550 INS8250 NS16450 ST16C1450CP28 ST16C1451 73M2550
Contextual Info: ST16C1450/51 UNIVERSAL ASYNCHRONOUS RECEIVER/ TRANSMITTER UART DESCRIPTION The ST16C1450, ST16C1451 series (here on denoted as the 145X) is a universal asynchronous receiver and transmitter (UART). The 145X is foot print compatible to the SSI 73M1550 and SSI 73M2550 UART with one byte

ST16C550 ROHS

Contextual Info: ST16C550 -UART With 16-Byte FIFOs HomeNewsCareers Investor Relations Contact Us PartnerNet Login Search CommunicationsInterfacePower Management ST16C550 Support Info Request How to Order Samples How to Buy Print this page UART With 16-Byte FIFOs Specifications

16C450CQ

Contextual Info: ST16C450 J2 T E X A R HIGH SPEED SINGLE UART Printed May 23,1997 GENERAL DESCRIPTION 44 Pin PLCC Package The ST16C450 is a universal asynchronous receiver and transmitter. A programmable baud rate generator is provided to select transmit and receive clock rates

crystal 7.3728MHz

Abstract: datasheet of 16450 UART MCR 65-6 SB16C554 ANSI Y14.5 ior scr sim 300 modem datasheet uart 16c550 16C450 16C550
Contextual Info: IN16C554PL/IN16C554TQ QUAD-UART ASYNCHRONOUS COMMUNICATIONS ELEMENT NOVEMBER 2002-REVISED AUG 2006 1. General Description IN16C554 is an enhanced quadruple version of the 16C550 UART Universal Asynchronous Receiver Transmitter . Each channel can be put into FIFO mode to relieve the CPU of excessive software overhead. In this

crystal 7.3728MHz

Abstract: ANSI Y14.5 sim 300 modem datasheet 16C550 KK16C554PL KK16C554TQ 7.3728mhz
Contextual Info: KK16C554PL/KK16C554TQ QUAD-UART ASYNCHRONOUS COMMUNICATIONS ELEMENT 1. General Description KK16C554 is an enhanced quadruple version of the 16C550 UART Universal Asynchronous Receiver Transmitter . Each channel can be put into FIFO mode to relieve the CPU of excessive software overhead. In this mode, internal

ST16C650A

Abstract: Code T6S 16C550 ST16C450 ST16C550 ST16C650 ST16C650ACJ44 ST16C650ACP40 ST16C650ACQ48 HDR-2X3
Contextual Info: ST16C650A 3.3V and 5V UART WITH 32-BYTE FIFO’s, 5V TOLERANT INPUTS AND INFRARED IrDA ENCODER/DECODER April 2002 DESCRIPTION The ST16C650A*1 (650A) is a universal asynchronous receiver and transmitter (UART) with 5V tolernat inputs. It is pin compatible with the ST16C450/550/650 UART. The 650A is an enhanced UART with 32 byte of transmit and

16C450

Abstract: ST16C450 ST16C454 ST16C454CJ68 ST16C454IJ68 ST68C454 68C454
Contextual Info: ST16C454 ST68C454 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA

Contextual Info: ST16C454 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 -DSRA 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA

ST16C454

Abstract: 16C450 ST16C450 ST16C454CJ68 ST16C454IJ68 ST68C454 pin configuration of 8654
Contextual Info: ST16C454 QUAD UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART DESCRIPTION -CDA -RIA RXA GND D7 D6 D5 D4 D3 D2 D1 D0 INTSEL VCC RXD -RID -CDD 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 -DSRA 10 60 -DSRD -CTSA 11 59 -CTSD -DTRA 12 58 -DTRD VCC 13 57 GND -RTSA

16C550

Abstract: IN16C554PL IN16C554TQ crystal 7.3728MHz
Contextual Info: IN16C554PL/IN16C554TQ QUAD-UART ASYNCHRONOUS COMMUNICATIONS ELEMENT 1. General Description IN16C554 is an enhanced quadruple version of the 16C550 UART Universal Asynchronous Receiver Transmitter . Each channel can be put into FIFO mode to relieve the CPU of excessive software overhead. In this mode, internal

ST16C1450

Contextual Info: áç ST16C1450/51 2.97V TO 5.5V UART SEPTEMBER 2003 REV. 4.1.0 FEATURES GENERAL DESCRIPTION The ST16C1450, ST16C1451 series here on denoted as the 145X is a universal asynchronous receiver and transmitter (UART). The 145X is foot print compatible to the SSI 73M1550 and SSI

Contextual Info: áç XR16L2450 2.25V TO 5.5V DUART SEPTEMBER 2003 REV. 1.0.0 GENERAL DESCRIPTION FEATURES The XR16L2450 L2450 is a dual universal asynchronous receiver and transmitter (UART). The XR16L2450 is an improved version of the ST16C2450 with lower operating voltage and 5 volt

ST16C650A

Contextual Info: ST16C650A 3.3V and 5V UART WITH 32-BYTE FIFO’s, 5V TOLERANT INPUTS AND INFRARED IrDA ENCODER/DECODER January 2001 DESCRIPTION The ST16C650A*1 (650A) is a universal asynchronous receiver and transmitter (UART) with 5V tolernat inputs. It is pin compatible with the ST16C450/550/650 UART. The 650A is an enhanced UART with 32 byte of transmit and