XR 205 Search Results

ua 722 fc

Contextual Info: DISCRETE SEMICONDUCTORS DATA SHEET BFG25AW BFG25AW/X; BFG25AW/XR NPN 5 GHz wideband transistor Product specification File under Discrete Semiconductors, SC14 Philips Semiconductors August 1995 Philips Semiconductors Product specification BFG25AW BFG25AW/X; BFG25AW/XR

XR-205

Abstract: XR205 xr205 equivalent XR 205 frequency generator schematic circuit low frequency square wave oscillator function Wave Generator sawtooth 205 equivalent UT 205 monolithic sine square generator
Contextual Info: £*EX4R XR-205 Monolithic Waveform Generator PIN ASSIGNMENT GENERAL DESCRIPTION The XR-205 is a highly versatile, monolithic waveform generator designed for diverse applications in communi­ cation and telemetry equipment, as well as in systems design and testing. It is a self-contained, totally mono­

XR-205

Abstract: XR205 function Wave Generator sawtooth 60 hz dc oscillator circuit XR 205 xr205 equivalent
Contextual Info: X *E X A R XR-205 Monolithic Waveform Generator GENERAL DESCRIPTION PIN ASSIGNMENT The XR-205 is a highly versatile, monolithic waveform generator designed for diverse applications in communi­ cation and telemetry equipment, as well as in systems design and testing. It is a self-contained, totally mono­

bit3195

Abstract: dmo 265 8051 interfacing programming examples TTB-11 diode T35 12H XRT7234 XR-T7295E XRT7296 XR-T7296 332102rx
Contextual Info: xr XRT7234 PRELIMINARY E3 UNI FOR ATM NOVEMBER ‘999 1.0 SYSTEM DESCRIPTION The XR-T7234 E3 UNI IC for ATM consists of the following functional sections/blocks. • Transmit Section – Transmit Utopia Interface Block – Transmit Cell Processor Block – Transmit E3 Framer Block

33272P

Abstract: ctet
Contextual Info: xr PRELIMINARY XRT7234 E3 UNI FOR ATM NOVEMBER ‘999 REV. P1.0.0 1.0 SYSTEM DESCRIPTION The XR- T7234 E3 UNI IC for ATM consists of the following functional sections/ blocks. • Transmit Section – Transmit Utopia Interface Block – Transmit Cell Processor Block

XR-T7295SOJ

Abstract: T1102A
Contextual Info: XR-T7295 DS31SONET STS-1 Integrated Line Receiver PIN ASSIGNMENT GENERAL DESCRIPTION The XR-T7295 DS3/SONET STS-1 Integrated Line Receiver is a fully integrated receive interface that terminates a bipolar DS3 44.736 MBPS or SONET (51.84 MBPS) signal transmitted over coaxial cable.

Contextual Info: preliminary Data Sheet Rev.0.8 21.06.2012 8GB DDR3 – SDRAM ECC XR-DIMMTM 240 Pin ECC XR-DIMMTM Features: SGV08G72B1BB2SA-xx W RT • 8GByte in FBGA Technology • RoHS compliant Options:  Data Rate / Latency DDR3 1333 MT/s CL9 DDR3 1600 MT/s CL11 

G703S

Abstract: DSX-3 LTA 703 S
Contextual Info: JTEXAR XR-T7295 DS3 1SONET STS-1 Integrated Line Receiver GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T7295 DS3/SONET STS-1 Integrated Line Receiver is a fully integrated receive interface that terminates a bipolar DS3 44.736 MBPS or SONET (51.84 MBPS) signal transmitted over coaxial cable.

Contextual Info: w Fw ip XR-T7295 —ihe analog plus company April 1994-3 DS3 / SONET STS-1 Integrated Line Receiver GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T7295 DS3/SONET STS-1 integrated line receiver is a fully integrated receive interface that ter­ minates a bipolar DS3 44.736 MBPS or SONET

digital clock ckt diagram

Abstract: 34BB 728A XR-T7295 XR-T7295SIP XR-T7295SOJ XR-T7295TIP XR-T7295TIW XRT7295
Contextual Info: EXAR SOE D CORP • BMEZblfl 0D0S40fl 1Ô1 ■ EXR Z * E X A R XR-T7295 7 - 7 5 "- 9 ^ - 0 7 DS3 1SONET STS-1 Integrated Line Receiver PIN ASSIGNMENT GENERAL DESCRIPTION The XR-T7295 DS3/SONET STS-1 Integrated Line Receiver is a fully integrated receive interface that

Contextual Info: Data Sheet Rev.1.0 20.06.2011 2048MB DDR3 – SDRAM ECC XR-DIMMTM 240 Pin ECC XR-DIMMTM Features: SGV02G72A1BC1SA-xxRT • 2GB in FBGA Technology • RoHS compliant Options:  Data Rate / Latency DDR3 1066 MT/s CL7 DDR3 1333 MT/s CL9  Module density 2048MB with 9 dies and 1 rank

31518

Abstract: AP 4433 8 pin 4433
Contextual Info: F ZR MIL-DTL 38999 XR YR 4 Keyway MIL-DTL-38999 Series I and II .063 +.005/-.001 Alternate Keyway Positions Receptacles CL Main Keyway .100 (+.005/-.001) B Main Keyway .126 (+.005/-.001) C D N A B C D N A B V CL J H F W ZP F XP YP ZR XR 4 Keyway .052 (+.005/-.001)

Contextual Info: Z * EX4R XR-2851 PRELIMINARY INFORMATION Ground Fault Interrupter FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION The XR -2851 G ro u n d F a u lt In te rru p te r is designed to be used in c irc u its p ro vid in g g rou n d fa u lt p ro te c tio n fo r A C

OF IC 7909

Abstract: xr 2230 UHF transistor GHz marking 4S SOT343 4 pin dual-emitter BFG25AW marking code C1E marking c1e transistor BFG25W BFG25AWX
Contextual Info: Philips Semiconductors Product specification BFG25AW BFG25AW/X; BFG25AW/XR NPN 5 GHz wideband transistor MARKING FEATURES • Low current consumption 100 ^iA to 1 mA TYPE NUMBER • Low noise figure • Gold metallization ensures excellent reliability. CODE

XR-14412

Abstract: XR14412VP em fsk modem pot 10k 14412VP XR-346 14412
Contextual Info: XR-14412 'X T E X 4 R FSK Modem System FU N C T IO N A L B LO C K DIAGRAM G E N E R A L DESCRIPTION The XR-14412 con tains all the ne cessary c irc u itry to co n s tru c t a co m p le te FSK m o dulato r/de m odu la tor M O D EM syste m . Inclu d e d is c irc u itry fo r pinprogra m m a ble fre q u e n c y bands, eithe r U.S. or foreign

telcordia gr 1081 core

Contextual Info: xr XRT75R03D THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER MARCH 2005 REV. 1.0.3 GENERAL DESCRIPTION TRANSMITTER: The XRT75R03D is a three-channel fully integrated Line Interface Unit LIU featuring EXAR’s R3 Technology (Reconfigurable, Relayless Redundancy)

chn 923

Contextual Info: xr XRT75R03 THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR MARCH 2005 REV. 1.0.7 GENERAL DESCRIPTION TRANSMITTER: The XRT75R03 is a three-channel fully integrated Line Interface Unit LIU featuring EXAR’s R3 Technology (Reconfigurable, Relayless Redundancy)

CHN G4 309

Abstract: 40 serice free DMO 565 R CHN 932
Contextual Info: xr XRT86L38 PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO JANUARY 2005 REV. P1.1.7 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .

chn 542

Contextual Info: xr XRT86VL32 PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO FEBRUARY 2005 REV. P1.0.3 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .

DMO 565 R

Abstract: chn 924 CHN G4 120
Contextual Info: xr XRT86L30 PRELIMINARY SINGLE T1/E1/J1 FRAMER/LIU COMBO JUNE 2005 REV. P1.0.2 GENERAL DESCRIPTION The XRT86L30 is a single channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .

DMO 565 R

Abstract: chn 631 CHN 534 CHN 633 diode ST chn 624 TR54016 XRT84V24 XRT86L34 XRT86L34IB E1 frame
Contextual Info: xr XRT86L34 PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO DECEMBER 2004 REV. P1.1.7 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .

chn 751

Abstract: GR-253 GR-253-CORE GR-499-CORE XRT75R06D XRT75R06DIB chn 622 st WG 253 chn 834 HDB3 CODING DECODING FPGA
Contextual Info: xr XRT75R06D PRELIMINARY SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER JULY 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRT75R06D is a six channel fully integrated Line Interface Unit LIU featuring EXAR’s R3 Technology (Reconfigurable, Relayless, Redundancy) for E3/

dmo 265

Abstract: CHN 923 P118 TR54016
Contextual Info: xr XRT86L34 PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO JANUARY 2005 REV. P1.1.8 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .

SDH 209

Abstract: DMO 565 R SCR PIN CONFIGURATION CHN 035 CHN G4 309 telephone schemes sa8316 dmo 265 CHN G4 329
Contextual Info: xr XRT86VL38 PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO MARCH 2005 REV. P1.0.6 GENERAL DESCRIPTION The XRT86VL38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .