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    XILINX CROSS REFERENCE Search Results

    XILINX CROSS REFERENCE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MP-5XRJ11PPXS-014
    Amphenol Cables on Demand Amphenol MP-5XRJ11PPXS-014 Flat Silver Satin Modular Crossed wiring Cable, RJ11 / RJ11 14ft PDF
    10150535-050HLF
    Amphenol Communications Solutions Cross-Mate™, Wire to Board connectors 2.0mm Pitch, Cable Connector PDF
    ME3008430701111
    Amphenol Communications Solutions Mini cool edge 0.6mm,84pin,orthogonal ,1x1,7.805mm offset,with cross head screw,Gen5 PDF
    10150526-0511HLF
    Amphenol Communications Solutions Cross-Mate™, Wire to Board connectors 2.0mm Pitch, Right Angle, surface mount, receptacle PDF
    10150537-002LF
    Amphenol Communications Solutions Cross-Mate™, Wire to Board connectors 2.0mm Pitch, Cable Connector, terminal PDF

    XILINX CROSS REFERENCE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    XC3130A5PC84C

    Abstract: XC3090-100PP175C XC3030-70PC68C XC3030-70PC84I ATT3042 XC3120 XC3742 ATT3090-100J160I XC3190A-5PC84C ATT3030-70M84
    Contextual Info: microelectronics group Lucent Technologies Bell Labs Innovations ATT3000 Series Cross-Reference Guide Cross-Referencing ATT3000 Series FPGAs with Xilinx XC3000, XC3000A, XC3100, and XC3100A FPGAs Xilinx XC3000 and XC3100 The Lucent Technologies ATT3000 family is a direct


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    ATT3000 XC3000, XC3000A, XC3100, XC3100A XC3000 XC3100 XC3130A5PC84C XC3090-100PP175C XC3030-70PC68C XC3030-70PC84I ATT3042 XC3120 XC3742 ATT3090-100J160I XC3190A-5PC84C ATT3030-70M84 PDF

    XC3090-100PQ160I

    Abstract: XC3042-100PQ100C XC3042-100PC84C XC3020-70PC68C XC3042-70PC84I XC3042-100PP132C ATT3030-70M84 ATT3000 xc3042-100pq XC3064-100PC84C
    Contextual Info: m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations ATT3000 Series Cross-Reference Guide Cross-Referencing ATT3000 Series FPGAs with Xilinx XC3000, XC3000A, XC3100, and XC3100A FPGAs Xilinx XC3000 and XC3100 The Lucent Technologies ATT3000 family is a direct


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    ATT3000 XC3000, XC3000A, XC3100, XC3100A XC3000 XC3100 XC3090-100PQ160I XC3042-100PQ100C XC3042-100PC84C XC3020-70PC68C XC3042-70PC84I XC3042-100PP132C ATT3030-70M84 xc3042-100pq XC3064-100PC84C PDF

    xc4413

    Abstract: XC4405 xc4310 XC4403 XC2064 XC2018 XC2318 XC3030A XC4400 XC5410
    Contextual Info: TM Xilinx HardWire Array Cross Reference List  FPGA Device Expected Volume HardWire Device Comment XC2000 Family XC2018 XC2018L XC2064 XC2064L Any Any Any Any XC2318 XC2318L XC2318 XC2318L XC3000 Family XC3020 XC3020A XC3020L XC3030 XC3030A XC3030L XC3120A


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    XC2000 XC2018 XC2018L XC2064 XC2064L XC2318 XC2318L XC3000 xc4413 XC4405 xc4310 XC4403 XC2064 XC2018 XC2318 XC3030A XC4400 XC5410 PDF

    047-710

    Abstract: diode cross reference GENERATOR SET manual cross reference multiplexer 64 XC2064 XC3090 XC4005 XC-DS-501 logic gates cross reference
    Contextual Info: Xilinx CORE Generator System Compatibility Guide September 1999 R , XILINX, XACT, XC2064, XC3090, XC4005, XC-DS501, FPGA Archindry, NeoCAD, NeoCAD EPIC, NeoCAD PRISM, NeoROUTE, Plus Logic, Plustran, P+, Timing Wizard, and TRACE are registered trademarks of Xilinx, Inc.


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    XC2064, XC3090, XC4005, XC-DS501, 047-710 diode cross reference GENERATOR SET manual cross reference multiplexer 64 XC2064 XC3090 XC4005 XC-DS-501 logic gates cross reference PDF

    fpga radiation

    Abstract: SRAM Cross References Upset XQR4036XL RAM SEU UPS control circuitry RAM EDAC SEU Upsets Single Event Upset FPGA
    Contextual Info: Single Event Effects Testing of Xilinx FPGAs Dr. Gary Lum Lockheed Martin, Sunnyvale, CA and Glen Vandenboom Xilinx, Inc. San Jose, CA Introduction Advanced Field Programmable Gate Arrays FPGAs operating at 3.3V were tested for single event effects (SEE) by


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    XQR4036XL fpga radiation SRAM Cross References Upset RAM SEU UPS control circuitry RAM EDAC SEU Upsets Single Event Upset FPGA PDF

    405GP

    Abstract: BDI2000 JPEG2000 PPC405 MP405
    Contextual Info: Unleash Your Creativity with Embedded Linux on Virtex-II Pro FPGAs Xilinx has partnered with MontaVista Software to provide a customized embedded Linux solution for Virtex-II Pro FPGAs. by Milan Saini Technical Marketing Manager Xilinx, Inc. milan.saini@xilinx.com


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    xilinx MARKING CODE

    Abstract: XC4300 xilinx part marking XILINX CROSS REFERENCE XC17128 m1 marking code marking m1 FRC0260
    Contextual Info: TM XC4300 HardWire Array Design Verification Form  Company Name Date _ Customer Name _ E-mail _ Address _ City _ State/Province _


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    XC4300 FRC0260 xilinx MARKING CODE xilinx part marking XILINX CROSS REFERENCE XC17128 m1 marking code marking m1 PDF

    xilinx MARKING CODE

    Abstract: XILINX CROSS REFERENCE marking po xilinx cross PUT marking xilinx part marking date code check XC2318/L
    Contextual Info: TM XC2318/L HardWire Array Design Verification Form  Company Name Date _ Customer Name _ E-mail _ Address _ City _ State/Province _


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    XC2318/L FRC0190 xilinx MARKING CODE XILINX CROSS REFERENCE marking po xilinx cross PUT marking xilinx part marking date code check PDF

    xilinx MARKING CODE

    Abstract: XC4400 XC5400 xilinx part marking FRC0280 XC17128 xilinx cross marking xl xilinx marking
    Contextual Info: XC4400EX/XL, XC4400, XC5400 HardWire Array Design Verification Form  TM Company Name Date _ Customer Name _ E-mail _


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    XC4400EX/XL, XC4400, XC5400 FRC0280 xilinx MARKING CODE XC4400 XC5400 xilinx part marking XC17128 xilinx cross marking xl xilinx marking PDF

    xilinx MARKING CODE

    Abstract: marking m1 m1 marking code XILINX CROSS REFERENCE XC17128
    Contextual Info: TM XC3300A/L HardWire Array Design Verification Form  Company Name Date _ Customer Name _ E-mail _ Address _ City _ State/Province _


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    XC3300A/L FRC0191 xilinx MARKING CODE marking m1 m1 marking code XILINX CROSS REFERENCE XC17128 PDF

    M25PXX

    Abstract: x95108 simple spi flash spi flash spi In Circuit Serial Programming NUMONYX xilinx spi virtex 5 M25P application note M25PE spi flash m25pxx spi flash spartan 6
    Contextual Info: ’ Application Note: Spartan-3E and Virtex-5 FPGAs R XAPP951 v1.2 January 29, 2009 Summary Configuring Xilinx FPGAs with SPI Serial Flash Author: Stephanie Tapp This application note discusses the Serial Peripheral Interface (SPI) configuration mode introduced in the Virtex -5 and Spartan®-3E FPGA families. The required connections to


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    XAPP951 M25PXX x95108 simple spi flash spi flash spi In Circuit Serial Programming NUMONYX xilinx spi virtex 5 M25P application note M25PE spi flash m25pxx spi flash spartan 6 PDF

    Bosch radar

    Abstract: bosch automotive adaptive cruise control Radar sensor Sensor OPB bosch cruise control xilinx fifo 9.3 automotive sensors bosch Turbo decoder Xilinx XILINX CROSS REFERENCE xilinx TURBO decoder
    Contextual Info: Programmable Platform for Driver Assistance Systems The new wave of driver assistance systems demands high-performance digital signal processing DSP without sacrificing the flexibility needed for the early research and development of object detection and automotive network technologies.


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    xilinx cross

    Abstract: FRC0189
    Contextual Info: TM HardWire Array Initial Design Submittal Form  Company Name Date _ Customer Name _ E-mail _ Address _ City _ State/Province _


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    IEEE1149 FRC0189 xilinx cross PDF

    cypress fpga

    Abstract: atmel 550 epm7064s cross reference XC3042A pinout epm7064 cross reference xilinx XC6216 Actel Accelerator fpga XC7336 cross reference XC4005E PHYSICAL altera PLD cross reference
    Contextual Info: CMOS ASIC Converting FPGAs and PLDs to Atmel Gate Arrays Introduction Atmel is one of the only companies that designs and manufactures field programmable gate arrays FPGAs , programmable logic devices (PLDs) and high performance gate arrays. Atmel offers a seamless, direct conversion


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    ATL50/4 ATLS60/80 ATL60/4 ATV5000 ATL60/15 ATL50/15 cypress fpga atmel 550 epm7064s cross reference XC3042A pinout epm7064 cross reference xilinx XC6216 Actel Accelerator fpga XC7336 cross reference XC4005E PHYSICAL altera PLD cross reference PDF

    XC6200

    Abstract: FIR FILTER implementation on fpga register based fifo xilinx 16X1 16X2 TMS320 XC4000 XC4000E XC7336-5 XC7354
    Contextual Info: HOT APPLICATIONS: DSP & Telecommunications Data Buffer Design with RAM-based FPGAs Physical Interface Design with 5 ns EPLDs Filter Design with LUT-based FPGAs Telecommunications and DSP — 1 Copyright 1995 by Xilinx, Inc. All rights reserved. All trademarks are the property of the respective owners.


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    XC4000E XC6200 FIR FILTER implementation on fpga register based fifo xilinx 16X1 16X2 TMS320 XC4000 XC7336-5 XC7354 PDF

    HT12E HT12D

    Abstract: Panasonic RELAY Cross Reference NEC OMRON N80C196KC16 MOS248 TDA2086A GOULD 500 COLOUR LCD DIGITAL STORAGE OSCILLOSCOPE 1NA114AP ICM72171 SL443A nec matrix Vacuum tube display
    Contextual Info: Issued July 1996 021-928 Data Packs A-K RS data sheet/semiconductor manufacturers data sheet index Data Sheet Introduction RS data sheets form a unique source of detailed information regarding technical specifications, absolute maximum ratings and applications for engineers and designers working with RS products.


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    XC3S1000-FT256

    Abstract: XC3S1000-FG456 XC2VP30-FF896 XILINX/SPARTAN-3 XC3S200 XC2V3000-BG728 XC2VP4-FG456 XC3S200FT256 XC2V1000-FG456 XC2V3000-FG676 XC2VP20 fg676
    Contextual Info: XPressArray-II 0.15mm Structured ASIC Data Sheet 1.0 Key Features • Next-generation 0.15µm structured ASIC • Platform for high-performance 1.5V/1.2V ASICs and FPGA-to-ASIC conversions • NRE and production cost savings • Significant time-to-market advantages


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    210MHz 500MHz 332kbits 18kbit 330MHz XC3S1000-FT256 XC3S1000-FG456 XC2VP30-FF896 XILINX/SPARTAN-3 XC3S200 XC2V3000-BG728 XC2VP4-FG456 XC3S200FT256 XC2V1000-FG456 XC2V3000-FG676 XC2VP20 fg676 PDF

    1. Mobile Computing block diagram

    Abstract: vhdl code for sdram controller vhdl sdram XAPP394 xilinx cross Mobile SDRAM xilinx vhdl code vhdl code for clock and data recovery XAPP393 COOLRUNNER-II examples
    Contextual Info: Application Note: CoolRunner-II CPLDs Interfacing to Mobile SDRAM with CoolRunner-II CPLDs R XAPP394 v1.1 December 1, 2003 Summary This document describes the VHDL design for interfacing CoolRunner -II CPLDs with low power Mobile SDRAM memory devices. Mobile SDRAM is the ideal memory solution for


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    XAPP394 Mm/bvdocs/publications/ds093 XC2C128 com/bvdocs/publications/ds094 XC2C256 com/bvdocs/publications/ds095 XC2C384 com/bvdocs/publications/ds096 XC2C512 pdf/wp165 1. Mobile Computing block diagram vhdl code for sdram controller vhdl sdram XAPP394 xilinx cross Mobile SDRAM xilinx vhdl code vhdl code for clock and data recovery XAPP393 COOLRUNNER-II examples PDF

    vhdl code for pcm bit stream generator

    Abstract: CC302 alarm clock design of digital VHDL v55e digital alarm clock vhdl code in modelsim bipolar ami verilog code for frame assembler alarm clock verilog code
    Contextual Info: CoreEl T1 Framer CC302 May 30, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com Features •


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    CC302) 7041/Y vhdl code for pcm bit stream generator CC302 alarm clock design of digital VHDL v55e digital alarm clock vhdl code in modelsim bipolar ami verilog code for frame assembler alarm clock verilog code PDF

    EMP7064

    Abstract: Altera emp7064 MIC37xxx SC2S200 EP1K100-2 SC2S30 micrel tx battery 3v MIC37302BR SC2S150 1N4148
    Contextual Info: MIC37xxx Low-Dropout Regulators Industry’s Smallest & Lightest LDOs Powering Low-Voltage, High-Current Digital ICs Micrel’s MIC37xxx is a new family of highcurrent, low-dropout regulators LDOs for powering low-voltage FPGAs, ASICs, microcontrollers, DSPs


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    MIC37xxx MIC37xxx 750mA, O-263 BP116 M-0090 EMP7064 Altera emp7064 SC2S200 EP1K100-2 SC2S30 micrel tx battery 3v MIC37302BR SC2S150 1N4148 PDF

    XAPP393

    Abstract: XAPP387 XC2C512 XAPP376 cellphone microprocessor DS090 MC16 XAPP380 XAPP388 XC2C128
    Contextual Info: Application Note: CoolRunner-II CPLDs R On the Fly Reconfiguration with CoolRunner-II CPLDs XAPP388 v1.2 May 15, 2003 Summary This application notes describes the CoolRunner -II CPLD capability called “On the Fly” (OTF) Reconfiguration. OTF permits the CPLD to be operating with a design pattern and


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    XAPP388 com/bvdocs/publications/ds094 XC2C256 com/bvdocs/publications/ds095 XC2C384 com/bvdocs/publications/ds096 XC2C512 pdf/wp165 pdf/wp170 XAPP393 XAPP387 XAPP376 cellphone microprocessor DS090 MC16 XAPP380 XAPP388 XC2C128 PDF

    simulation models

    Abstract: transistor B1010 X8345 XC3000 XC4000 XC4000E XC4000EX XC4000XL XC5200 vhdl code for combinational circuit
    Contextual Info: APPLICATION NOTE Chip-Level HDL Simulation Using the Xilinx Alliance Series  XAPP 108 May 21, 1998 Version 1.0 3* Application Note Summary This application note describes the basic flow and some of the issues to be aware of for HDL simulation with Alliance Series


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    XC4000 VCOMP52K VITAL52K VCFG52K simulation models transistor B1010 X8345 XC3000 XC4000 XC4000E XC4000EX XC4000XL XC5200 vhdl code for combinational circuit PDF

    verilog code for image processing

    Abstract: jpeg encoder verilog code image processing verilog code verilog hdl code for encoder
    Contextual Info: ISO/IEC 14495-1 JPEG-LS Compliance  Programmable local gradient JPEGLS-E JPEG-LS Encoder Core thresholds and context parameters reset threshold value up to 64  Grayscale or 3 component im- ages  4:4:4, 4:2:2, 4:1:1 and 4:2:0 The JPEGLS-E core is a JPEG-LS encoder that forms a high performance solution for


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    Programmable Logic Databook

    Abstract: bel 187 transistor 1N112 bel 187 view synopsys Platform Architect DataSheet XC2064 XC3090 XC4000 XC4005 XC5210
    Contextual Info: Floorplanner Guide Introduction Design Flow Getting Started Using the Floorplanner Menu Command Reference Glossary Floorplanner Guide — 2.1i Printed in U.S.A. Floorplanner Guide R The Xilinx logo shown above is a registered trademark of Xilinx, Inc. FPGA Architect, FPGA Foundry, NeoCAD, NeoCAD EPIC, NeoCAD PRISM, NeoROUTE, Timing Wizard, TRACE,


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    XC2064, XC3090, XC4005, XC5210, XC-DS501 Programmable Logic Databook bel 187 transistor 1N112 bel 187 view synopsys Platform Architect DataSheet XC2064 XC3090 XC4000 XC4005 XC5210 PDF