XDR 1 Search Results

xdr rambus

Abstract: xdr elpida
Contextual Info: XDR DRAM 8x16Mx4 Advance Information Overview XDR DRAM CSP x4 Pinout The 512Mb Rambus XDR DRAM device is a CMOS DRAM organized as 128M words by 4 bits. The use of Differential Rambus Signaling Level DRSL technology permits 4000/ 3200/2400 Mb/s transfer rates while using conventional system and board design technologies. XDR DRAM devices are

Contextual Info: CY24271 Rambus XDR Clock Generator Rambus® XDR™ Clock Generator Features • 300–800 MHz high speed clock support Meets Rambus Extended Data Rate XDR™ clocking requirements ■ Quad (open drain) differential output drivers ■ Supports frequency multipliers: 3, 4, 5, 6, 8, 9/2, 15/2, and 15/4

Contextual Info: CY24272 Rambus XDR Clock Generator with Zero SDA Hold Time Rambus‚ XDR™ Clock Generator with Zero SDA Hold Time Features • Table 1. Device Comparison Meets Rambus Extended Data Rate XDR™ clocking requirements ■ 25 ps typical cycle-to-cycle jitter

HYB18H512322BF

Abstract: qimonda hyb18h5
Contextual Info: March 2008 IDRD51-0-A1F1C–32C XDR DRAM 512-Mbit XDR DRAM RoHS compliant Data Sheet Rev. 1.0 Data Sheet IDRD51-0-A1F1C 512-Mbit XDR DRAM IDRD51-0-A1F1C–32C Revision History: 2008-03, Rev. 1.0 Page Subjects major changes since last revision All New Data Sheet

XDR Rambus

Abstract: 8x4Mx16
Contextual Info: XDR DRAM 8x4Mx16/8/4/2 Overview XDR DRAM CSP x16 Pinout The Rambus XDR™ DRAM device is a general-purpose highperformance memory device suitable for use in a broad range of applications, including computer memory, graphics, video, and any other application where high bandwidth and low

Contextual Info: November 2008 IDRD51-0-A1F1C–[32C/40D] XDR DRAM 512-Mbit XDR DRAM RoHS compliant Internet Data Sheet Rev. 1.12 Internet Data Sheet IDRD51-0-A1F1C 512-Mbit XDR DRAM IDRD51-0-A1F1C–[32C/40D] Revision History: 2008-11, Rev. 1.12 Page Subjects major changes since last revision

IDRD51-0-A1F1C

Contextual Info: October 2008 IDRD51-0-A1F1C–[32C/40C] XDR DRAM 512-Mbit XDR DRAM RoHS compliant Internet Data Sheet Rev. 1.10 Internet Data Sheet IDRD51-0-A1F1C 512-Mbit XDR DRAM IDRD51-0-A1F1C–[32C/40C] Revision History: 2008-10, Rev. 1.10 Page Subjects major changes since last revision

Contextual Info: CY24271 Rambus XDR Clock Generator Rambus R XDR™ Clock Generator Features • 300–800 MHz high speed clock support Meets Rambus Extended Data Rate (XDR™) clocking requirements ■ Quad (open drain) differential output drivers ■ Supports frequency multipliers: 3, 4, 5, 6, 8, 9/2, 15/2, and 15/4

Contextual Info: CY24272 Rambus XDR Clock Generator with Zero SDA Hold Time Rambus XDR™ Clock Generator with Zero SDA Hold Time Features Meets Rambus Extended Data Rate XDR™ clocking requirements Device Comparison • 25 ps typical cycle-to-cycle jitter ❐ –135 dBc/Hz typical phase noise at 20 MHz offset

ICS9220

Abstract: 1227G 38-333 rambus xdr
Contextual Info: ICS9220 Integrated Circuit Systems, Inc. TM TM Programmable Rambus XDR Clock Generator General Description Features The ICS9220 clock generator provides Programmable TM clock signals to support the Rambus XDR memory subsystem and Redwood logic interface. The ICS9220

Fixed resistor

Abstract: XDR Rambus ICS9214
Contextual Info: ICS9214 Integrated Circuit Systems, Inc. Rambus TM TM XDR Clock Generator General Description Features The ICS9214 clock generator provides the necessary clock TM signals to support the Rambus XDR memory subsystem and Redwood logic interface. The clock source is a reference

0809g

Abstract: ICS9214
Contextual Info: ICS9214 Integrated Circuit Systems, Inc. Rambus TM TM XDR Clock Generator General Description Features The ICS9214 clock generator provides the necessary clock TM signals to support the Rambus XDR memory subsystem and Redwood logic interface. The clock source is a reference

XDR Rambus

Abstract: Rambus XDR CY24271 CY24271ZXC CY24271ZXCT
Contextual Info: CY24271 Rambus XDR Clock Generator Features • Meets Rambus® Extended Data Rate XDR™ clocking requirements ■ 25 ps typical cycle-to-cycle jitter ❐ 135 dBc/Hz typical phase noise at 20 MHz offset ■ 100 or 133 MHz differential clock input ■

Contextual Info: DATA SHEET 1G bits XDR DRAM EDX1032BBBG 32M words x 32 bits Overview Features The EDX1032BBBG is 1G bits XDR DRAM organized as 32M words × 32 bits. They are general-purpose high-performance memory devices suitable for use in a broad range of applications.

104BA

Contextual Info: Preliminary K4Y5002 /04/08/16 4UC XDRTM DRAM 512Mbit XDR DRAM(C-die) 4M x 16(/8/4/2) bit x 8s Banks Version 0.3 Aug 2005 XDR is a trademark of Rambus Inc. Version 0.3 Aug 2005 Page -1 Preliminary K4Y5002(/04/08/16)4UC XDRTM DRAM Change History Version 0.1 (May 2005) - Preliminary

TMP86FS49UG

Abstract: TB6558FLG TB6590FTG TB6593FNG TB6598FNG TC59YM916BKG TMP86FS64FG 27 mhz toy airplane TCA62735FLG toy motor Control IC
Contextual Info: TOSHIBA SEMICONDUCTOR BULLETIN EYE JUNE 2005 VOLUME 155 CONTENTS New Products The second generation 512-megabit XDR DRAM .2 Charge Pump White LED Driver with Constant Current Regulator .2

Contextual Info: K4Y50164UC K4Y50084UC K4Y50044UC K4Y50024UC XDRTM DRAM TM 512Mbit XDR DRAM C-die Revision 1.0 December 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

9220B

Abstract: 9220BGILF ICS9220 ICS9220B
Contextual Info: DATASHEET Programmable Rambus TM XDR TM ICS9220B Clock Generator General Description Features The ICS9220 clock generator provides Programmable clock signals to support the Rambus XDRTMmemory subsystem and Redwood logic interface. The ICS9220 has been optimized for 100MHz reference input that may or may not be

K4Y50024UC

Abstract: K4Y50044UC K4Y50084UC K4Y50164UC
Contextual Info: K4Y50164UC K4Y50084UC K4Y50044UC K4Y50024UC XDRTM DRAM TM 512Mbit XDR DRAM C-die Revision 1.1 August 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

Contextual Info: Preliminary K4Y5016 /08/04/02 4UC XDRTM DRAM 512Mbit XDRTM DRAM(C-die) 4M x 16(/8/4/2) bit x 8s Banks Version 0.3 Aug 2005 Notice INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

0129G

Abstract: Circuit Diagrams motor starter electric motor starter Moeller Electric
Contextual Info: 13 Jul 07 1 3 : 4G Moeller Electric Ltd 0129G 310399 Motor Starter Circuit Diagrams One of these circuit diagrams will apply to this Motor Starter; please note that hatched areas represent the installation of, and final control circuit connections to, the Overload Relay which is available separately. The dotted box around Q1 represents when the starter

1SS TRANSISTOR

Contextual Info: TOSHIBA 9 Ó 9 7 2 5 0 TO SHIBA ~hìhi -CDISCRET E / O P T O } =H D IS C R E T E /O P T O 99D D E I lU'lveSQ □□ I b ' m 16991 DT^3-£>5~ TOSHIBA FIELD EFFECT TRANSISTOR ARRAY SEMICONDUCTOR S 3 5 1 3 TECHNICAL DATA S I L I C O N N C H A N N E L M O S T Y P E (4 in 1)

BXA32110XBGN

Abstract: SE1000 SE-1000
Contextual Info: eye TOSHIBA SEMICONDUCTOR BULLETIN eye May 2008 VOLUME 189 CONTENTS New Products Intelligent analog-based control solution: Mixed-Signal Controllers High-performance stream processor: SpursEngine SE1000 2 4 5 New Products NEW PRODUCTS 1 Intelligent analog-based control solution

one band compander circuit application

Abstract: audio compressor expander IC 8 pin compandor audio compressor expander IC, 8 pin A6C2 audio compressor expander IC EAO Switch xdr ram
Contextual Info: SONY. C X D 1 2 7 2 Q / R Cellular Phone Filter LSI with On-Chip Compandor D escription The CXD1272Q/R is a filter LSI for cellular phones. Successor to the CXD1271Q/R, this device features an on-chip compandor a new function fulfilling users’ for a