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Contextual Info: FD-based Parallel Register V1.0.3 December 17, 1999 Product Specification R Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: coregen@xilinx.com URL: www.xilinx.com/ipcenter Functional Description The flip-flop based data register is a member of the BaseBLOX series of building blocks for the Virtex architecture.

Contextual Info: FD-based Parallel Register V2.0 June 30, 2000 Product Specification R Features • Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: coregen@xilinx.com URL: www.xilinx.com/ipcenter • • • • • • Drop-in module for Virtex, Virtex-E, Virtex-ΙΙ and

Contextual Info: FD-based Parallel Register v7.0 DS225 April 28, 2005 Product Specification Features • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs • Supports data from 1 to 256 bits wide