X-MODE SAM Search Results

Contextual Info: KM44C4010A, KM44C4110A CMOS DRAM 4M x 4 Bit CMOS DRAM with Fast Page Mode Write per Bit Mode DESCRIPTION This is a family of 4,194,304 x 4 bit Fast Page Mode(Write per Bit mode) CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Refresh cycle(2K Ref. or 4K Ref.),

7-it4142

Abstract: it4142 KM44C4100A A10EZ
Contextual Info: KM44C4010A, KM44C4110A CMOS DRAM 4M x 4 Bit CMOS DRAM with Fast Page Mode Write per Bit Mode DESCRIPTION This is a family of 4,194,304 x 4 bit Fast Page Mode(Write per Bit mode) CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Refresh cycle(2K Ref. or 4K Ref.),

33A6

Abstract: HA11-7
Contextual Info: KM44C401OA, KM44C4110A CMOS DRAM 4M x 4 Bit CMOS DRAM with Fast Page Mode Write per Bit Mode DESCRIPTION This is a family of 4,194,304 x 4 bit Fast Page Mode(Write per Bit mode) CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Refresh cycle(2K Ref. or 4K Ref.),

Contextual Info: • ■ ■ ■ : MX23C41 11 '■ ■ ; 4M-BIT [512K x 8/256K x 16] CMOS MASK ROM with page mode FEATURES • With page mode function • Switchable organization - 512K x 8 byte mode - 256K x 16 (word mode) • Single +5V power supply • Fast access time:100/120/150/200ns

Contextual Info: M X 2 3C 8 1 n 1 x 8/5*1 SK x 1BJ CM 03 MASK ROM with pags mode FEATURES • • • • • • With page mode function • Switchable configuration - 1 M x 8 byte mode - 512K x 16(word mode) • Single +5V power supply • Fast access time: 100/120/150ns (max)

MX25L1608D

Abstract: MX25L1608 MX25L6408D 6408D 1608D mx25L3208 MX25L3208D MX25L6408 MX25L1608DM2I MX25L16
Contextual Info: MX25L1608D MX25L3208D MX25L6408D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

MX25L3205D

Abstract: mx25l3205dm2i-12g MX25L6405D MX25L1605D MX25L1605DM2I-12G MACRONIX PM1290 MXIC MX25L3205D MX25L6405DMI-12G 25l1605d mx25l1605dm2i-12g
Contextual Info: MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

MX25L1605D

Abstract: 76F0
Contextual Info: PRELIMINARY MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

MXIC MX25L3205D

Abstract: mx25l3205dm2i MX25L3205DMI-12G C22017
Contextual Info: MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

mx25l1605dm2i

Abstract: MX25L3205DM2I-12G MX25Lxx05D MX25L3205DMI-12G MX25L6405DMI-12G mx25l3205dm2i MX25L1605dm2
Contextual Info: MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

MX25L3205DM

Abstract: MX25L64 MX25L3205D MX25L1605D MX25L3205DMI-12G MX25L1605dm2 MX25L3205DM2I-12G MX25L1605DM2I MX25L1605DM2I-12G MX25L1605DPI-12G
Contextual Info: MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

KH25L64

Abstract: KH25L6405D KH25L3205 KH25L1605 WSON* 8x6mm KH25L3205DM2C-12g KH25L kh25l3205d KH25L1605D
Contextual Info: KH25L1605D KH25L3205D KH25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

Contextual Info: PRELIMINARY MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

25l1605

Abstract: 25l1605d mx25l1605dm2i MX25l3205dm2i-12g MX25L1605DM2I-12g 25L160 MX25L6405D MX25L3205D MX25L6405DMI-12G MX25L1615D
Contextual Info: PRELIMINARY MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

KH25L6405D

Abstract: KH25L64 KH25L3205 kh25l3205d KH25L1605D KH25L3205DM2C-12g KH25L32 25l1605d KH25L1605
Contextual Info: PRELIMINARY KH25L1605D KH25L3205D KH25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits two I/O read mode structure

Contextual Info: ADVANCED INFORMATION MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface SPI compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits (two I/O read mode) structure

25l1605

Abstract: MX25L3205DM2C-12G MX25L1605DM2C 25l1605d MX25L3205DM2C MX25Lxx05D 25L160 MX25L1605D 73F0 MX25L3205DMI-12G
Contextual Info: ADVANCED INFORMATION MX25L1605D MX25L3205D MX25L6405D 16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASH FEATURES GENERAL • Serial Peripheral Interface SPI compatible - Mode 0 and Mode 3 • 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits (two I/O read mode) structure

Contextual Info: lUDClC MX23C1 611 16M -BIT 2M x 8 /1 M x 16 C M O S M A S K RO M with page mode FEATURES • With page mode function • Switchable configuration - 2M x 8(byte mode) - 1M x 16(word mode) • Single +5V power supply • Fast access time: 100/120/150ns (max)

km23c8105bg

Abstract: km23c8105 samsung ace
Contextual Info: SAMSUNG ELECTRONICS INC b7E D • 7^4142 KM23C8105B G □G170b4 MME I SMGK CMOS MASK ROM 8M -Bit (1M x 8/512K x 16) CMOS M ASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 1,048,576 x 8 (byte mode) 524,288 x 16 (word mode) • Fast access time

33AO

Abstract: C1010C a9ce DD2020
Contextual Info: KM44C1010C CMOS DRAM 1M x 4 Bit CMOS Dynamic RAM with Fast Page Mode Write Per Bit Mode DESCRIPTION This is a family of 1,048,576 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Access time(-5, -6, -7 or -8) and package type (SOJ ,

Contextual Info: b7E 3> SAMSUNG ELECTRONICS INC • 7°ib414H 0D17Qb4 442 I KM23C8105B G CMOS MASK ROM 8M-Bit (1M x 8/512 K x 16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 1,048,576 x 8 (byte mode) 524,288 x 16 (word mode) • Fast access time

Contextual Info: 512K X 16/1M X 8 BIT CMOS MASK ROM HY23C08200 Description The HY23C08200 high performance read only memory is organized either as 1,048,576 x 8 bit byte mode or as 524,288 x 16 bit(word mode) followed by BHE mode select. The low power feature allows the battery

500MIL

Abstract: 28550
Contextual Info: 512K X 16/1M X 8 BIT CMOS MASK ROM HY23V08200 Description The HY23V08200 high performance read only memory is organized either as 1,048,576 x 8 bit byte mode or as 524,288 x 16 bit(word mode) followed by BHE mode select. The low power feature allows the battery

Contextual Info: 512K X 16/1M X 8 BIT CMOS MASK ROM HY23W08200 Description The HY23W08200 high performance read only memory is organized either as 1,048,576 x 8 bit byte mode or as 524,288 x 16 bit(word mode) followed by BHE mode select. The low power feature allows the battery