VSC71XX Search Results

vsc7107

Abstract: CA500 5D215 7106 G52079-0 R1019 36oc
Contextual Info: VITESSE VSC7105/7106 Data Sheet 1.0625 Gbit/sec Transmitter/Receiver Chipset for Fibre Channel or Proprietary Serial Links Features • ANSI X3T11 Fibre Channel Compatible at 1.0625 Gbit/s • On-chip Fully Monolithic Clock Recovery and Clock Multiplication Circuits Require

Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Data Sheet Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays VSC7121 Description • Supports ANSI X3T11 1.0625 Gbit/sec • TTL Bypass Select FC-AL Disk Attach for Resiliency . High Speed, PECL I/O’s Referenced to VDD.

vsc710

Contextual Info: VITESSE V S C 7 1 0 1 /V 5 C 7 1 0 2 1.06 Of 1.25 O h /s Ttonsmitf&r/Recejy&r Chtpsef for Frbr& Channel or Proprietory Serial links FEATURES • Parallel data inputs registered into transmitter synchronous with TCLK • Ten bit parallel PECL input • Up to 1.25 Gbits/sec serial link data rate

vsc710

Contextual Info: PRELIMINARY DATA SHEET 7/1/92 G-TAXIchips VITESSE TM VSC7101/VSC7102/VSC7103/VSC7104 SEMICONDUCTOR CORPORATION 1.25 Gbits/sec Data Communications Chipset G-TAXIchip Features General Description • Compatible with ANSI X3T9.3 Fiber Channel Standard The G-TAXIchips are a general purpose inter­

m 7106

Abstract: R1019
Contextual Info: VITESSE VSC7105/7106 Data Sheet 1.0625 Gbit/sec Transmitter/Receiver Chipset for Fibre Channel or Proprietary Serial Links • ANSI X3T11 Fibre Channel Compatible at 1.0625 Gbit/s • On-chip Fully Monolithic Clock Recovery and Clock Multiplication Circuits Require

AN-20

Abstract: VSC7121 VSC7121QM
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Data Sheet Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays VSC7121 Description • Supports ANSI X3T11 1.0625 Gbit/sec FC-AL Disk Attach for Resiliency • TTL Bypass Select • Fully Differential for Minimum

Contextual Info: SEMICONDUCTOR CORPORATION Data Sheet Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays VSC7121 Description • Supports ANSI X3T11 1.0625 Gbit/sec • TTL Bypass Select FC-AL Disk Attach for Resiliency . High Speed, PECL I/O’s Referenced to VDD.

lr2 d13

Abstract: VSC7107 lr2 d23 LR3 D13 LR2 D33 LR2 D16 T0900
Contextual Info: VITESSE VSC7107 Preliminary Data Sheet High Performance Encoder/Decoder for Fibre Channel or Proprietary Serial Links Features • Full ANSI X3T11 Fibre Channel FC Compatibility • Simplex (100 MByte/s) or Duplex (200 MByte/s) Mode Operation • 8B/10B Encoding/Decoding

g5209

Abstract: VSC7115QJ
Contextual Info: VITESSE VSC7115/7116 Data Sheet 1.0625 Gbit/sec Fibre Channel Transmitter/Receiver Chipset Features • ANSI X3T11 Fibre Channel Compatible at 1.0625 Gbps • Compliant With FCSI Gigabaud Link Module Specification • On-chip Clock Multiplication Relieves

8 channel RC transmitter and Receiver circuit DIA

Abstract: VSC7106
Contextual Info: VITESSE VSC7105/VSC7106 1,0625 G b/s Transmitter/Receiver Chipset for Fibre Channel or Proprietary Serial Links FEATURES • ANSI X3T11 Fibre Channel Compatible at 1.0625 Gb/s • On Chip Fully Monolithic Clock Recovery and Clock Multiplication Circuits Require

5D215

Abstract: 5D104
Contextual Info: VITESSE V 5 C 7 1 0 7 High Performance Encoder/Decoder Preliminary Data Sheet FEATURES • Full A N S I X3T11 Fibre Channel FC Compatibility • 8B/10B Encoding/Decoding • 32 or 16 bit Synchronous FIFO System Interface • 20 bit Encoded Transmission Character

lr2 d13

Abstract: vsc7107 D174A LR3 D13 30PFL
Contextual Info: VSC7107 Preliminary Data Sheet High Performance Encoder/Decoder for Fibre Channel or Proprietary Serial Links Features • Full ANSI X3T11 Fibre Channel FC Compatibility Simplex (100 MByte/s) or Duplex (200 MByte/s) Mode Operation • 8B/10B Encoding/Decoding

5D215

Contextual Info: VITESSE VSC7107 Preliminary Data Sheet High Performance Encoder/Decoder for Fibre Channel or Proprietary Serial Links Features • Full ANSI X 3T11 Fibre Channel FC Compatibility • 8B/10B Encoding/Decoding • 32 or 16 bit Synchronous FIFO System Interface