VM MARKING CODE SOT353 Search Results

XC7SET125GV

Abstract: JESD22-A114E MO-203 XC7SET125
Contextual Info: XC7SET125 Bus buffer/line driver; 3-state Rev. 01 — 4 September 2009 Product data sheet 1. General description XC7SET125 is a high-speed Si-gate CMOS devices. It provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable

sot753 marking 13

Abstract: JESD22-A114E MO-203 XC7SH125GV XC7SH125
Contextual Info: XC7SH125 Bus buffer/line driver; 3-state Rev. 01 — 4 September 2009 Product data sheet 1. General description XC7SH125 is a high-speed Si-gate CMOS device. It provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE .

Contextual Info: 74HC1G125-Q100; 74HCT1G125-Q100 Bus buffer/line driver; 3-state Rev. 1 — 18 June 2013 Product data sheet 1. General description The 74HC1G125-Q100; 74HCT1G125-Q100 is a single buffer/line driver with 3-state output. Inputs include clamp diodes. This enables the use of current limiting resistors to

JESD87

Abstract: v25 sot353 VM MARKING CODE SOT353 74LVC1G125GV AN10161
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC1G125 Bus buffer/line driver; 3-state Product specification Supersedes data of 2002 May 28 2002 Nov 18 Philips Semiconductors Product specification Bus buffer/line driver; 3-state 74LVC1G125 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V

Contextual Info: 74LVC1G125 Bus buffer/line driver; 3-state Rev. 10 — 7 December 2011 Product data sheet 1. General description The 74LVC1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A HIGH-level at pin OE

JESD22-A114E

Abstract: MO-203 XC7SET86GV
Contextual Info: XC7SET86 2-input EXCLUSIVE-OR gate Rev. 01 — 7 September 2009 Product data sheet 1. General description XC7SET86 is a high-speed Si-gate CMOS device. It provides a 2-input EXCLUSIVE-OR function. 2. Features • Symmetrical output impedance ■ High noise immunity

74LVC1G125

Abstract: 74LVC1G125GF 74LVC1G125GM 74LVC1G125GV 74LVC1G125GW JESD22-A114-F SOT353-1 74LVC1G125GS
Contextual Info: 74LVC1G125 Bus buffer/line driver; 3-state Rev. 9 — 29 December 2010 Product data sheet 1. General description The 74LVC1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A HIGH-level at pin OE

SOT753

Abstract: JESD22-A114E MO-203
Contextual Info: XC7SH86 2-input EXCLUSIVE-OR gate Rev. 01 — 7 September 2009 Product data sheet 1. General description XC7SH86 is a high-speed Si-gate CMOS device. It provides a 2-input EXCLUSIVE-OR function. 2. Features • Symmetrical output impedance ■ High noise immunity

Contextual Info: XC7SET32 2-input OR gate Rev. 01 — 3 September 2009 Product data sheet 1. General description XC7SET32 is a high-speed Si-gate CMOS device. It provides a 2-input OR function. 2. Features • Symmetrical output impedance ■ High noise immunity ■ ESD protection:

sot753

Abstract: sot753 marking 13 JESD22-A114E MO-203
Contextual Info: XC7SET32 2-input OR gate Rev. 01 — 3 September 2009 Product data sheet 1. General description XC7SET32 is a high-speed Si-gate CMOS device. It provides a 2-input OR function. 2. Features • Symmetrical output impedance ■ High noise immunity ■ ESD protection:

JESD22-A114E

Abstract: MO-203
Contextual Info: XC7SH32 2-input OR gate Rev. 01 — 2 September 2009 Product data sheet 1. General description XC7SH32 is a high-speed Si-gate CMOS device. It provides a 2-input OR function. 2. Features • Symmetrical output impedance ■ High noise immunity ■ ESD protection:

Contextual Info: XC7SET86 2-input EXCLUSIVE-OR gate Rev. 01 — 7 September 2009 Product data sheet 1. General description XC7SET86 is a high-speed Si-gate CMOS device. It provides a 2-input EXCLUSIVE-OR function. 2. Features • Symmetrical output impedance ■ High noise immunity

Contextual Info: XC7SH86 2-input EXCLUSIVE-OR gate Rev. 01 — 7 September 2009 Product data sheet 1. General description XC7SH86 is a high-speed Si-gate CMOS device. It provides a 2-input EXCLUSIVE-OR function. 2. Features • Symmetrical output impedance ■ High noise immunity

74LVC1G125GW

Abstract: 74LVC1G125 74LVC1G125GF 74LVC1G125GM 74LVC1G125GV VM MARKING CODE SOT353
Contextual Info: 74LVC1G125 Bus buffer/line driver; 3-state Rev. 8 — 24 August 2010 Product data sheet 1. General description The 74LVC1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A HIGH-level at pin OE

Contextual Info: 74CBTLV1G125 Single bus switch Rev. 3 — 15 December 2011 Product data sheet 1. General description The 74CBTLV1G125 provides a single high-speed line switch. The switch is disabled when the output enable OE input is high. To ensure the high-impedance OFF-state during power up or power down, OE should be

74AHC1G126GV

Abstract: 74AHC1G126 74AHC1G126GW 74AHCT1G126 74AHCT1G126GV 74AHCT1G126GW JESD22-A114E AHC* marking
Contextual Info: 74AHC1G126; 74AHCT1G126 Bus buffer/line driver; 3-state Rev. 07 — 17 June 2009 Product data sheet 1. General description 74AHC1G126 and 74AHCT1G126 are high-speed Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by

V6 marking code

Abstract: 74LVC1G125GM
Contextual Info: 74LVC1G125 Bus buffer/line driver; 3-state Rev. 11 — 2 July 2012 Product data sheet 1. General description The 74LVC1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A HIGH-level at pin OE

v08 smd marking code

Abstract: NXP date code marking nxp Standard Marking SOT1202 SOT1115 marking nxp package 74LVC1G08GW
Contextual Info: 74LVC1G08 Single 2-input AND gate Rev. 8 — 19 October 2010 Product Specification 1. General description The 74LVC1G08 provides one 2-input AND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.

Contextual Info: 74LVC1G00 SINGLE 2 INPUT POSITIVE NAND GATE Description Pin Assignments Top View The 74LVC1G00 is a single 2-input positive NAND gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V

Contextual Info: XC7SET14 Inverting Schmitt trigger Rev. 01 — 31 August 2009 Product data sheet 1. General description XC7SET14 is a high-speed Si-gate CMOS device. It provides an inverting buffer function with Schmitt trigger action. This device is capable of transforming slowly changing input

JESD22-A114E

Abstract: MO-203 XC7SET14 XC7SET14GW
Contextual Info: XC7SET14 Inverting Schmitt trigger Rev. 01 — 31 August 2009 Product data sheet 1. General description XC7SET14 is a high-speed Si-gate CMOS device. It provides an inverting buffer function with Schmitt trigger action. This device is capable of transforming slowly changing input

VM MARKING CODE SOT353

Contextual Info: 74LVC1G125-Q100 Bus buffer/line driver; 3-state Rev. 1 — 9 July 2012 Product data sheet 1. General description The 74LVC1G125-Q100 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A HIGH-level at pin OE

74AHCT1G125GV

Abstract: AM SOT353 74ahct1g125 sot753 74AHC1G125 74AHC1G125GV 74AHC1G125GW 74AHCT1G125 74AHCT1G125GW JESD22-A114E
Contextual Info: 74AHC1G125; 74AHCT1G125 Bus buffer/line driver; 3-state Rev. 08 — 9 April 2009 Product data sheet 1. General description 74AHC1G125 and 74AHCT1G125 are high-speed Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by

AHCT1G125

Abstract: 74AHC1G125 74AHC1G125GV 74AHC1G125GW 74AHCT1G125 74AHCT1G125GV 74AHCT1G125GW JESD22-A114E AM SOT353 74AHC 250
Contextual Info: 74AHC1G125; 74AHCT1G125 Bus buffer/line driver; 3-state Rev. 09 — 22 June 2009 Product data sheet 1. General description 74AHC1G125 and 74AHCT1G125 are high-speed Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by