verilog image processing filtering
Abstract: vhdl code for discrete wavelet transform verilog code image processing filtering dwt verilog code vhdl code for dwt transform wavelet transform verilog verilog code for dwt transform verilog code for discrete wavelet transform frame buffer vhdl XIP2013
Contextual Info: LB_2DFDWT – Line-Based Programmable Forward DWT November 16, 2001 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core CAST, Inc. Documentation Design File Formats 11 Stonewall Court Woodcliff Lake, NJ 07677 USA Phone: 201-391-8300
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verilog image processing filteringvhdl code for discrete wavelet transformverilog code image processing filteringdwt verilog code+6vhdl code for dwt transformwavelet transform verilogverilog code for dwt transformverilog code for discrete wavelet transformframe buffer vhdlxip2013
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verilog code for 2-d discrete wavelet transform
Abstract: wavelet transform verilog vhdl code for discrete wavelet transform jpeg encoder vhdl code source code verilog for park transformation dwt verilog code verilog source code for park transformation xilinx dwt image compression verilog code for dwt transform verilog code for amba ahb bus
Contextual Info: CS6510 TM JPEG2000 Encoder Virtual Components for the Converging World The CS6510 JPEG2000 Encoder is a high performance application specific solution enabling leading edge image compression and transmission applications. The core is fully compliant with the ISO/IEC 15444-1 JPEG2000
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cs6510jpeg2000720x480ds6510+10verilog code for 2-d discrete wavelet transformwavelet transform verilogvhdl code for discrete wavelet transformjpeg encoder vhdl codesource code verilog for park transformationdwt verilog codeverilog source code for park transformationxilinx dwt image compressionverilog code for dwt transformverilog code for amba ahb bus
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verilog code for 2-d discrete wavelet transform
Abstract: XAPP921c simulink universal MOTOR in matlab turbo encoder model simulink matched filter simulink simulink model for kalman filter using vhdl umts simulink fpga based wireless jamming networks dvb-rcs chip XAPP569
Contextual Info: XtremeDSP Solutions Selection Guide March 2008 INTRODUCTION Contents DSP System Solutions.4 DSP Devices.17 Development Tools.25 Complementary Solutions.33 Resources.35
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verilog code for 2-d discrete wavelet transformxapp921csimulink universal motor in matlabturbo encoder model simulink+6matched filter simulinksimulink model for kalman filter using vhdlumts simulinkfpga based wireless jamming networksdvb-rcs chipxapp569
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vhdl code for DES algorithm
Abstract: XAPP921c FLOATING POINT PROCESSOR TMSC6000 pulse compression radar fir filter matlab code LMS adaptive filter simulink model verilog code for lms adaptive equalizer for audio LMS simulink 3SD1800A XILINX vhdl code REED SOLOMON encoder decoder fir filter with lms algorithm in vhdl code
Contextual Info: XtremeDSP Solutions Selection Guide June 2008 Introduction Contents DSP System Solutions.4 DSP Devices.17 Development Tools.25 Complementary Solutions.33 Resources.35
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vhdl code for des algorithmxapp921cfloating point processor tmsc6000pulse compression radar fir filter matlab code+6lms adaptive filter simulink modelverilog code for lms adaptive equalizer for audiolms simulink3sd1800axilinx vhdl code reed solomon encoder decoderfir filter with lms algorithm in vhdl code
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on Costas Loop on FPGA
Abstract: wavelet transform simulink qam by simulink matlab 16 qam demodulator vhdl code for discrete wavelet transform xilinx vhdl code vhdl code for qam DS-SYSGEN-4SL-PC SRL16 project simulink
Contextual Info: Push-button Performance using System Generator for DSP Push-button bitstream generation from Simulink to FPGA Xilinx FPGAs have become the preferred choice for many highperformance, programmable DSP applications. However, you may not be familiar with our FPGA
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on costas loop on fpgawavelet transform simulinkqam by simulink matlab16 qam demodulator+6vhdl code for discrete wavelet transformxilinx vhdl codevhdl code for qamds-sysgen-4sl-pcsrl16project simulink
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free vHDL code of median filter
Abstract: free verilog code of median filter verilog code for UART with BIST capability verilog code for 2D linear convolution rx UART AHDL design verilog code for 2D linear convolution filtering vhdl median filter verilog code for median filter 8051 interface ppi 8255 vhdl code direct digital synthesizer
Contextual Info: AMPP Catalog February 1997 About this Catalog February 1997 AMPP Catalog Contents This catalog describes the Altera® Megafunction Partners Program AMPP . The catalog also provides megafunction descriptions and partner profiles for each AMPP partner. The information in this catalog is
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free vhdl code of median filterfree verilog code of median filterverilog code for uart with bist capabilityverilog code for 2d linear convolution+6rx uart ahdl designverilog code for 2d linear convolution filteringvhdl median filterverilog code for median filter8051 interface ppi 8255vhdl code direct digital synthesizer
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wavelet transform simulink
Abstract: on Costas Loop on FPGA 16 qam demodulator vhdl code for discrete wavelet transform wavelet transform verilog QAM verilog matlaB SRL16 wavelet transform FPGA costas loop
Contextual Info: System Generator for DSP A Powerful High-level DSP Modeling Environment Xilinx FPGAs have become the preferred choice for many highperformance, programmable DSP applications. However, you may not be familiar with our usual FPGA design tools and processes, and you
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wavelet transform simulinkon costas loop on fpga16 qam demodulatorvhdl code for discrete wavelet transform+6wavelet transform verilogqam verilogmatlabsrl16wavelet transform fpgacostas loop
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verilog code for 2D linear convolution
Abstract: verilog code for GPS correlator vhdl code numeric controlled oscillator pipeline rx UART AHDL design verilog code car parking free verilog code of median filter verilog code for 2D linear convolution filtering verilog code for median filter 16 QAM modulation verilog code LED Dot Matrix vhdl code
Contextual Info: AMPP Catalog February 1997 AMPP Catalog February 1997 M-CAT-AMPP-02 Altera, AHDL, AMPP, OpenCore, MAX, MAX+PLUS, MAX+PLUS II, FLEX, FLEX 10K, FLEX 8000, MAX 9000, MAX 7000, EPF10K10, EPF10K20, EPF10K30, EPF10K40, EPF10K50, EPF10K70, EPF10K100, EPF8282, EPF82828A, EPF8452, EPF8452A, EPF8636A, EPF8820, EPF8820A, EPF8118,
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m-cat-ampp-02epf10k10epf10k20epf10k30+16epf10k40epf10k50epf10k70epf10k100epf8282epf82828averilog code for 2d linear convolutionverilog code for gps correlatorvhdl code numeric controlled oscillator pipelinerx uart ahdl designverilog code car parkingfree verilog code of median filterverilog code for 2d linear convolution filteringverilog code for median filter16 qam modulation verilog codeled dot matrix vhdl code
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ip based cctv systems
Abstract: ddr2 rad hard jpeg encoder vhdl code vhdl code for dwt transform DWT image compression Altera vhdl code for discrete wavelet transform jpeg2000 encoder vhdl code jpeg encoder RTL IP core JPEG2K-E JPEG2000
Contextual Info: JPEG 2000 compliance Both lossless and lossy compression JPEG2K-E Error-resilient compression JPEG 2000 Encoder Core Headers syntax processing The JPEG2K-E core is a complete high performance JPEG2000 - ISO/IEC 15444-1 image compression solution targeted for video and high bandwidth image compression
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jpeg2000ip based cctv systemsddr2 rad hardjpeg encoder vhdl code+6vhdl code for dwt transformdwt image compression alteravhdl code for discrete wavelet transformjpeg2000 encoder vhdl codejpeg encoder rtl ip corejpeg2k-e
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jpeg encoder vhdl code
Abstract: xilinx dwt image compression vhdl code for dwt transform DWT image compression xilinx wavelet transform FPGA JPEG2000 ip based cctv systems
Contextual Info: JPEG 2000 compliance Both lossless and lossy compression JPEG2K-E Error-resilient compression JPEG 2000 Encoder Core Headers syntax processing The JPEG2K-E core is a complete high performance JPEG2000 - ISO/IEC 15444-1 image compression solution targeted for video and high bandwidth image compression
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jpeg2000xc4v160xc5vlx1551080p+6jpeg encoder vhdl codexilinx dwt image compressionvhdl code for dwt transformdwt image compression xilinxwavelet transform fpgaip based cctv systems
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jpeg encoder vhdl code
Abstract: vhdl code for dwt transform vhdl code for discrete wavelet transform EP2AGX190 EP2S90 EP3C55 EP4SGX70 JPEG2000 ip based cctv systems altera dwt image compression
Contextual Info: JPEG 2000 compliance Both lossless and lossy compression JPEG2K-E Error-resilient compression JPEG 2000 Encoder Megafunction Headers syntax processing The JPEG2K-E megafunction is a complete high performance JPEG2000 - ISO/IEC 15444-1 image compression solution targeted for video and high bandwidth image
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jpeg20001080pep2agx190-4ep3c55+8ep2s90ep4sgx70jpeg encoder vhdl codevhdl code for dwt transformvhdl code for discrete wavelet transformep2agx190ip based cctv systemsaltera dwt image compression
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lms algorithm using verilog code
Abstract: lms algorithm using vhdl code ATM machine working circuit diagram using vhdl verilog code for lms adaptive equalizer verilog code for lms adaptive equalizer for audio digital IIR Filter VHDL code 8086 microprocessor based project verilog DTMF decoder qpsk demodulation VHDL CODE verilog code for fir filter using DA
Contextual Info: AMPP Catalog June 1998 About this Catalog June 1998 AMPP Catalog Contents This catalog provides information on Altera Megafunction Partners Program AMPPSM partners and provides descriptions of megafunctions from each AMPP partner. The information in this catalog is current as of
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lms algorithm using verilog codelms algorithm using vhdl codeatm machine working circuit diagram using vhdlverilog code for lms adaptive equalizer+6verilog code for lms adaptive equalizer for audiodigital iir filter vhdl code8086 microprocessor based projectverilog dtmf decoderqpsk demodulation vhdl codeverilog code for fir filter using da
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DWT image compression xilinx
Abstract: xilinx dwt image compression vhdl code for dwt transform jpeg encoder vhdl code cctv wavelet jpeg 2000 JPEG2000 720p30fps CCTV wireless functional diagram vhdl code for discrete wavelet transform
Contextual Info: JPEG 2000 Encoder JPEG2K-E February 21, 2008 Product Specification AllianceCORE Facts CAST, Inc. Provided with Core Documentation 11 Stonewall Court Woodcliff Lake, NJ 07677 USA Phone: +1-201-391-8300 Fax: +1-201-391-8694 E-mail: info@cast-inc.com www.cast-inc.com
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jpeg2000dwt image compression xilinxxilinx dwt image compressionvhdl code for dwt transform+6jpeg encoder vhdl codecctv waveletjpeg 2000720p30fpscctv wireless functional diagramvhdl code for discrete wavelet transform
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verilog code for BPSK
Abstract: verilog code for 2D linear convolution filtering verilog code for discrete linear convolution ep330 PLMQ7192/256-160NC convolution Filter verilog HDL code AN-084 EPC1PC8 EPM7160 Transition verilog code image processing filtering
Contextual Info: Newsletter for Altera Customers ◆ Second Quarter ◆ May 1997 Altera Announces MAX Roadmap with 3.3-V, ISP-Capable Michelangelo Family Altera recently unveiled plans for the next-generation MAX programmable logic device PLD family, code-named Michelangelo.
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35micronverilog code for bpskverilog code for 2d linear convolution filteringverilog code for discrete linear convolution+7ep330plmq7192/256-160ncconvolution filter verilog hdl codean-084epc1pc8epm7160 transitionverilog code image processing filtering
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vhdl code for ofdm transceiver using QPSK
Abstract: soft 16 QAM modulation matlab code verilog code for ofdm transmitter dac 0808 interfacing with 8051 microcontroller vhdl code for ofdm transmitter VHDL PROGRAM for ofdm turbo codes matlab simulation program 16 QAM adaptive modulation matlab E1 pdh vhdl uart 16750
Contextual Info: Intellectual Property Selector Guide IP Functions for System-on-a-Programmable-Chip Solutions March 2003 Contents • Introduction to Altera IP Megafunctions Page 3 • DSP Solutions Page 5 • Communications Solutions Page 11 • Microsystems Solutions Page 16
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arm922tvhdl code for ofdm transceiver using qpsksoft 16 qam modulation matlab codeverilog code for ofdm transmitter+7dac 0808 interfacing with 8051 microcontrollervhdl code for ofdm transmittervhdl program for ofdmturbo codes matlab simulation program16 qam adaptive modulation matlabe1 pdh vhdluart 16750
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manual SPARTAN-3 XC3S400 evaluation kit
Abstract: hcl l21 usb power supply circuit diagram verilog code for Modified Booth algorithm vhdl code for lcd of spartan3E UG331 TT 2222 Horizontal Output Transistor pins out dia verilog for 8 point fft using FPGA spartan3 vhdl code for ldpc decoder types of multipliers ge fanuc cpu 331
Contextual Info: Spartan-3 Generation FPGA User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG331 v1.7 August 19, 2010 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development
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ug331guides/ug332manual spartan-3 xc3s400 evaluation kithcl l21 usb power supply circuit diagram+7verilog code for modified booth algorithmvhdl code for lcd of spartan3ett 2222 horizontal output transistor pins out diaverilog for 8 point fft using fpga spartan3vhdl code for ldpc decodertypes of multipliersge fanuc cpu 331
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vhdl code for lcd of spartan3E
Abstract: verilog code for Modified Booth algorithm vhdl code for rs232 receiver ge fanuc cpu 331 ug331 vhdl ethernet spartan 3a spartan 3e vga ucf barco 16 BIT ALU design with verilog/vhdl code TUTORIALS xilinx FFT
Contextual Info: Spartan-3 Generation FPGA User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG331 v1.5 January 21, 2009 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development
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ug331guides/ug332vhdl code for lcd of spartan3everilog code for modified booth algorithm+7vhdl code for rs232 receiverge fanuc cpu 331vhdl ethernet spartan 3aspartan 3e vga ucfbarco16 bit alu design with verilog/vhdl codetutorials xilinx fft
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UG331
Abstract: CWda04 XAPP256 manual SPARTAN-3 XC3S400 evaluation kit vhdl code for rs232 receiver hcl l21 usb power supply circuit diagram hcl p38 CIRCUIT diagram R80515 XC3SD1800A-FG676 vhdl ethernet spartan 3a
Contextual Info: Spartan-3 Generation FPGA User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG331 v1.6 December 3, 2009 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development
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ug331guides/ug332cwda04xapp256+7manual spartan-3 xc3s400 evaluation kitvhdl code for rs232 receiverhcl l21 usb power supply circuit diagramhcl p38 circuit diagramr80515xc3sd1800a-fg676vhdl ethernet spartan 3a
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pure sine wave dimmer
Abstract: philips ingenuity ct transistor smd DAG heart beat sensor using led and ldr north american philips controls stepper motor CPLD Complex Programmable Logic Devices vhdl code for msk modulation fm transistor radio mini project ccga motorola biphase mark vhdl
Contextual Info: Analog Devices’ Glossary of Analog Terminology □ ANALOG DEVICES Analog Devices’ Glossary of Analog Terminology ANALOG DEVICES □ Words are included in this book on the basis of their usage. Words that are known to have current trademarks include appropriate
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10base-510base-t16-bit32-bit+1148-bitpure sine wave dimmerphilips ingenuity cttransistor smd dagheart beat sensor using led and ldrnorth american philips controls stepper motorcpld complex programmable logic devicesvhdl code for msk modulationfm transistor radio mini projectccga motorolabiphase mark vhdl
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5AGX
Abstract: lpddr2 tutorial EP4CE22F17 solomon 16 pin lcd display 16x2 Altera MAX V CPLD DE2-70 vhdl code for dvb-t 2 fpga based 16 QAM Transmitter for wimax application with quartus altera de2 board sd card AL460A-7-PBF
Contextual Info: Version 11.0 Altera Product Catalog Contents Glossary. 2 Stratix FPGA Series. 3 HardCopy® ASIC Series. 17 Arria® FPGA Series. 21
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sg-prdct-115agxlpddr2 tutorialep4ce22f17+7solomon 16 pin lcd display 16x2altera max v cpldde2-70vhdl code for dvb-t 2fpga based 16 qam transmitter for wimax application with quartusaltera de2 board sd cardal460a-7-pbf
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Nokia 7110 lcd
Abstract: lcd nokia 6300 nokia 7110 LM 7804 Marvell 8686 sti7000 quad isolated dc/dc converter 710 BURR BROWN hp laptop battery pack pinout nokia 6300 LCD DC-DC Converter Burr-Brown 710
Contextual Info: specialsection Thousands of new electronic products come along every honor for a product to make the list. Our purpose, though, year. All, no doubt, are useful, and many are innovative, isn't to bestow honors but to report on the year's accom- yet only a relative few generate real excitement. At EDN,
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420-vanokia 7110 lcdlcd nokia 6300nokia 7110+7lm 7804marvell 8686sti7000quad isolated dc/dc converter 710 burr brownhp laptop battery pack pinoutnokia 6300 lcddc-dc converter burr-brown 710
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ERICSSON RBS 6000
Abstract: Ericsson RBS 6102 Ericsson Installation guide for RBS 6000 RBS 2216 ericsson maintenance RBS 2216 ericsson user manual Ericsson RBS 6102 hardware reference manual siemens mid-96 RBS ericsson user manual RBS 6102 Rack rbs ericsson 6102 rbs 6102
Contextual Info: TMS320 Third-Party Support Reference Guide IMPORTANT NOTICE Description in this publication of a third-party product or service does not constitute an endorsement of it by Texas Instruments. Further, TI does not accept responsibility for any representations
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tms320ericsson rbs 6000ericsson rbs 6102ericsson installation guide for rbs 6000+7rbs 2216 ericsson maintenancerbs 2216 ericsson user manualericsson rbs 6102 hardware reference manualsiemens mid-96rbs ericsson user manual rbs 6102rack rbs ericsson 6102rbs 6102
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ecu repair
Abstract: TMS320C40 DSProto32 features and architecture of tms320c6x colour tv power supply circuit diagram DBV44 International Semiconductor 1981 DS1003 dSPACE FPGA LABVIEW engine ecu tms320 modulation projects
Contextual Info: T H E W O R L D L E A D E R I N D S P S O L U T I O N S TI DSP THIRD-PARTY DEVELOPMENT SUPPORT GUIDE TMS320 Third-Party Development Support Guide IMPORTANT NOTICE Important Notice Texas Instruments TI reserves the right to make changes to its products or to discontinue
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tms320cex-32386-0ecu repairtms320c40+8dsproto32features and architecture of tms320c6xcolour tv power supply circuit diagramdbv44international semiconductor 1981ds1003 dspacefpga labview engine ecutms320 modulation projects
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china nobel tv diagram
Abstract: 4kw sine wave inverter circuit diagram ivory 21 colour television schematics PLC projects smart home DS1102 DSP Controller Board intel 945 motherboard schematic diagram sdk audio amplifier 4141 ecu repair TMS320C40 dallas semiconductor IC DS 1242
Contextual Info: T H E W O R L D L E A D E R I N D S P S O L U T I O N S TI DSP THIRD-PARTY DEVELOPMENT SUPPORT GUIDE TMS320 Third-Party Development Support Guide IMPORTANT NOTICE Important Notice Texas Instruments TI reserves the right to make changes to its products or to discontinue
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tms320cex-32386-0china nobel tv diagram4kw sine wave inverter circuit diagram+8ivory 21 colour television schematicsplc projects smart homeds1102 dsp controller boardintel 945 motherboard schematic diagramsdk audio amplifier 4141ecu repairtms320c40dallas semiconductor ic ds 1242
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