V9 69 Search Results

Contextual Info: OMAP3515/03 Applications Processor www.ti.com SPRS505F – FEBRUARY 2008 – REVISED SEPTEMBER 2009 1 OMAP3515/03 Applications Processor 1.1 Features • • • OMAP3515/03 Applications Processor: – OMAP 3 Architecture – MPU Subsystem • Up to 720-MHz ARM Cortex™-A8 Core

mipi PCB layout

Abstract: XDS100V2 sdram pcb layout guide 8MB SDRAM MIPI reference manual 8Mb SDRAM 5.0v memory HALCOGEN JTAG connector 10x2 JTAG header 10x2 Connector XDS100
Contextual Info: RM48 HDK USER GUIDE RM48 HDK User Guide Table of Contents RM48 HDK . 1 USER GUIDE . 1

CQFP352

Abstract: QFP352 MCGA349 MCGA-349 adc controller vhdl code atmel 268 AT7913 CQFP352 package vhdl code 64 bit FPU SPARC v8 architecture BLOCK DIAGRAM
Contextual Info: ATMEL AT7913E SpaceWire Remote Terminal Controller RTC DATASHEET Features • LEON2-FT Sparc V8 Processor • • • • • • • • • • • 5 stage pipeline 4K instruction caches / 4K data caches Meiko FPU Interrupt Controller Uart serial links

AM37xx

Abstract: SPRS616F bt.656 to MIPI digital cvbs encoder 640 480 RGB mipi bridge Cortex-A8 MIPI E2 nand flash 683 Transistor
Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture

Contextual Info: Rev. 1.21. Apr. 2012 M474B5173BH0 M474B1G73BH0 204pin Unbuffered ECC SODIMM based on 4Gb B-die 78FBGA with Lead-Free & Halogen-Free RoHS compliant datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE.

TA8655an

Abstract: sine wave inverter using pic sif 96 voltmeter sine wave inverter pic tcw7
Contextual Info: TOSHIBA TA8655AN TENTATIVE Unit: mm 1-CHIP NTSC COLO R T V TA8 65 5AN is an Î1TSC 1-chip IC for color TV featuring the structure of collectively incorporating PIF circuits, SIF circuits, and video/chroma deflection circuits in a compact 64-pin package. P IF C IR C U IT S

TA8659N

Abstract: 503F2 ta8659an ta8659 toshiba TA8615N 2B64B TA8615N TC-050 tv pattern generator PM 5418 ta8615
Contextual Info: TOSHIBA TA8659AN TENTATIVE Unit: mm M U L T IC O L O R V ID E O - C H R O M A - D E F L E C T IO N The TA8 659AN is an NTSC/PAL/SECAM video-chroma-deflect ion subsystem with a teletext interface circuit. The TA8659N includes all of the functions required to realize a multicolor CTV in

CAD15-CAD8

Contextual Info: PCI1250A PC CARD CONTROLLER XCPS014 -D E C E M B E R 1997 * Peripheral Component Interconnect PCI Power Management Compliant • Supports Zoom Video With Internal Buffering • ACP11.0 Compliant • Programmable Output Select for CLKRUN • Packaged in 256-Pin BGA

TMP86CM74AFG

Contextual Info: 8 Bit Microcontroller TLCS-870/C Series TMP86CM74AFG The information contained herein is subject to change without notice. 021023_D TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and

automatic light dimmer based on temperature

Contextual Info: 8 Bit Microcontroller TLCS-870/C Series TMP86CK74AFG The information contained herein is subject to change without notice. 021023_D TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and

PCI1251B

Contextual Info: PCI1251B GFN/GJG PC CARD CONTROLLER SCPS043A – OCTOBER 1998 D D D D D D D D D D D D D D D D D PCI Power Management 1.0 Compliant ACPI 1.0 Compliant Packaged in GFN 256-Pin BGA or GJG MicroStar BGA PCI Local Bus Specification Revision 2.2 Compliant 1997 PC Card Standard Compliant

83c chipset

Contextual Info: Contents Section 1 2 3 Title Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

atmel 324

Abstract: ARM926EJ-S AT91SAM ISO7816 SAM9G45 AT91SAM9G45B-CU UHP4 ddr2 16bit NAND Flash controller ecc DFSDM
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDRAM/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static

LUPA-1300-2

Abstract: LUPA1300-2 AN57864 AN54468 ke63 CHN 816 Color Filter Array CFA transistor CHN 64 149 transistor CHN 64 229 -20/LUPA1300-2
Contextual Info: NOIL2SM1300A LUPA1300-2: High Speed CMOS Image Sensor Features • • • • • • • • • • • • • • • • 1280 x 1024 Active Pixels 14 mm X 14 mm Square Pixels 1.4” Optical Format Monochrome or Color Digital Output 500 fps Frame Rate

LUPA-3000

Abstract: switch Signal LUX L4 LUPA3000 AN57864 CMOS global shutter b1000001 Color Filter Array CFA schematic diagram ip camera
Contextual Info: NOIL1SN3000A LUPA3000: 3 MegaPixel High Speed CMOS Sensor Features • • • • • • • • • • • • • • • • 1696 x 1710 Active Pixels 8 mm x 8 mm Square Pixels 1.2 inch Optical Format Monochrome or Color Digital Output 485 Frames per Second fps Frame Rate

Contextual Info: SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D Controlled Baseline D D D D D D D D L1/L2 Memory Architecture − One Assembly/Test Site, One Fabrication

Contextual Info: SMJ320C6203 FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SGUS033 – FEBRUARY 2002 D High-Performance Fixed-Point Digital D D D D D Signal Processor DSP – SMJ320C62x – 5-ns Instruction Cycle Time – 200-MHz Clock Rate – Eight 32-Bit Instructions/Cycle

RJP 30 h1

Contextual Info: TMS320C6713B FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR SPRS294A − OCTOBER 2005 − REVISED NOVEMBER 2005 D Highest-Performance Floating-Point Digital D D D D D D Signal Processor DSP : TMS320C6713B − Eight 32-Bit Instructions/Cycle − 32/64-Bit Data Word

Contextual Info: TMS320C6712D FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005 D Low-Price/High-Performance Floating-Point D D D D D Digital Signal Processor DSP : TMS320C6712D − Eight 32-Bit Instructions/Cycle − 150-MHz Clock Rate

352-PIN

Abstract: TMS320C6202 TMS320C6202B
Contextual Info: TMS320C6202, TMS320C6202B FIXED-POINT DIGITAL SIGNAL PROCESSORS SPRS104I - OCTOBER 1999 - REVISED MARCH 2004 D High-Performance Fixed-Point Digital D D D D D D Signal Processors DSPs - TMS320C62x - 5-, 4-, 3.33-ns Instruction Cycle Time - 200-, 250-, 300-MHz Clock Rate

transistor marking WC 2C

Abstract: E22/6/AS7620/TMS320C6678/AS7620/NZT6728-datasheet
Contextual Info: TMS320C6678 SPRS691E—November 2010—Revised March 2014 Multicore Fixed and Floating-Point Digital Signal Processor Check for Evaluation Modules EVM : TMS320C6678 1 TMS320C6678 Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x

TXC07900AIBG

Abstract: TXC-07900AIBG TSOP transmitter B020H OED155TM TXC-07900-MB VTXP-6 AU-AIS dk12b EK117
Contextual Info: OED155 Device Dual STM-1 Overhead Terminator, Tributary Processor and Cross-Connect with Integrated E1 Mapper TXC-07900 PRODUCT PREVIEW DATA SHEET DESCRIPTION: ™ The Optimized Edge Device, OED155, is a dual STM-1 SDH framer and overhead terminator, virtual tributary

of TX6A RX6A

Abstract: RX6A tx2c transmitter RX6a 1211 TX1B TXC-06885 diode GFP AA tx6c TX5b rx5b Ethernet over SONET mapper
Contextual Info: Envoy -CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast Ethernet ports with extended buffers or 1 Gigabit Ethernet port (10/100/1000 Mbits/s)

Contextual Info: TMS320LF2407, TMS320LF2406, TMS320LF2402 DSP CONTROLLERS SPRS094E – APRIL 1999 – REVISED AUGUST 2000 D High-Performance Static CMOS Technology D D D D D External Memory Interface LF2407 – 33-ns Instruction Cycle Time (30 MHz) – 30 MIPS Performance