UWIRE HEADER CONNECTOR 2X5 Search Results

Contextual Info: SNAU118 LMK01801 Dual Clock Divider Buffer Evaluation Board Operating Instructions 7 December 2011 LMK01801 EVAL Texas Instruments, Inc. 1 LMK01801BEVAL Evaluation Board Operating Instructions SNAU118 Table of Contents TABLE OF CONTENTS . 2

circuit diagram of ADC connection to pic

Abstract: ADC14PIC KEMET CAP CER COG CHIP 0603 PIC controlled three phase AC inverter board design ADC14DS105 ADC14DS105KARB CWX823 c5859 LMH6552 LMK02000
Contextual Info: ADC14DS105KARB Near Zero-IF Receiver Reference Design Board LMH6552 + ADC14DS105 + LMK02000 User’s Guide N www.national.com Rev 0.2 Setpember 2007 ADC14DS105KARB Reference Design Board User’s Guide SPI_EN Jumper nd 2 Order Lowpass Filter Fc ≈ 35 MHz

Contextual Info: ADC14DS105KARB Near Zero-IF Receiver Reference Design Board LMH6552 + ADC14DS105 + LMK02000 User’s Guide N www.national.com Rev 0.2 Setpember 2007 ADC14DS105KARB Reference Design Board User’s Guide SPI_EN Jumper nd 2 Order Lowpass Filter Fc ≈ 35 MHz

Contextual Info: LMK03806 Evaluation Board User's Guide November 2013 SNAU075A LMK03806 Ultra-low Jitter Clock Generator with 14 Outputs Evaluation Board Operating Instructions 2 SNAU075A LMK3806 Evaluation Board Copyright 2013, Texas Instruments Incorporated November 2013

USB2ANY-UWIRE

Abstract: CRO2949A-LF
Contextual Info: LMK04906 Evaluation Board User's Guide January 2012 Literature Number SNAU126A Revised – December 2013 LMK04906 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Evaluation Board Instructions 2 SNAU126A LMK04906 Family: Low-Noise Clock Jitter with Dual Loop PLLs

BR17

Contextual Info: LMX2541-xxxx Evaluation Board User's Guide September 2004 Literature Number SNAU067A Revised – January 2014 LMX2541xxxx Ultra Low Noise PLLatinum Frequency Synthesizer with Integrated VCO Evaluation Board Operating Instructions 2 SNAU067 LMX2541-xxxx Evaluation Board User’s Guide

LMX2531LQA

Abstract: C100 C101 C103 C104 C105 E5052 LMX2531 LMX25313010EVAL LMX2531LQ3010E
Contextual Info: LMX2531LQ3010E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX25313010EVAL Instructions Rev 6.24.2009 L M X 2 5 3 1 L Q 3 0 1 0 E E V A L U A T I O N

Contextual Info: L M K 0 4 8 1 6 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S LMK04816 Low-Noise Clock Jitter Cleaner with Dual Loop PLLs LMK04816 Evaluation Board Operating Instructions Texas Instruments June 2012 1 SNLU107 L M K 0 4 8 1 6 E V A L U A T I O N

C100

Abstract: C101 C103 C104 C105 E5052 LMX2531 LMX25312820EVAL LMX2531LQ2820E 4TH ORDER MODULATOR
Contextual Info: LMX2531LQ2820E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX25312820EVAL Instructions Rev 6.24.2009 L M X 2 5 3 1 L Q 2 8 2 0 E E V A L U A T I O N

Contextual Info: LMX2531LQ2820E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX25312820EVAL Instructions Rev 6.24.2009 L M X 2 5 3 1 L Q 2 8 2 0 E E V A L U A T I O N

4TH ORDER MODULATOR

Abstract: R19-R21 C0805C104K LMX2531LQA
Contextual Info: LMX2531LQ3010E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX25313010EVAL Instructions Rev 6.24.2009 L M X 2 5 3 1 L Q 3 0 1 0 E E V A L U A T I O N

YAGEO C0603 X7R

Abstract: KEMET CAP CER COG CHIP 0603 smd Variable resistor 10K ohm SMD RESISTOR 60 OHMS FERRITE L0603 KEMET 1NF 50V 20 SM 0603 0402 X7R 22NF 25v P9812 c2627 equivalent C84-85
Contextual Info: 1.0 Design Description This reference design implements a High IF Receiver circuit that utilizes an LMH6515 DVGA and ADC14V155 Analog to Digital Converter ADC . The design illustrates variable gain IF amplification and digitization in wireless infrastructure systems and frequency domain analyzers. This flexible subsystem provides excellent sensitivity for input signal frequencies

1470 LM

Abstract: usb LPT converter C100 C101 C102 C103 C104 C105 E5052 LMX2531
Contextual Info: LMX2531LQ1515E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1515EFPEB Rev 4.02.2008 L M X 2 5 3 1 L Q 1 3 1 2 E E V A L U A T I O N B O A R D

C100

Abstract: C101 C102 C103 C104 C105 E5052 LMX2531 LMX2531LQ1146E C102 M 932
Contextual Info: LMX2531LQ1146E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1146EFPEB Rev 3.31.2008 L M X 2 5 3 1 L Q 1 1 4 6 E E V A L U A T I O N B O A R D

1470 LM

Abstract: C100 C101 C102 C103 C104 C105 E5052 LMX2531 LMX2531LQ1415E
Contextual Info: LMX2531LQ1415E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1415EFPEB Rev 4.02.2008 L M X 2 5 3 1 L Q 1 3 1 2 E E V A L U A T I O N B O A R D

Kemet 100nF 25V

Abstract: C100 C101 C102 C103 C104 C105 E5052 LMX2531 LMX2531LQ1312E
Contextual Info: LMX2531LQ1312E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1312EFPEB Rev 4.02.2008 L M X 2 5 3 1 L Q 1 3 1 2 E E V A L U A T I O N B O A R D

c3940

Abstract: kemet capacitor C0603 r 1206, r0603 YAGEO R0603 C106-107 C142-143 L1008 SMD resistors 1806 NC7SZ04M5XCT-ND R91-92
Contextual Info: National Semiconductor RD-147 Data Conversions Applications October 2007 1.0 Design Description • Enables immediate evaluation of a quadrature direct conversion or near-zero IF receiver subsystem architecture • Demonstrates a receiver architecture commonly used in

atmel 735 24c02 software

Contextual Info: SP16160CH1RB High-IF Receiver Reference Design Board LMH6517 + ADC16DV160 + LMK04031B User’s Guide 1.0 Reference Board Overview 2 2.0 Evaluation Kit Contents 4 3.0 System Description 4 4.0 Data Capture 5 5.0 Quick Start 5 6.0 Functional Description 7 7.0 System Performance

usb to parallel port

Contextual Info: LMX2531LQ1515E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1515EFPEB Rev 4.02.2008 L M X 2 5 3 1 L Q 1 3 1 2 E E V A L U A T I O N B O A R D

Contextual Info: LMX2531LQ1312E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1312EFPEB Rev 4.02.2008 L M X 2 5 3 1 L Q 1 3 1 2 E E V A L U A T I O N B O A R D

Contextual Info: LMX2531LQ1226E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1226EFPEB Rev 3.31.2008 L M X 2 5 3 1 L Q 1 2 2 6 E E V A L U A T I O N B O A R D

Contextual Info: LMX2531LQ1146E Evaluation Board Operating Instructions National Semiconductor Corporation Timing Devices Business Group 10333 North Meridian Suite 400 Indianapolis, IN 46290 LMX2531LQ1146EFPEB Rev 3.31.2008 L M X 2 5 3 1 L Q 1 1 4 6 E E V A L U A T I O N B O A R D

SM0402

Abstract: sm3126 Low IF receiver CVHD-950-100 p981 LP3878MR-ADJ no 870 b 2nf 100PF 22PF RD-170
Contextual Info: 1.0 Design Description The SP16130CH4RB Reference Board demonstrates a low IF receiver subsystem application including an ADC16V130 analog-to-digital converter ADC and LMK04031B clock conditioner which provides digitization and clocking as used in wireless infrastructure systems.

Contextual Info: 1.0 Design Description The SP16130CH4RB Reference Board demonstrates a low IF receiver subsystem application including an ADC16V130 analog-to-digital converter ADC and LMK04031B clock conditioner which provides digitization and clocking as used in wireless infrastructure systems.