UR5596 Search Results

UR5596 Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
UR5596		Unisonic Technologies	MOS IC	Original	PDF	203.32KB	11
UR5596L-S08-R		Unisonic Technologies	MOS IC	Original	PDF	203.31KB	11
UR5596L-S08-T		Unisonic Technologies	DDR TERMINATION REGULATOR - Lead Free	Original	PDF	203.31KB	11
UR5596-S08-R		Unisonic Technologies	MOS IC	Original	PDF	203.31KB	11
UR5596-S08-T		Unisonic Technologies	MOS IC	Original	PDF	203.31KB	11

UR5596 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can	Original	UR5596 UR5596 QW-R502-045	PDF
northbridge Abstract: UR5596 UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be	Original	UR5596 UR5596 QW-R502-045 northbridge UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T	PDF
UR5596 Abstract: UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T northbridge Contextual Info: UNISONIC TECHNOLOGIES CO.,LTD UR5596 MOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can	Original	UR5596 UR5596 QW-R502-045 UR5596L-S08-R UR5596L-S08-T UR5596-S08-R UR5596-S08-T northbridge	PDF
ur5596l Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be	Original	UR5596 UR5596 QW-R502-045 ur5596l	PDF
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UR5596 CMOS IC DDR TERMINATION REGULATOR  DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2 Stub-Series Terminated Logic specifications for termination of DDR-SDRAM. It also can be	Original	UR5596 UR5596 QW-R502-045	PDF