UNDEFINED Search Results

74AC series

Abstract: POM-n
Contextual Info: 9 P R E C A U T IO N S IN D E S IG N IN G C IR C U IT S 9-1 Input Processing 1 Processing of unused gates. Inputs of CMOS IC have such a high im pedance th at the logic level becom es undefined under open conditions. If the input is a t an interm ediate level, the P -channel and N -channel transistors both turn

CIRCUITS-13

Contextual Info: 9. PRECAUTIONS IN DESIGNING CIRCUITS 9-1 Input Processing 1 Processing of unused gate Inputs of CMOS IC have such a high im pedance th at th e logic level becom es undefined under open conditions. If th e input is a t an interm ediate level, the P-channel and N-channel transistors both tu rn on, and excessive supply cu rren t flows.

SEG77

Abstract: 2SC3435 DRA18 EM78815 EM78P813 Seg85 exd6 Seg88
Contextual Info: ELAN MICROELECTRONICS CORP. EM78P813 program design to EM78815 Notice Please take notice to the undefined register in EM78815. R1 PAGE2 Interrupt Flag2 real value 7 6 5 4 3 2 1 RBF/STD FSK/CW DED CNT2 CNT1 TCC X X R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

AT90S4414

Contextual Info: Errata • • • • • • The SPI can Send Wrong Byte Reset During EEPROM Write SPI Interrupt Flag can be Undefined After Reset Verifying EEPROM in System Serial Programming at Voltages below 3.0 Volts Skip Instruction with Interrupts 6. The SPI can Send Wrong Byte

Contextual Info: MN102L35G Type MN102L35G ROM x× 16-bit 144 K RAM (×× 16-bit) 5K Package (Old Package) SDIP064-P-0750C *Pb free (SDIP064-P-0750) Minimum Instruction Execution Time 167 ns (at 4.75 V to 5.25 V, 12 MHz) Interrupts External (4 lines) Internal (23 lines) : Timer × 8, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 2,

Contextual Info: MN102H81G Type MN102H81G ROM x× 8-bit 128 K RAM (×× 8-bit) 4K Package QFP084-P-1818E *Lead-free Minimum Instruction Execution Time 83 ns (at 3.135 V to 3.465 V, 12 MHz) Interrupts External (5 lines) Internal (28 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 1,

ym 238

Abstract: SDIP064-P-0750C
Contextual Info: MN102H85K Type MN102H85K ROM x× 8-bit 256 K RAM (×× 8-bit) 8K Package (Conventional Package) SDIP064-P-0750C *Lead-free (SDIP064-P-0750) Minimum Instruction Execution Time 83 ns (at 3.0 V to 3.6 V, 12 MHz) Interrupts External (6 lines) Internal (30 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 4,

Contextual Info: MN102H85K Type MN102H85K ROM x×16-bit 256 K RAM (××16-bit) 8K Package (Old Package) SDIP064-P-0750C *Pb free (SDIP064-P-0750) Minimum Instruction Execution Time 83 ns (at 3.6 V to 3.0 V, 12 MHz) Interrupts External (6 lines) Internal (30 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 4,

Contextual Info: MN102H85K Type MN102H85K ROM x× 16-bit 256 K RAM (×× 16-bit) 8K Package (Conventional Package) SDIP064-P-0750C *Lead-free (SDIP064-P-0750) Minimum Instruction Execution Time 83 ns (at 3.0 V to 3.6 V, 12 MHz) Interrupts External (6 lines) Internal (30 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 4,

Contextual Info: MN102H76G Type MN102H76G ROM x× 16-bit 128 K RAM (×× 16-bit) 4K Package QFP084-P-1818E *Lead-free Minimum Instruction Execution Time 83 ns (at 3.135 V to 3.465 V, 12 MHz) Interrupts External (7 lines) Internal (28 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 2,

Contextual Info: Errata • • • • • • Lock Bits at High VCC The SPI can Send Wrong Byte Reset during EEPROM Write SPI Interrupt Flag can be Undefined after Reset Serial Programming at Voltages below 3.0 Volts Skip Instruction with Interrupts 6. Lock Bits at High VCC

MN102H85K

Contextual Info: MN102H85K Type MN102H85K ROM x× 16-bit 256 K RAM (×× 16-bit) 8K Package (Conventional Package) SDIP064-P-0750C *Lead-free (SDIP064-P-0750) Minimum Instruction Execution Time 83 ns (at 3.0 V to 3.6 V, 12 MHz) Interrupts External (6 lines) Internal (30 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 4,

MN102L35G

Abstract: MN102LP35Z SDIP064-P-0750C
Contextual Info: MN102L35G Type MN102L35G ROM x× 16-bit 144 K RAM (×× 16-bit) 5K Package (Old Package) SDIP064-P-0750C *Pb free (SDIP064-P-0750) Minimum Instruction Execution Time 167 ns (at 4.75 V to 5.25 V, 12 MHz) Interrupts External (4 lines) Internal (23 lines) : Timer × 8, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 2,

8313 interrupt mask

Abstract: Modulo 7 counter
Contextual Info: SHARP SM8311/SM8313/SM8314/SM8315 the chip and the program is started at address 0000 h . • Sets the predetermined registers and ports to their initial state as shown in Table 10. Status of the remaining registers and ports are undefined. Other functions of hardware reset are as follows :

bra spec sheet

Abstract: Hitachi DSA00206
Contextual Info: date: 2003/03/25 HITACHI SEMICONDUCTOR TECHNICAL UPDATE Classification of Production THEME No Development Environment HI7700/4 The restriction matter at the time of undefined interruption Classification of Information 1. 2. 3. 4. 5. TN-OS*-074B/E PRODUCT NAME

Contextual Info: Errata • • • • • • • • • • • • Wake-up from Power Save Executes Instructions before Interrupt SPI can Send Wrong Byte Wrong Clearing of EXTRF in MCUSR Reset during EEPROM Write SPI Interrupt Flag can be Undefined after Reset Serial Programming at Voltages below 3.4V

AT90S4414

Abstract: AT90S8515
Contextual Info: Errata • • • • • The SPI can Send Wrong Byte Reset During EEPROM Write SPI Interrupt Flag can be Undefined After Reset Serial Programming at Voltages below 3.0 Volts Skip Instruction with Interrupts 5. The SPI can Send Wrong Byte If the SPI is in master mode, it will restart the old transfer if new data is written on

LM393

Abstract: 74HCTOO
Contextual Info: False-Write-Protect Circuit Design by Brian T. Johansen, Syntrex, Inc., and Anthony DiColli, Advanced Micro Devices, Inc. INTRODUCTION The Am2864AE/BE EEPROMs are internally protected from false writes when is below 3.0 V. When system logic levels are undefined, it is the supply voltage

Contextual Info: MN102H85K Type MN102H85K ROM x×16-bit 256 K RAM (××16-bit) 8K Package (Old Package) SDIP064-P-0750C *Pb free (SDIP064-P-0750) Minimum Instruction Execution Time 83 ns (at 3.6 V to 3.0 V, 12 MHz) Interrupts External (6 lines) Internal (30 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 4,

Contextual Info: MN102H76G Type MN102H76G ROM x× 8-bit 128 K RAM (×× 8-bit) 4K Package QFP084-P-1818E *Lead-free Minimum Instruction Execution Time 83 ns (at 3.135 V to 3.465 V, 12 MHz) External (7 lines) Internal (28 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 2,

Contextual Info: MN102H57K Type MN102H57K ROM x× 16-bit 256 K RAM (×× 16-bit) 8K Package QFP084-P-1818E *Pb free Minimum Instruction Execution Time 83 ns (at 3.6 V to 3.0 V, 12 MHz) Interrupts External (6 lines) Internal (30 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 4,

Contextual Info: MN102L35G Type MN102L35G ROM x× 16-bit 144 K RAM (×× 16-bit) 5K Package (Old Package) SDIP064-P-0750C *Pb free (SDIP064-P-0750) Minimum Instruction Execution Time 167 ns (at 4.75 V to 5.25 V, 12 MHz) Interrupts External (4 lines) Internal (23 lines) : Timer × 8, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 2,

Contextual Info: MN102H76G Type MN102H76G ROM x× 8-bit 128 K RAM (×× 8-bit) 4K Package QFP084-P-1818E *Lead-free Minimum Instruction Execution Time 83 ns (at 3.135 V to 3.465 V, 12 MHz) Interrupts External (7 lines) Internal (28 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 2,

Contextual Info: MN102H76F Type MN102H76F [ES Engineering Sample available] ROM (x×16-bit) 96 K RAM (××16-bit) 4K Package QFP084-P-1818E *Pb free Minimum Instruction Execution Time 83 ns (at 3.135 V to 3.465 V, 12 MHz) Interrupts External (7 lines) Internal (28 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 2,