UDB 12 Search Results

Contextual Info: EMC 16 UDB ultradeep blue Features ♦Ultra miniature size ♦Surface Mounting Device ♦Wide viewing angle

ramp

Contextual Info: Up-Down Ramp Buffer ADTECH Analog-Digital Technology, Inc. Model No. UDB 97 The Adtech Model UDB 97 Up-Down Ramp Buffer provides an accurate and economical means of supervisory process control. A contact state change or pulse input drives the standard output process signal to ramp up

STP1080A

Abstract: IEEE1149
Contextual Info: STP1080A July 1997 UltraSPARC -I Data Buffer UDB-I DATA SHEET Companion Device for 167/200 MHz UltraSPARC-I Systems DESCRIPTION The UDB-I is a data buffer device used in UltraSPARC-I systems to connect the CPU and its external SRAM cache bus to the system bus:

STP1080ABGA-100

Contextual Info: STP1080A July 1997 UltraSPARC -I Data Buffer UDB-I DATA SHEET Companion Device for 167/200 MHz UltraSPARC-I Systems DESCRIPTION The UDB-I is a data buffer device used in UltraSPARC-I systems to connect the CPU and its external SRAM cache bus to the system bus:

STP1081

Abstract: 75193 Sun UltraSparc T2 40N20
Contextual Info: STP1081 July 1997 UltraSPARC -II Data Buffer UDB-II DATA SHEET Companion Device for 250/300 MHz UltraSPARC-II Systems DESCRIPTION The UltraSPARC-II Data Buffer (UDB-II) consists of two identical ASICs connecting the UltraSPARC-II microprocessor and its E-Cache to the system data bus (i.e., UPA bus). These two are designated UDB_H (for the

Contextual Info: S un M icroelectronics O c to b e r 1996 UltraSPARC -!! Data Buffer UDB-II DATA SHEET High-Capacity, Two-Speed Data Transfer D e s c r ip t io n The UltraSPARC-II Data Buffer (UDB-II) consists of two identical integrated circuit microchips connecting the UltraSPARC-II microprocessor and its E-Cache to the slower system data bus. These

Contextual Info: STP1080A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC -! Data Buffer UDB-I DATA SHEET Companion Device for 167/200 MHz UltraSPARC-I Systems D e s c r ip t io n The UDB-I is a data buffer device used in UltraSPARC-1 system s to connect the CPU and its external SRAM

STP1080

Abstract: ultrasparc 3
Contextual Info: UltraSPARC -! Data Buffer UDB-I DATA SHEET Companion Device for 167/200 MHz UltraSPARC-1 Systems D e s c r ip t io n The UDB-I is a data buffer device used in UltraSPARC-1 system s to connect the CPU and its external SRAM cache bus to the system bus: • On the C P U /SR A M side, the E-Cache Bus consists of 128 data bits and 16 parity bits

ultrasparc

Contextual Info: UltraSPARC “-!! Data Buffer UDB-II DATA SHEET Companion Device for 250/300 MHz UltraSPARC-II Systems D e s c r ip t io n The UltraSPARC-II Data Buffer (UDB-II) consists of two identical ASICs connecting the UltraSPARC-II micro­ processor and its E-Cache to the system data bus (i.e., UPA bus). These two are designated UDB_H (for the

Contextual Info: S un M icroelectronics O c to b e r 1996 UltraSPARC -!! Data Buffer UDB-II DATA SHEET High-Capacity, Two-Speed Data Transfer D e s c r ip t io n The UltraSPARC-II Data Buffer (UDB-II) consists of two identical integrated circuit microchips connecting the UltraSPARC-II microprocessor and its E-Cache to the slower system data bus. These

UltraSPARC ii

Contextual Info: i f 4 4 oooo ò o o < »000 ° 00 ° c IO 5 5 o o o < »0000 000 « IOOOO 0 0 ( UltraSPARC-II Data Bujjer (UDB-II Data Sh eet O c t o b e r 1 996 STP1081 S un M ic r o e le c t r o n ic s October 1996 UltraSPARC -II Data Buffer (UDB-II) DATA SHEET High-Capacity, Two-Speed Data Transfer

UltraSPARC ii

Contextual Info: if 4 4 o o oo »000 ° 00 ° c IO 5 5 o »0000 000 « ò o o < o o < IO O O O 00( WËÊIÊÈËÎIËKÊËÊË UltraSPARC-II D ata Buffer (UDB-II Data Sheet October 1996 STP1081 S un M icroelectronics S T P 10 8 1 O c to b e r 1996 »TM UltraSPARC -II Data Buffer (UDB-II)

J1039

Contextual Info: 1300 Henley Court Pullman, WA 99163 509.334.6306 www.digilentinc.com Universal Development Board Reference Manual Revised January 15, 2014 This manual applies to the UDB rev. E Table of Contents Table of Contents . 1

Contextual Info: High Voltage Doorbell Modules Standard and Fast Recovery UDA, UDB, UPC, UDD, UDE & UDF Series Dim. Inches Millimeter Minimum Maximum Minimum Maximum Notes A B C D E 0.63 -0.25 - - 16.08 -Dia. 19.81 48.26 Dia. -Typ. - 1 / 4 - 2 8

Contextual Info: High Voltage Doorbell Modules Standard and Fast Recovery UDA, UDB, UPC, UDD, UDE & UDF Seriesl Dim. Inches Millimeter Minimum Maxim um Minimum Maxim um Notes A B C D E 0.63 -0.25 - -0.78 1.90 - 16.08 -Dia. 19.81 48.26 Dia. -Typ.

Contextual Info: PSoC Creator Component Data Sheet Counter 2.0 Features • Fixed function FF and universal digital block (UDB) implementations • 8-, 16-, 24-, or 32-bit counter • Up, down, or up-and-down configurations • Optional compare output • Optional capture input

Contextual Info: PSoC Creator Component Datasheet Counter 2.10 Features • Fixed-function FF and universal digital block (UDB) implementations •      8-, 16-, 24-, or 32-bit counter Up, down, or up-and-down configurations Optional compare output Optional capture input

Contextual Info: PSoC Creator Component Datasheet SMBus and PMBus Slave 2.0 Features • SMBus Slave mode • PMBus Slave mode  SMBALERT# pin support  25 ms Timeout  Fixed Function FF and UDB implementations  Configurable SM/PM Bus commands General Description

ASNE 0261

Abstract: ASNE-0261 TKB24 TKB22 UDB20 TKB20 SJB22 VLB20 VLB24 VLB26
Contextual Info: Fiches série 2 14/12/00 16:27 Page 3 Airframe wires and cables for military aircraft 2 Single & multicore silver screened and jacketed airframe wires 200°C with ASNE 0261 CF conductors SJB – TKB – UDB – VLB series Cores F.E0261-CF-A Spiral screen

Contextual Info: PSoC Creator Component Datasheet Timer 2.30 Features • Fixed-function FF and universal digital block (UDB) implementations •    8-, 16-, 24-, or 32-bit timer Optional capture input Enable, trigger, and reset inputs, for synchronizing with other components

Contextual Info: PSoC Creator Component Datasheet SM Bus and PM Bus Slave 2.10 Features • SMBus Slave mode • PMBus Slave mode  SMBALERT# pin support  25 ms Timeout  Fixed Function FF and UDB implementations  Configurable SM/PM Bus commands General Description

Contextual Info: PSoC Creator Component Data Sheet Counter 1.50 Features • Supports fixed-function and UDB-based implementations • 8-, 16-, 24-, or 32-bit Counter • Configurable as Up, Down or Up and Down Counter • Optional Compare Output • Optional Capture Input

Contextual Info: PSoC Creator Component Data Sheet Timer 2.0 Features • Supports fixed-function and UDB-based implementations • 8-, 16-, 24-, or 32-Bit Resolution • Configurable Capture modes • 4 deep capture FIFO • Optional capture edge counter • Configurable Trigger and Interrupts

Contextual Info: 2SC3122 TOSHIBA TOSHIBA TRANSISTOR i SILICON NPN EPITAXIAL PLANAR TYPE < ; r w êf 3 mm j j 1 TV VHF RF AMPLIFIER APPLICATIONS. FEATURES : High Gain : Gpe = 24dB Typ. (f=200MHz) • Low Noise : NF = 2.UdB (Typ.) (f=200MHz) • Excellent Forward AGO Characteristics,