TYPE B DMA Search Results

LGA0204

Abstract: LGA0410 LGA0510
Contextual Info: LGA LGA TYPE COLOR CODE INDUCTORS HOW TO ORDER FOR EXAMPLE LGA 0307 A B - 220 K P 52 C D E F A B Body Dimensions mm Product type LGA Axial color code inductor Type Dmax Lmax 0204 2.3 4.2 0307 2.8 7.0 0410 4.0 10.5 0510 5.0 10.5 C Nominal lnductance( H D Tolerance

UC38xx

Abstract: unitrode U-128 BA1610 UC3825 application note UC28xx
Contextual Info: IN TEG R A T ED CIR C UITS U C 1823A ,B /1825A ,B UNITRODE U C 2823A , B /2825A,B U C 3823A ,B /3825A ,B High Speed PWM Controller FEATURES DESC RIPTIO N “Bold Type” Denotes improved or new features • Improved versions of the UC3823/UC3825 PWMs The UC3823A & B and the UC3825A & B family of PWM control ICs are Improved versions of the standard

am7990

Contextual Info: Am7990 Advanced Micro Devices Local Area Network Controller for Ethernet LANCE DISTINCTIVE CHARACTERISTICS Compatible with Ethernet and IEEE 802.3 10BASE 5 Type A, and 10BASE 2 Type B, “Cheapernet” • Network and packet error reporting ■ Back-to-back packet reception with as little as

473 j capacitor

Contextual Info: CERAMIC DISC CAPACITOR HOW TO ORDER CC1 1 F 2 1 7 3 SL 4 1 5 B 6 331 7 J 8 S 9 P 10 W 11 Capacitor Type Code Type 2 CC1 Low voltage temperature compensated disk ceramic capacitor CC81 High voltage temperature compensated disk ceramic capacitor CT1 Low voltage high dielectric constant disk ceramic capacitor

16C950

Abstract: Oxford cf950 C950 40mhz transmitter remote OXCF950 16C550 CF950 OXCF950-TQ-B OXCF950B
Contextual Info: OXCF950 rev B DATA SHEET V1.0 FEATURES • • • • • • • • • • • • • • • • Single full-duplex asynchronous channel 128-byte deep transmitter / receiver FIFO Fully software compatible with industry standard 16C550 type UARTs Readable FIFO levels

Contextual Info: Elan SC400 and ElanSC410 AMDÎ! Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers DISTINCTIVE CHARACTERISTICS Elan™SC400 and ElanSC410 Microcontrollers • ■ ■ Standard PC/AT system logic PICs, DMACs, timer, RTC - DOS, ROM-DOS, Windows, and industrystandard BIOS support

Contextual Info: PRELIMINARY INTEL 380FB PCISET: 82380AB MOBILE PCI-TO-ISA BRIDGE MISA PCI Bus at 25 MHz to 33 MHz • PC/PCI DMA Protocol for Software Transparent, Low Pin Count DMA on ISA ■ Supports 3 ISA Slots ■ 160-lead MQFP Package ISA Bus at 7.5 MHz to 8.33 MHz

Contextual Info: irrte1 80C188EC-16, -13 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Full Static Operation ■ True CMOS Inputs and Outputs ■ - 40°C to + 85°C Operating Temperature Range Integrated Feature Set: — Low-Power, Static, Enhanced 8088 CPU Core — Two Independent DMA Supported

80c186ec

Contextual Info: iny P B iU f i S lll N I A D in f 80C186EC/80C188EC AND 80L186EC/80L188EC 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Fully Static Operation ■ True CMOS Inputs and Outputs ■ Integrated Feature Set: — Low-Power, Static, Enhanced 8086 CPU Core — Two Independent DMA Supported

80188

Abstract: intel 80188
Contextual Info: INTEL CORP UP/PRPHLS m 44E D 402bl7S D'lDSB?*! 7 B I T L 1 T 'Y ? '/ 7 '0 7 80188 HIGH INTEGRATION 8-BIT MICROPROCESSOR Integrated Feature Set — Enhanced 8086-2 CPU — Clock Generator — 2 Independent DMA Channels — Programmable Interrupt Controller'

80188 8087

Abstract: intel 80186 instruction set 80186xl ARCHITECTURE OF 80186 PROCESSOR intel 80188 80188 programming peripheral 80186 reference manual 80186 intel 80186 external memory 80186 architecture
Contextual Info: 80186 80188 HIGH-INTEGRATION 16-BIT MICROPROCESSORS Y Integrated Feature Set Enhanced 8086-2 CPU Clock Generator 2 Independent DMA Channels Programmable Interrupt Controller 3 Programmable 16-bit Timers Programmable Memory and Peripheral Chip-Select Logic

difference between intel 8086 and intel 80186 pro

Abstract: intel 80186 pin out 80186
Contextual Info: INTEL CORP in t@ UP/PRPHLS 31E D • 4fi5fql7S OCHlSTfc, 3 ■ T 7 - - V 9 - / 7- 80186 HIGH INTEGRATION 16-BIT MICROPROCESSOR ■ Integrated Feature Set — Enhanced 8086-2 CPU — Clock Generator — 2 Independent DMA Channels — Programmable Interrupt Controller

Contextual Info: FDC87W22 s i l i c e STANDARD MICROSYSTEMS CORPORATION Power I/O Controller FEATURES • • 5 Volt Operation Floppy Disk Controller FDC - Compatible with IBM PC/AT Disk Drive Systems - Variable Write Pre-Compensation with Track Selectable Capability - DMA Enable Logic

Contextual Info: SlllgC FDC87W23 STANDARD MICROSYSTEMS CORPORATION Power I/O Controller with ACPI Support FEATURES • • • • • • • 5 Volt Operation Plug & Play 1.OA Compliant Supports Eight IRQs ISA or 15 IRQs (Serial IRQ), Three DMA Channels, and 480 Re-locatable Addresses

SST85LD1004M

Abstract: SST85LD1001K SST85LD1004M-60-4C-LBTE SST85LD1002L FAD13 604C SST85LD1002
Contextual Info: 1 GByte/ 2 GByte / 4 GByte NANDrive SST85LD1001K / SST85LD1002L / SST85LD1004M Fact Sheet FEATURES: • Industry Standard ATA/IDE Bus Interface – Host Interface: 16-bit access – Supports up to PIO Mode-6 – Supports up to Multi-word DMA Mode-4 – Supports up to Ultra DMA Mode-4

Contextual Info: Freescale Semiconductor Mask Set Errata KINETIS_L_0N40H Rev 09 AUG 2013 Mask Set Errata for Mask 0N40H Introduction This report applies to mask 0N40H for these products: • KINETIS_L Errata ID Errata Title 6609 I2C1: DMA transfers using certain OUTDIV1 and OUTDIV4 clock divider combinations will result in

CL-CD2401

Abstract: 80X86 CD2401 CL-CD2231 CL-CD2431 CRC-16 STK 432 P585A manchester
Contextual Info: CL-CD2401 Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 134.4 kbits/sec. @ CLK = 35 MHz ■ Supports async, HDLC/SDLC (synchronous data link control; non-multidrop applications), bisync and X.21 on all channels ■ 32-bit address, 16-bit data, double-buffered DMA controller for each transmitter and receiver; two

communication between cpu and iop

Abstract: 8089 microprocessor architecture
Contextual Info: ^ S Ü G IM M V M8089 8 & 16-BIT HMOS I/O PROCESSOR Military • High Speed DMA Capabilities Including I/O to Memory, Memory to I/O, Memory to Memory, and I/O to I/O ■ 1 Mbyte Addressability ■ MIAPX 86, 68 Compatible: Removes I/O Overhead from CPU in MiAPX 86/11 or

Contextual Info: Freescale Semiconductor Technical Data DSP56311 Rev. 8, 2/2005 DSP56311 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit X Data RAM 48 K x 24 bits YAB XAB PAB DAB Y Data

SMC91C92

Contextual Info: FUNCTIONAL DESCRIPTION sequential access nature and typically works in one direction at any given time. An internal DMA type of interface connects the data path to the device RAM through the arbiter and MMU. The SMC91C92 includes an arbitrated shared memory of 4 6 0 8 bytes, accessed by the CPU

Contextual Info: HD68450, HD68450Y DMAC Direct Memory Access Controller APRIL 1984 M icroprocessor im plem ented systems are becoming increas­ ingly com plex, particularly w ith the advent o f high-performance 16-bit MPU devices w ith large m em ory addressing capability. In

Contextual Info: D M A C O N TR O LLE R 8.1 AMDÌ1 O V E R V IE W Direct memory access DMA permits the transfer of data between memory and peripherals without CPU involvement. With DMA transfers, the DMA controller becomes the bus master. The arbitration for the bus is internal to the processor and is not visible externally. When

Contextual Info: Am8127 AmZ8000 Clock Generator DISTINCTIVE CHARACTERISTICS Hlgh-drive high-level clock output Four TTL-level clocks Special output provides clock signal matched to re­ quirements of AmZSOOO* CPU 4MHz and some 6 MHz applications , MMU and DMA devices. Generates synchronized TTL compatible clocks at

Contextual Info: Freescale Semiconductor Technical Data Advance Information DSP56L307 Rev. 6, 2/2005 DSP56L307 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area EFCOP Peripheral Expansion Area Address Generation Unit Six Channel DMA Unit X Data RAM 24 K x 24 bits