TTL TRANSISTOR MODEL PARAMETER Search Results

LMV331

Abstract: LMV393 pin configuration of lm393 LM393 5-30V LMV339 C13 SOT23-8 VA 5PIN MARKING va marking 5pin sot23
Contextual Info: LMV331 Single / LMV393 Dual / LMV339 Quad General Purpose, Low Voltage, Tiny Pack Comparators General Description Features The LMV393 and LMV339 are low voltage 2.7-5V versions of the dual and quad comparators, LM393/339, which are specified at 5-30V. The LMV331 is the single version, which

3N502

Abstract: NB3N502 NB3N502DG NB3N502DR2G
Contextual Info: NB3N502 14 MHz to 190 MHz PLL Clock Multiplier Description The NB3N502 is a clock multiplier device that generates a low jitter, TTL/CMOS level output clock which is a precise multiple of the external input reference clock signal source. The device is a cost

socket 775 pinout

Abstract: MC100 MC100EPT622 MC100EPT622FA MC100EPT622FAG
Contextual Info: MC100EPT622 3.3V LVTTL/LVCMOS to LVPECL Translator The MC100EPT622 is a 10−Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The device has an OR−ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs

Contextual Info: Preliminary Datasheet Advanced Analog Circuits LOW POWER LOW OFFSET VOLTAGE QUAD COMPARATORS General Description Features The AS339 consists of four independent precision voltage comparators with a typical offset voltage of 2.0mV and high gain. It is specially designed to operate from a single power supply over wide range of

HLT22

Abstract: klt22 ELT22 HT22 MC100 MC100ELT22 MC10ELT22
Contextual Info: MC10ELT22, MC100ELT22 5.0 V Dual TTL to Differential PECL Translator The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5 V and ground are required. The small outline 8-lead package and the low

ELT25

Abstract: HLT25 HT25 KLT25 MC100ELT25 MC10ELT25
Contextual Info: MC10ELT25, MC100ELT25 −5 V Differential ECL to TTL Translator Description Features • • • MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 8 8 2.6 ns Typical Propagation Delay 100 MHz FMAX CLK 24 mA TTL Outputs Flow Through Pinouts Operating Range: VCC = 4.5 V to 5.5 V with GND = 0 V;

KPT26

Abstract: MC100EPT26 2035 soic-8
Contextual Info: MC100EPT26 3.3V 1:2 Fanout Differential LVPECL/LVDS to LVTTL Translator Description The MC100EPT26 is a 1:2 Fanout Differential LVPECL/LVDS to LVTTL translator. Because LVPECL Positive ECL or LVDS levels are used only +3.3 V and ground are required. The small outline 8−lead

NB3N2304NZDTR2G

Abstract: NB3N2304NZ NB3N2304NZDTG NB3N2304NZMNR4G
Contextual Info: NB3N2304NZ 3.3V 1:4 Clock Fanout Buffer Description The NB3N2304NZ is a low skew 1−to 4 clock fanout buffer, designed for high speed clock distribution such as in PCI−X applications. The NB3N2304NZ guarantees low output−to−output skew. Optimal design, layout and processing minimizes skew within a

KVT20

Abstract: MC100LVELT20 MC100LVELT20D MC100LVELT20DG
Contextual Info: MC100LVELT20 Product Preview 3.3V LVTTL/LVCMOS to Differential LVPECL Translator http://onsemi.com Description The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL Positive ECL levels are used, only + 3.3 V and ground are required. The small outline SOIC−8 package and the

232ACBNZ

Abstract: 232ACBN 232ACPZ 232ACBZ 232ACB diode MARKING M16 HIN232A HIN232ACB HIN232ACBN HIN232ACB-T
Contextual Info: HIN232A Data Sheet March 13, 2006 High Speed +5V Powered RS-232 Transmitters/Receivers FN4316.12 Features • Meets All RS-232E and V.28 Specifications The HIN232A high-speed RS-232 transmitter/receiver interface circuit meets all ElA high-speed RS-232E and V.28

UC3842 smps design

Abstract: what are function of vertical section of tv rs-flip-flop block diagram h.out transistor flyback uc3842 sync phillips crt TV vertical section what are function of horizontal section of tv KB2512 S1D2512X01
Contextual Info: JUL. 2000 Ver 0.3 DATA SHEET S1D2512X01 Preliminary S1D2512X01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS DEFLECTION PROCESSOR 32-SDIP-400 The S1D2512X01 is a monolithic integrated circuit assembled in 32 pins shrunk dual in line plastic package. This IC controls all the functions

automatic WATER LEVEL pump CONTROL

Abstract: AN9863 IEC1000 ISL83239E ISL83239EIA ISL83239EIA-T SP3239E
Contextual Info: ISL83239E TM Data Sheet September 2001 ±15kV ESD Protected, 10nA SupplyCurrent, +3V to +5.5V, 250kbps, RS-232 Transmitters/Receivers The Intersil ISL83239E contains 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Additionally, it

AN9863

Abstract: IEC1000 ISL83385E ISL83385ECA ISL83385ECB ISL83385ECB-T MAX3385E
Contextual Info: ISL83385E TM Data Sheet January 2001 15kV ESD Protected, +3V to +5.5V, +/-1 Microamp, 250kbps, RS-232 Transmitters/Receivers File Number 6001 Features • ESD Protection for RS-232 I/O Pins to ±15kV IEC1000 The Intersil ISL83385E contains 3.0V to 5.5V powered

lvds 30 pin lcd panel sharp

Contextual Info: Technical Document LCD Specification LCD Group LQ150X1LG91 LCD Module Product Specification February 2011 XGA module with True Industrial-rated LED backlight at 50,000 hours and built-in backlight driver; high contrast of 800:1 and brightness of 350 nits.

CLC5903

Abstract: CLC5955 CLC5955MTDX CLC5957
Contextual Info: CLC5955 11-bit, 55MSPS Broadband Monolithic A/D Converter April 2002 N CLC5955 11-bit, 55MSPS Broadband Monolithic A/D Converter General Description Features The CLC5955 is a monolithic 11-bit, 55MSPS analog-to-digital converter. The device has been optimized for use in IF-sampled

PS 1025

Abstract: MC100EP446 MC10EP446 QFN32 3D63
Contextual Info: MC10EP446, MC100EP446 3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter Description The MC10/100EP446 is an integrated 8−bit parallel to serial data converter. The device is designed with unique circuit topology to operate for NRZ data rates up to 3.2 Gb/s. The conversion sequence

317LM

Abstract: AZ317L AZ317LM AZ317LM-E1 AZ317LMTR AZ317LMTR-E1 AZ317LZ AZ317LZ-E1 AZ317LZTR AZ317LZTR-E1
Contextual Info: Data Sheet 3-TERMINAL ADJUSTABLE REGULATOR AZ317L General Description Features The AZ317L is an adjustable 3-terminal positive voltage regulator capable of supplying 100mA over a 1.2V to 12V output range. This voltage regulator is exceptionally easy to use and requires only two external

8122 transistor

Abstract: 8122 CS-8122T5 CS-8122TH5 CS-8122TV5 325TYP
Contextual Info: CS-8122 CS-8122 2% 5V, 750mA Low Dropout Linear Regulator with Delayed RESET Description The CS-8122 is a precision 5V linear regulator capable of sourcing in excess of 750mA. The RESET Õs delay time is externally programmed using a discrete RC network. During power up, or when

1N5819

Abstract: 1N914 MBR0520 NCV8842 1N4148 1N5817 1N5818
Contextual Info: NCV8842 1.5 A, 170 kHz, Buck Regulator with Synchronization Capability The NCV8842 is a 1.5 A buck regulator IC operating at a fixed−frequency of 170 kHz. The device uses the V2t control architecture to provide unmatched transient response, the best overall

LSF0108

Contextual Info: Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LSF0101, LSF0102, LSF0108 SDLS966B – DECEMBER 2013 – REVISED MARCH 2014 LSF010x Single/Dual Bidirectional Multi-Voltage Level Translator for Open-Drain & PushPull Application

LSF0108

Contextual Info: Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LSF0101, LSF0102, LSF0108 SDLS966C – DECEMBER 2013 – REVISED MAY 2014 LSF010x 1/2/8 Channel Bidirectional Multi-Voltage Level Translator for Open-Drain & Push-Pull Application

LSF0108

Contextual Info: Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LSF0101, LSF0102, LSF0108 SDLS966C – DECEMBER 2013 – REVISED MAY 2014 LSF010x 1/2/8 Channel Bidirectional Multi-Voltage Level Translator for Open-Drain & Push-Pull Application

Y-351

Abstract: y351 405C A114 A115 C101 JESD22 NL37WZ17
Contextual Info: NL37WZ17 Triple Noninverting Schmitt−Trigger Buffer The NL37WZ17 is a high performance buffer with Schmitt−Trigger inputs operating from a 1.65 to 5.5 V supply. The NL37WZ17 can be used as a line receiver which will receive slow input signals. The NL37WZ17 is capable of transforming slowly

BLOCK DIAGRAM FOR LPG GAS DETECTION

Abstract: THC63LVDM83R KTBE24MSTF LVDS 20pin cable KTBE24MSTF-530 disply lcd driver LQ150X1LGN2E DF14-2628SCFA LQ104V1DG61 t24H
Contextual Info: TECHNICAL No. LD – 17Y60 DATE November．25．2005 LITERATURE FOR TFT - LCD module These parts have corresponded with the RoHS directive. MODEL The technical So, please your No. literature contact product LQ150X1LGN2E based is subject SHARP on this or its