TTL LOGIC FAMILY LIST Search Results

10H350

Abstract: DL122 MC10H350
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA PECL* to TTL Translator MC10H350 +5 Vdc Power Supply Only The MC10H350 is a member of Motorola’s 10H family of high performance ECL logic. It consists of 4 translators with differential inputs and TTL outputs. The 3–state outputs can be disabled by applying a HIGH TTL logic level on the

10H350

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA PECL* to TTL Translator MC10H350 +5 Vdc Power Supply Only The MC10H350 is a member of Motorola’s 10H family of high performance ECL logic. It consists of 4 translators with differential inputs and TTL outputs. The 3–state outputs can be disabled by applying a HIGH TTL logic level on the

pc2101

Abstract: 91L01
Contextual Info: Am9101 Family Am9101 Family 2 5 6 x 4 Static RAM DISTINCTIVE CHARACTERISTICS Low operating power 125 mW typ.; 290 mW maximum — standardpower 100 mW typ.; 175 mW maximum — low power Logic voltage levels identical to TTL • • • • High output drive — two full TTL loads

am9101

Abstract: 91l01 am91l01 9101C Am9101/91L01/2101
Contextual Info: Am9101 Family Am9101 Family 2 5 6 x 4 Static RAM DISTINCTIVE CHARACTERISTICS Low operating 125 mW typ.; 100 mW typ.; Logic voltage power 290 mW maximum — standardpower 175 mW maximum — low power levels identical to TTL • • • • High output drive — two full TTL loads

mach 1 to 5 from amd

Abstract: What is the maximum fan-out for a 74-series circuit LOW POWER CMOS LOGIC FAMILIES 74AC 74HC 74LS 74ls series logic family mach 1 family amd mach 3 family amd MACHXL
Contextual Info: Application Notes Interfacing MACH with Different Logic Families INTRODUCTION Ideally, a digital system would be constructed using only a single type of logic family, such as TTL, CMOS, etc. In reality, this is sometimes impossible or undesirable because of considerations such

Kontron MPP80S

Abstract: PAL VIHH programming pulse 436Z Stag Programmers 16RP4A PAL16P8A PAL16RP4A PAL16RP6A PAL16RP6ANC PAL16RP8A
Contextual Info: C t-9 January 1986 000965 T Programmable Array Logic PAL High Speed PAL Series 20 AP General Description The PAL family utilizes National Semiconductor's Schottkv TTL process and bipolar PROM fusible-link technology to provide user-programmable logic to replace conventional

TTL LS 7400

Abstract: ttl 7400 marking WV1 transistor TTL 7400 national semiconductor 74H Logic Family Specifications IC 7400 nand gate MIL-STD-806B LS TTL family characteristics transistor f259 internal structure 74LS00 nand gate
Contextual Info: Introduction National Semiconductor Introduction FAST, an acronymn for Fairchild Advanced Schottky TTL, is a high-speed, low-power logic family that achieves speeds typically 30% faster than the Schottky family with a corre­ sponding power reduction of approximately 75%. It is fabri­

60c31

Abstract: 74HC74 74HCT-Logic 80C31HB 27C2M EPROM 27C256 interface hardware 74HC cmos family spec
Contextual Info: CHAPTER 7 80C51 Family Designing with the 80C51BH CMOS EVOLVES The original CMOS logic families were the 4000-series and the 74C-series circuits. The 74C-series circuits are functional equivalents to the correspondingly numbered 74-series TTL circuits, but have CMOS logic levels and

am2101

Abstract: AM9101 256x4 static ram
Contextual Info: Am9101 Family Am9101 Family 2 5 6 x 4 Static RAM DISTINCTIVE CHARACTERISTICS Low operating 125 mW typ.; 100 mW typ.; Logic voltage power • High output drive — two full TTL loads 290 mW maximum— standardpower• High noise immunity — full 400 mV 175 mW

PAL16L8 programming algorithm

Abstract: pal 20 medium PAL16R4A-2
Contextual Info: Programmable Array Logic PAL 20-Pin Medium PAL Family General Description The 20-pin Medium PAL family contains four of the most popular PAL architectures used in industry. National Semi­ conductor’s advanced Schottky TTL process with titanium tungsten fusible links is used in manufacturing the standard,

Am2101

Abstract: AM9101 2101 256x4 L01A amd 9101 256x4 static ram ram 256 256x4 Am2101-2 AM9101CPC
Contextual Info: Am9101 Family Am9101 Family 2 5 6 x 4 Static RAM DISTINCTIVE CHARACTERISTICS Low operating 125 mW typ.; 100 mW typ.; Logic voltage power • High output drive — two full TTL loads 290 mW maximum— standardpower• High noise immunity — full 400 mV 175 mW

XC6200

Abstract: BUF C038 XC6264 xilinx XC6216 PN16 XC6209 XC6216 PW16 XC6000 N16O
Contextual Info: XC6200 FPGA Family  Advanced Product Description Features • Flexible Pin Configuration - All User I/O’s programmable as in, out, bidirect, tristate or open drain. - Configurable pull-up/down resistors - CMOS or TTL logic levels - 8.32-bit CPU interface

Contextual Info: COM’L MIL a PAL16R8 Family Advanced Micro Devices 20-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 7.5 ns maximum propagation delay ■ Easy design with PALASM software ■ Popular 20-pln architectures: 16L8,16R8, 16R6,16R4

MOSFET DRIVER IC MIC 4426

Abstract: tsc170 MIC4427 MIC4427BN 4427 MOSFET Drivers pin compatible with LA 4427 4427 mosfet
Contextual Info: General Description Features The MIC4426/4427/4428 family are highly-reliable dual low side MOSFET drivers fabricated on a BiCMOS/DMOS pro­ cess for low power consumption and high efficiency. These drivers transíale TTL or CMOS input logic levels to output

SG55471L/883B

Abstract: SN55451
Contextual Info: SG55451B/SG55461/SG55471 SG75451B/SG75461/SG75471 DUAL PERIPHERAL POSITIVE-AND DRIVER DESCRIPTION FEATURES The SG5541B/SG55461/SG55471 SG75451B/SG75461/SG75471 series of dual peripheral Positive-AND drivers are a family of versatile devices designed for use in systems that employ TTL or DTL logic. This

mmi pal20l8

Abstract: pal20l8 PAL20R4-7PC PAL20R8B PAL20R8 Family february 1996
Contextual Info: FINAL COM’L: -5/7/B/B-2/A, 10/2 H Advanced Micro Devices PAL20R8 Family 24-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • 5-ns propagation delay ■ Power-up reset for initialization ■ Popular 24-pin architectures: 20L8,20R8, 20R6, 20R4

Contextual Info: COM’L MIL Cl PAL20R8 Family Advanced Micro Devices 24-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 7.5 ns m axim um propagation delay ■ Easy design w ith PALASM softw are ■ Popular 24-pin architectures: 20L8, 20R8, 20R6, 20R4

Contextual Info: FINAL COM’L: -4/5/7/B/B-2/A, D/2 Zi Advanced Micro Devices PAL16R8 Family 20-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 4.5 ns maximum propagation delay ■ Power-up reset for initialization ■ Popular 20-pin architectures: 16L8,16R8,16R6,

0040t

Abstract: MC10H125-D DL122 MC10H125
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad MECL-to-TTL Translator MC10H125 The MC10H125 is a quad translator for interfacing data and control signals between the MECL section and saturated logic section of digital systems. The 10H part is a functional/pinout duplication of the standard MECL 10K family

TL390

Contextual Info: COM’L: -5/7/B/B-2/A, 10/2 F IN A L PAL20R8 Family AdvaH niccero 24-Pin TTL Programmable Array Logic Devices DISTINCTIVE CHARACTERISTICS • 5-ns propagation delay ■ Power-up reset for initialization ■ Popular 24-pin architectures: 20L8, 20R8, 20R6, 20R4

mc10h125pd

Abstract: MC10H125
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad MECL-to-TTL Translator MC10H125 The MC10H125 is a quad translator for interfacing data and control signals between the MECL section and saturated logic section of digital systems. The 10H part is a functional/pinout duplication of the standard MECL 10K family

PAL16R8

Contextual Info: FINAL COM’L: -4/5/7/B/B-2/A, D/2 il Advanced Micro Devices PAL16R8 Family 20-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 4.5 ns maximum propagation delay ■ Power-up reset for initialization ■ Popular 20-pin architectures: 16L8,16R8,16R6,

PAL20LB

Abstract: mmi 20L8 amd part marking 20L8 PAL20L8 PAL20R4 PAL20R6 PAL20R8 PAL20L8-7
Contextual Info: F IN A L C O M 'L : -5 /7 /B /B -2 /A , 10/2 a Advanced Micro Devices PAL20R8 Family 24-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • 5*ns propagation delay ■ Power-up reset for Initialization ■ Popular 24-pin architectures: 20L8,20R8,

Contextual Info: FIN A L COM’L: H-7/10/15/20 IND: H-7/10/15/20 Lattice/Vantis PALCE20RA10 Family 24-Pin Asynchronous EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • TTL-level register preload for testability Low power at 100 mA Icc Extensive third-party software and programmer