TTL LATCH IC Search Results

Contextual Info: DP8480A DP8480A 10k ECL to TTL Level Translator with Latch Literature Number: SNOSBN8A DP8480A 10k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

Contextual Info: DP8482A DP8482A 100k ECL to TTL Level Translator with Latch Literature Number: SNOSBO0A DP8482A 100k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

DP8481

Contextual Info: DP8481 DP8481 TTL to 10k ECL Level Translator with Latch Literature Number: SNOSBN9A DP8481 TTL to 10k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with

Contextual Info: DP8483 DP8483 TTL to 100k ECL Level Translator with Latch Literature Number: SNOSBO1A DP8483 TTL to 100k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with

Contextual Info: DP8480A 10k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs are designed to drive standard 50 pF loads The strobe and

b1045

Abstract: C1995 DP8480A DP8480AJ DP8480AN J16A N16A
Contextual Info: DP8480A 10k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs are designed to drive standard 50 pF loads The strobe and

C1995

Abstract: DP8482A DP8482AJ DP8482AM DP8482AN J16A M16B N16A
Contextual Info: DP8482A 100k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs are designed to drive standard 50 pF loads The strobe and

Contextual Info: DP8482A 100k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs are designed to drive standard 50 pF loads The strobe and

MA1040

Abstract: C1995 DP8483 DP8483F DP8483J DP8483M DP8483N J16A M16B N16A
Contextual Info: DP8483 TTL to 100k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with CS providing for wire ORing of outputs The strobe and chip

Contextual Info: DP8483 TTL to 100k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with CS providing for wire ORing of outputs The strobe and chip

MC100H602

Abstract: MC100H602FN MC10H602 MC10H602FN
Contextual Info: MC10H602, MC100H602 9-Bit Latch TTL to ECL Translator The MC10H/100H602 is a 9–bit, dual supply TTL to ECL translator with latch. Devices in the Motorola 9–bit translator series utilize the 28–lead PLCC for optimal power pinning, signal flow–through and

b1045

Abstract: b1625 b1665 B1645 transistor b1045 B1625 equivalent transistor DP8481 b 1665 DP8481N B1145
Contextual Info: DP8481 TTL to 10k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with CS providing for wire ORing of outputs The strobe and chip

Contextual Info: MC10H602, MC100H602 9−Bit Latch TTL to ECL Translator The MC10H/100H602 is a 9−bit, dual supply TTL to ECL translator with latch. Devices in the ON Semiconductor 9−bit translator series utilize the PLCC−28 for optimal power pinning, signal flow−through

ma1040

Abstract: DP8481
Contextual Info: DP8481 TTL to 10k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with CS providing for wire ORing of outputs The strobe and chip

74AC373D

Abstract: 74AC 74AC373 74AC373PW 74ACT373 74ACT373PW IEC134
Contextual Info: Philips Sem iconductors Product specification 7J Octal D-type transparent latch 3-State A P 070 74ACT373 FEATURES DESCRIPTION • 74ACT373 has TTL-com patible inputs The 74AC373/74ACT373 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs

14011b

Abstract: hc7573 HC589 MC14XXX hc4078 HC4075 HC593 HC4017 TTL LOGIC HC590
Contextual Info: SURFACE MOUNT — MOS PRODUCTS continued Package 14 SOICN SOIC N SOICN SOICN SOICN Recluse Device Octal D-Type Flip-Flop, 3-State, Inverting Output Octal D-Type Flip-Flop, 3-State, Inv Output, TTL LL Octal Transparent Latch, 3-State Octal D-Type Transparent Latch, 3-State, TTL Logic Level

lm 2309

Abstract: DL122 MC100H602 MC10H602
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9-Bit Latch TTLā/āECL Translator MC10H602 MC100H602 The MC10H/100H602 is a 9–bit, dual supply TTL to ECL translator with latch. Devices in the Motorola 9–bit translator series utilize the 28–lead PLCC for optimal power pinning, signal flow–through and electrical

74AC

Abstract: 74AC573 74ACT573 IEC134 MS-013AC S020 mar2813
Contextual Info: Philips Semiconductors Product specification Octal D-typetransparent latch 3-State 7 4 A U 15 7 3 FEATURES DESCRIPTION • 74ACT573 has TTL-com patible inputs The 74AC573/74ACT573 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs

transistor ior 5252

Abstract: 5252 F ic
Contextual Info: IDTQS74FCT2573T/AT HIGH-SPEED CMOS BUS INTERFACE 8-BIT LATCH INDUSTRIAL TEMPERATURE RANGE HIGH-SPEED CMOS BUS INTERFACE 8-BIT LATCH IDTQS74FCT2573T/AT DESCRIPTION: FEATURES: The IDTQS74FCT2573T is an 8-bit high-speed CMOS TTL-compatible buffered latch with 3-state outputs and a 25Ω resistor, useful for driving

Contextual Info: * 9-BIT LATCH ECL-TTL TRANSLATOR SYNERGY SEMICONDUCTOR FEATURES SY10H603 SY100H603 DESCRIPTION • 9-bit ideal for byte-parity applications ■ 3-state TTL outputs ■ ESD protection of 2000V ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize

Contextual Info: IDTQS74FCT2841AT/BT/CT HIGH-SPEED CMOS BUS INTERFACE 10-BIT LATCH INDUSTRIAL TEMPERATURE RANGE HIGH-SPEED CMOS BUS INTERFACE 10-BIT LATCH IDTQS74FCT2841AT/BT/CT DESCRIPTION: FEATURES: The IDTQS74FCT2841T is a 10-bit high-speed CMOS TTL-compatible buffered latch with 3-state outputs, with a 25Ω resister that is useful for driving

74ACT843

Contextual Info: Revised September 2000 74ACT843 9-Bit Transparent Latch General Description Features The ACT843 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths. • TTL compatible inputs

74ACT843

Abstract: 74ACT843SC 74ACT843SPC M24B MS-013 N24C
Contextual Info: Revised December 1998 74ACT843 9-Bit Transparent Latch General Description Features The ACT843 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths. • Has TTL-compatible inputs

74FCT2373T

Abstract: IDTQS74FCT2373T
Contextual Info: IDTQS74FCT2373T/AT HIGH-SPEED CMOS BUS INTERFACE 8-BIT LATCH INDUSTRIAL TEMPERATURE RANGE HIGH-SPEED CMOS BUS INTERFACE 8-BIT LATCH IDTQS74FCT2373T/AT FEATURES: DESCRIPTION: − − − − − − The IDTQS74FCT2373T is an 8-bit high-speed CMOS TTL-compatible