TRUTH TABLE NAND GATE Search Results

Contextual Info: Radiation Tolerant AAHH00 AAHH00 PRELIMINARY DATA Radiation Tolerant Quad 2-Input NAND Gate DESCRIPTION TRUTH TABLE The AAHH00 is part of ASIC Advantage’s family of Radiation Tolerant products aimed at the military and aerospace markets. The AAHH00 is a RadiationTolerant Quad 2 input NAND gate. It utilizes BiCMOS technology and is a replacement to the obsolete

0044300

Abstract: ATL60 P102 3-input NAND gate
Contextual Info: NAN2 ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: 2 input NAND Truth Table: A B | O -0 X | 1 X 0 | 1 1 1 | 0 at60Cells B NAN2 O A VDD! p VDD! p P4 P13 O n B N3 n A N10 VSS! / $Revision: 1.27 $

ATL35

Abstract: P102 truth table nand gate
Contextual Info: NAN2 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: 2-input NAND Truth Table: A B | O -0 X | 1 X 0 | 1 1 1 | 0 ATL55Cells B NAN2 O A VDD! p VDD! p P4 P13 O n B N3 n A N10 VSS! / $Revision: 1.35 $

Contextual Info: 41DF M Dual 3-Input NAND Gate (3-State) The 41DF(M) device is a bipolar, NPN, sealed junction, silicon integrated circuit. It is available in a wire-bonded, 16-pin plastic DIP. Truth Table D isable 1 (13) D is a b le 2 (15) O u tp u t L L (2*3*4) L H (2*3*4)

INA22

Abstract: 0.35 um CMOS gate area
Contextual Info: 0.35 µm CMOS INA22 INA22 is a 2-input NAND gate with one inverted input 2x drive strength. Truth Table Capacitance A B Q Pin Cap [pF] X 1 1 X 1 1 A B 0.008 0.018 Area Power 2 0.141 mils 2 91 µm 0.832 µW/MHz Delay [ns] = tpd. = f SL, L Output Slope [ns] = op_sl. = f(SL, L)

OAI222

Abstract: OAI22 ATL35 OAI22224 OAI222H 014748 023414 p6 n60 ATL35/208
Contextual Info: OAI22 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: 2-input OR into 2-input NAND Truth Table: A A B C | O -X X 0 | 1 1 X 1 | 0 X 1 1 | 0 0 0 1 | 1 ATL55Cells B O OAI22 C VDD! p B P11 p A P7 VDD! p P3 O N10 n n n N30 VSS! N29 VSS! C

OAI22

Abstract: OAI222 orr5 OAI23 ATL60 OAI22224 OAI222H 1314750 014-364
Contextual Info: OAI22 ATL60 CMOS Gate Array cell data sheets 3.3 DESCRIPTION: 2 input OR into 2 input NAND Truth Table: A A B C | O -X X 0 | 1 1 X 1 | 0 X 1 1 | 0 0 0 1 | 1 at60Cells B O OAI22 C VDD! p B P11 p A P7 VDD! p P3 O N10 n n n N30 VSS! N29 VSS! C

NA82

Contextual Info: CUB NA82 R Austria Mikro Systeme International 0.6 µm CMOS NA82 is an 8-input NAND gate with 2x drive strength. Truth Table A B C D E F Capacitance G H Q L X X X X X X X H X L X X X X X X H X X L X X X X X H X X X L X X X X H X X X X L X X X H X X X X X L

74LS47

Abstract: 74LS47 gate diagram pin diagram of 74LS47 ttl 74ls47 7 segment ttl 74ls47 74LS47 functions 74LS47 pin 74LS47 pin configuration 74ls47 PIN DIAGRAM LS 74LS47
Contextual Info: SN54/74LS47 BCD TO 7-SEGMENT DECODER/DRIVER The SN54 / 74LS47 are Low Power Schottky BCD to 7-Segment Decoder / Drivers consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. They offer active LOW, high sink current outputs for driving indicators directly. Seven NAND gates and one driver are connected in pairs

74LS00 TTL

Abstract: TTL 74LS00 74LS00 74ls00 NAND gate 74LS00 DATA 74LS00 truth table NAND 74LS00 74LS00 QUAD 2-INPUT NAND GATE 74LS00DC 74ls00 tphl tplh
Contextual Info: SN54/74LS00 QUAD 2-INPUT NAND GATE • ESD > 3500 Volts QUAD 2-INPUT NAND GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 1 2 3 4 5 6 14 7 1 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION

ttl 74ls10

Abstract: truth table NOT gate 74 74LS10 74LS10 truth table 751A-02 SN54-74LS10 74LS10 TTL 3 input nand gate 74LS10
Contextual Info: SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

4 inputs OR gate truth table

Abstract: 74LS20 TTL 74ls20 truth table NAND gate 74 74Ls20 truth table 751A-02 4 inputs OR gate datasheet truth table NOT gate 74 74LS20 2 input SN74LSXXN
Contextual Info: SN54/74LS20 DUAL 4-INPUT NAND GATE DUAL 4-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

74LS30

Abstract: TTL 74ls30 751A-02 truth table nand gate
Contextual Info: SN54/74LS30 8-INPUT NAND GATE 8-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD

IC of XNOR GATE

Abstract: IC of XOR GATE AND8408 AND8408/D ULLGA8 Package create pulse XOR schmitt trigger ic xnor frequency doubler comparator using 2 xor gates
Contextual Info: AND8408/D Pulse Generation and Signal Conditioning Circuits Using Configurable Multifunction Logic Gates http://onsemi.com Prepared by: Jim Lepkowski ON Semiconductor APPLICATION NOTE Introduction A configurable multifunction logic gate is a versatile IC that can be used to create pulse generation and signal

SN74LS47N PIN DIAGRAM

Abstract: SN74LS47N SN74LS47N DATASHEET of SN74LS47N SN74LS47 SN74LS47N pin configuration SN74LS47D SN74LS47N WITH 7 SEGMENT DISPLAY
Contextual Info: SN74LS47 BCD to 7-Segment Decoder/Driver The SN74LS47 are Low Power Schottky BCD to 7-Segment Decoder/ Drivers consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. They offer active LOW, high sink current outputs for driving indicators directly. Seven NAND gates and one

Contextual Info: S G S-THOtlSON 4 2E D ï'ÏSl'a37 0 0 3 3 S 1 4- 4 B I S 6 T H SGS-THOMSON * 5 T74LS12 ItLG 7 TRIPLE 3-INPUT NAND GATE DESCRIPTION The T74LS12 is a high speed TRIPLE 3-INPUT NAND GATE with open collector output fabricated in LOW POWER SCHOTTKY technology.

MC1472P1

Abstract: mc1472
Contextual Info: M — M O T O R O L A — MC1472 Dual Peripheral-H igh-Voltage Positive “NAND” Driver The dual driver consists of a pair of PNP buffered AN D gates connected to the bases of a pair of high voltage NPN transistors. T hey are sim ilar to the M C75452 drivers but with the added advantages of: 1) 70 V capability

NXP AVC8T245

Contextual Info: NXP demo board for configurable logic device 74AXP1G57 Demonstrate seven different logic functions This compact board makes it easy to evaluate all seven functions of the 74AXP1G57 Key features and benefits `` Wide supply voltage range: 0.7 to 2.75 V `` High noise immunity

HCF4048BE

Abstract: HCC4048B HCC4048BF HCF4048B HCF4048BC1 HCF4048BEY HCF4048BM1 n13a
Contextual Info: HCC/HCF4048B MULTIFUNCTION EXPANDABLE 8-INPUT GATE . . . . . THREE-STATE OUTPUT MANY LOGIC FUNCTIONS AVAILABLE IN ONE PACKAGE QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V, AND 15V PARAMETRIC RATINGS

74LS48

Abstract: 74ls48 PIN OUT decoder 74LS48 TTL 74LS48 74ls48 datasheet 74LS48D LS48 lamptest 561 7 SEGMENT
Contextual Info: SN54/74LS48 BCD TO 7-SEGMENT DECODER The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND-OR-INVERT gates. The remaining

TRANSISTOR kd 321

Abstract: CD4048BMS IOH15 ic 7912 circuit diagram EXPAND15
Contextual Info: CD4048BMS CMOS Multifunction Expandable 8 Input Gate December 1992 Features Pinout • High-Voltage Type 20V Rating CD4048BMS TOP VIEW • Three State Output • Many Logic Functions Available in One Package 16 VDD J (OUTPUT) 1 • Standardize, Symmetrical Output Characteristics

ic D flip flop 7474

Abstract: IC 7474 truthtable philips for ic 7474 7474 D flip-flop circuit diagram PLHS502 7474 D flip-flop IC 7474 flipflop pin DIAGRAM OF IC 7474 INTERNAL DIAGRAM OF IC 7474 any boolean circuit using nand gates
Contextual Info: Philips Semiconductors Programmable Logic Devices Designing with programmable macro logic INTRODUCTION TO PROGRAMMABLE MACRO LOGIC DESIGN CONCEPTS Programmable Macro Logic PML , an extension of the Programmable Logic Array (PLA) concept combines a programming or

Contextual Info: DM74LS22 Dual 4-Input NAND Gate with Open-Collector Output General Description The 'LS22 contains two independent NAND gates, each with four data inputs. Connection Diagram Dual-ln-Llne Package TL/F/10168—1 Order Number DM74LS22M or DM74LS22N See NS Package Number M14A or N14A

SN74LS10

Abstract: SN74LS10d
Contextual Info: SN74LS10 TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 http://onsemi.com TRIPLE 3-INPUT NAND GATE LOW POWER SCHOTTKY 1 2 3 4 5 6 7 GND J SUFFIX CERAMIC CASE 632-08 14 1 N SUFFIX PLASTIC CASE 646-06 14 1 D SUFFIX SOIC CASE 751A-02 14 1 ORDERING INFORMATION