TRUTH TABLE FOR AN ACTIVE HIGH TRI STATE BUFFER Search Results

NTE2114

Contextual Info: NTE2114 Integrated Circuit MOS, Static 4K RAM, 300ns Description: The NTE2114 1024–word 4–bit static random access memory is fabricated using N–channel silicon– gate technology. All internal circuits are fully static and therefore require no clocks or refreshing for

DB1200Z

Contextual Info: NB3N1200K, NB3W1200L 3.3 V 100/133 MHz Differential 1:12 HCSL or Push-Pull Clock ZDB/Fanout Buffer for PCle http://onsemi.com Description The NB3N1200K and NB3W1200L differential clock buffers are DB1200Z and DB1200ZL compliant and are designed to work in

MK3805

Abstract: MK3805RI MK3805RIT OA47
Contextual Info: MK3805 Buffer/Clock Driver Description Features The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input active low with 1-input, 5-output configuration per

MK3805RILF

Abstract: MK3805 OA47
Contextual Info: DATASHEET MK3805 BUFFER/CLOCK DRIVER Description Features The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input active low with 1-input, 5-output configuration per group. The skew between the

mk380

Contextual Info: DATASHEET MK3805 BUFFER/CLOCK DRIVER Description Features The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input active low with 1-input, 5-output configuration per group. The skew between the

marking OA2

Contextual Info: MK3805 Buffer/Clock Driver Description Features The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input active low with 1-input, 5-output configuration per

Contextual Info: NLSV4T3144 4-Bit Dual-Supply Non-Inverting Level Translator The NLSV4T3144 is a 4−bit configurable dual−supply bus buffer level translator. The input IN_xn and output (OUT_xn) ports are designed to track two different power supply rails, VCCA and VCCB

56-PIN

Abstract: 131a7
Contextual Info: PI74LCX16543

MK3805

Abstract: MK3805RI MK3805RILF OA47
Contextual Info: DATASHEET MK3805 BUFFER/CLOCK DRIVER Description Features The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input active low with 1-input, 5-output configuration per group. The skew between the

MK3805

Abstract: MK3805RI MK3805RIT OA47
Contextual Info: MK3805 P R E L I M I N A RY I N F O R M AT I O N Buffer/Clock Driver Description Features The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input active low with 1-input, 5-output configuration per

MK3805RI

Abstract: Tri-State Buffer CMOS MK3805RILF MK3805 MK3805RIT cmos fan out buffer OA47
Contextual Info: DATASHEET MK3805 BUFFER/CLOCK DRIVER Description Features The MK3805 is a non-inverting clock driver/buffer providing two independent banks of four outputs each. These buffers have a tri-state output enable input active low with 1-input, 5-output configuration per group. The skew between the

Contextual Info: PI74LCX16543

74xx76

Abstract: TDA 7247 74XX174 triangle and square wave generator lm339 BA 658 Bar-Graph Display Driver 74xx161 DARLINGTON TRANSISTOR ARRAY ic str 6454 equivalent 74xx11 74XX32
Contextual Info: Electronics Workbench TM Multisim 8 Simulation and Capture TM Component Reference Guide TitleShort-Hidden cross reference text May 2005 371587A-01 Support Worldwide Technical Support and Product Information ni.com National Instruments Corporate Headquarters

Contextual Info: f¡J PER!COM Fast CMOS 3.3V 8-Bit Latched Transceiver Product F eatures: Product Description: • Functionally compatible with FCT3, LVT, and 74 series 543 families of products • Tri-State outputs • 5V Tolerant inputs and outputs • 2.0V-3.6V Vcc supply operation

PS2101

Abstract: PI74LCX541 truth table for an active high tri state buffer
Contextual Info: PI74LCX541

Contextual Info: PI74LCX541

Temic ulc

Abstract: TEMIC DATABOOK XILINX XC2000 TEMIC PLD vantis jtag schematic actel die run marking altera ep
Contextual Info: Design Requirements ULC–Design Checklist To perform the ULC to FPGA or EPLD feasibility study and conversion rapidly and accurately, please fill out the form below and supply the requested material. All questions must be answered. 1. Customer Technical Contact

PI74LCX541

Contextual Info: PI74LCX541

Contextual Info: OBSOLETE LMX2324 www.ti.com SNAS038D – NOVEMBER 1999 – REVISED MARCH 2013 LMX2324 PLLatinum 2.0 GHz Frequency Synthesizer for RF Personal Communications Check for Samples: LMX2324 FEATURES DESCRIPTION • • • The LMX2324 is a high performance frequency

Contextual Info: PI74LCX16374

L9942

Abstract: 74128 fullbridge PowerSSO-24 JESD97 L9942XP1 L9942XP1TR SSO24
Contextual Info: L9942 Integrated stepper motor driver for bipolar stepper motors with microstepping and programmable current profile Features • Two full bridges for max. 1.3 A load RDSON = 500 mΩ ■ Programmable current waveform with look-up table: 9 entries with 5bit resolution

Contextual Info: PI74LCX541

DCS-1800

Abstract: LM2324TMX LMX2324 LMX2324SLBX LMX2324TM MTC16
Contextual Info: March 1999 LMX2324 PLLatinum 2.0 GHz Frequency Synthesizer for RF Personal Communications General Description Features The LMX2324 is a high performance frequency synthesizer with integrated 32/33 dual modulus prescaler designed for RF operation up to 2.0 GHz. Using a proprietary digital

LM2324

Contextual Info: LMX2324 PLLatinum 2.0 GHz Frequency Synthesizer for RF Personal Communications General Description Features The LMX2324 is a high performance frequency synthesizer with integrated 32/33 dual modulus prescaler designed for RF operation up to 2.0 GHz. Using a proprietary digital