TRIPLE 3-INPUT OR GATE Search Results

SP384A

Abstract: SP334A SP374A 7333-A 380J SP333A SP375A
Contextual Info: OR GATES SP333A SP334A SP374A SP375A SP384A Dual 3-Input Expandable Dual 4-Input Expandable Triple 3-Input Triple 2-Input Quad 2-Input PIN CONFIGURATIONS 14 13 12 11 10 9 TRIPLE 3-INPUT DUAL 4-INPUT EXPANDABLE DUAL 3-INPUT EXPANDABLE 8 U 13 12 11 10 9 14 8

Contextual Info: MOTOROLA TRIPLE 2-3-2-INPUT OR/NOR GATE TRIPLE 2-3-2-INPUT OR/NOR GATE The MC10105 is a triple 2-3-2 input OR/NOR gate. P0 = 3 0 mW typ/gate No Load t pd = 2.0 ns typ tr, tf = 2.0 ns typ (20%-80%) fTjfflyP L SUFFIX CERAMIC PACKAGE CASE 620 1 P SUFFIX PLASTIC PACKAGE

CD4073

Abstract: CD4073BCN CD4076BCJ CD407SBCN CD4075BC
Contextual Info: CD4073BM/CD4073BC, CD4075BM/CD4075BC National Æ5m Semiconductor CD4073BM/CD4073BC Double Buffered Triple 3-Input AND Gate CD4075BM/CD4075BC Double Buffered Triple 3-Input OR Gate General Description Features These triple gates are monolithic complementary MOS •

Contextual Info: Section 3 Contents F100101 Triple 5-Input OR/NOR G a te . F100102 Quint 2-Input OR/NOR Gate .

74ls 3-input and gate

Abstract: CD4075BCN cd4073bcn CD4073 CD4073BMJ 74ls 3-input or gate CD4075BC C1995 CD4073BC CD4073BM
Contextual Info: CD4073BM CD4073BC Double Buffered Triple 3-Input AND Gate CD4075BM CD4075BC Double Buffered Triple 3-Input OR Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors They have equal source

HEF4075BP

Abstract: HEF4075B HEF4075BD HEF4075BT
Contextual Info: HEF4075B gates TRIPLE 3-INPUT OR GATE The HEF4075B provides the positive triple 3-input OR function. The outputs are fu lly buffered for highest noise immunity and pattern insensitivity of output impedance. foU^UizUHURJ^UeL *7 Vqd Ig ^8 D HEF4075B I4 Ib li

74HC4075D-Q100

Abstract: 74hc4075
Contextual Info: 74HC4075-Q100; 74HCT4075-Q100 Triple 3-input OR gate Rev. 1 — 22 May 2013 Product data sheet 1. General description The 74HC4075-Q100; 74HCT4075-Q100 is a triple 3-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in

hef4075bp

Contextual Info: HEF4075B gates TRIPLE 3-INPUT OR GATE The HEF4075B provides the positive triple 3-input OR function. The outputs are fu lly buffered for highest noise im m unity and pattern insensitivity o f ou tp u t impedance. Vqd Ig ID lu le I 7 O 3 ^6 HEF4075B I5 I, Iï

74lvc332

Contextual Info: 74LVC332 Triple 3-input OR gate Rev. 1 — 20 March 2013 Product data sheet 1. General description The 74LVC332 is a triple 3-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all

MC10105

Abstract: MC10105L MC10105P MC10105FN t4 1080
Contextual Info: MC10105 Triple 2-3-2-Input OR/NOR Gate • • • The MC10105 is a triple 2–3–2 input OR/NOR gate. PD = 30 mW typ/gate No Load tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com MARKING DIAGRAMS LOGIC DIAGRAM 4 3 5 2 9 10 11 16 CDIP–16

MC10105

Abstract: MC10105L MC10105P MC10105FN
Contextual Info: MC10105 Triple 2-3-2-Input OR/NOR Gate • • • The MC10105 is a triple 2–3–2 input OR/NOR gate. PD = 30 mW typ/gate No Load tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%–80%) http://onsemi.com MARKING DIAGRAMS LOGIC DIAGRAM 4 3 5 2 9 10 11 16 CDIP–16

MC10105

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple 2-3-2-Input OR/NOR Gate MC10105 The MC10105 is a triple 2 -3 -2 input OR/NOR gate. P q = 30 mW typ/gate No Load tpd = 2.0 ns typ tr, tf = 2.0 ns typ (20%-80%) P S U FF IX PLASTIC PACKAGE CASE 648-08 LOGIC DIAGRAM

MC10105

Contextual Info: MOTOROLA TRIPLE 2-3-2-INPUT OR/NOR GATE The MC10105 is a triple 2-3-2 input OR/NOR gate. Pq = 30 m W typ/gate No Load tpd * 2.0 ns typ L SUFFIX CERAMIC PACKAGE CASE 620 tr, tf » 2.0 ns typ (20% -80% ) i P SUFFIX PLASTIC PACKAGE CASE 648 FN SUFFIX PLCC CASE 775

se648

Abstract: mc10123
Contextual Info: MOTOROLA MC10123 TRIPLE 4-3-3 INPUT BUS DRIVER TRIPLE 4-3-3 INPUT BU S DRIVER The MC10123 consists of three NOR gates designed for bus driving applications on card or between cards. Output iow logic levels are specified with V q l = ” 2.1 Vdc so that the bus may be

TC4072BP

Abstract: TC4075BP TC4075 TC4072BF
Contextual Info: TC4071BP/BF, TC4072BP/BF, TC4075BP/BF C2M O S DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4071BP/TC4071BF QUAD 2 INPUT OR GATE TC4072BP/TC4072BF DUAL 4 INPUT OR GATE TC4075BP/TC4075BF TRIPLE 3 INPUT OR GATE TC4071BP/BF, TC4075BP/BF and TC4072BP/BF are

Contextual Info: Revised February 2005 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description Features The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage 2.5V or 3.3V operation with the added capability of interfacing to a

74LCX11M

Abstract: 74LCX11MTC 74LCX11SJ M14A M14D MTC14 74LCX11
Contextual Info: Revised March 1999 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description Features The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage 2.5V or 3.3V operation with the added capability of interfacing to a

Contextual Info: Revised June 2005 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description Features The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage 2.5V or 3.3V operation with the added capability of interfacing to a

74LCX11

Abstract: 74LCX11BQX 74LCX11M 74LCX11MTC 74LCX11MTCX 74LCX11MX 74LCX11SJ M14A M14D
Contextual Info: Revised July 2005 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description Features The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage 2.5V or 3.3V operation with the added capability of interfacing to a

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4071

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

7706002CA

Abstract: CD4071B CD4071BE CD4071BF CD4071BF3A CD4071BM CD4071BM96 CD4071BM96E4 CD4072B CD4075B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

7706002CA

Abstract: CD4071B CD4071BE CD4071BEE4 CD4071BF CD4071BF3A CD4071BF3AS2534 CD4071BM CD4072B CD4075B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR