TRAP FLOATING POINT Search Results
TRAP FLOATING POINT Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
---|---|---|---|---|---|
LQW18CN4N9D0HD | Murata Manufacturing Co Ltd | Fixed IND 4.9nH 2600mA POWRTRN | |||
LQW18CNR33J0HD | Murata Manufacturing Co Ltd | Fixed IND 330nH 630mA POWRTRN | |||
DFE322520F-R47M=P2 | Murata Manufacturing Co Ltd | Fixed IND 0.47uH 8500mA NONAUTO | |||
DFE32CAH4R7MR0L | Murata Manufacturing Co Ltd | Fixed IND 4.7uH 2800mA POWRTRN | |||
LQW18CNR27J0HD | Murata Manufacturing Co Ltd | Fixed IND 270nH 750mA POWRTRN |
TRAP FLOATING POINT Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
---|---|---|---|
16 BIT ALU design structuralContextual Info: Chapter 2 TurboSPARC Architecture 2.1 INTEGER UNIT AND FLOATING POINT CONTROLLER The integer unit IU and floating point control (FPC) are merged into a 9-stage pipeline. Below are some of the features of the IUFPC. • 9 stage instruction pipeline. • No branch folding. Branch instructions (taken/non-taken) execute in one cycle. |
Original |
||
ERC32
Abstract: TSC691E TSC692E TSC693E FPU-TSC692E SPARC V7.0
|
Original |
TSC692E ERC32) TSC692E 602MODE ERC32 TSC691E TSC693E FPU-TSC692E SPARC V7.0 | |
TSC693E
Abstract: SPARC V7.0 ERC32 sparc v7 TSC691E TSC692E ATMEL 342
|
Original |
TSC692E ERC32) TSC692E 602MODE TSC693E SPARC V7.0 ERC32 sparc v7 TSC691E ATMEL 342 | |
sparc v7
Abstract: Trap floating point TSC691E 32 bit carry select adder code ERC32 erc32 inexact floating point Trap F28-F29 TSC692E TSC693E tsc691
|
Original |
TSC692E ERC32) TSC692E 602MODE sparc v7 Trap floating point TSC691E 32 bit carry select adder code ERC32 erc32 inexact floating point Trap F28-F29 TSC693E tsc691 | |
B5110
Abstract: "Bipolar Integrated Technology" B5100 B5210 CA10 instruction set Sun SPARC T6
|
OCR Scan |
B5100 B5110/B5120 64-bit 36-bit B5210 B5110 B5120 MKTG-D011 014123V_ "Bipolar Integrated Technology" B5100 CA10 instruction set Sun SPARC T6 | |
Contextual Info: 7 IEEE Floating-Point Conformance The 21164 supports the IEEE floating-point operations as defined by the Alpha architecture. Support for a complete implementation of the IEEE Standard fo r Binary Floating-Point Arithmetic ANSI/IEEE Standard 754 1985 is provided by a |
OCR Scan |
||
Contextual Info: 7 Alpha 21164 Microprocessor IEEE Floating-Point Conformance The 21164 supports the IEEE floe ting-point operations as defined by the Alpha architecture. Support for a complete implementation of the IEEE Standard for Binary Floating-Point Arithmetic ANSI/IEEE Standard 754 1985 is |
OCR Scan |
||
Contextual Info: A l p h a 2 1 1 6 4 M i c r o p r o c e s s o r IEEE F l o a t i n g - P o i n t Conform ance The 21164 supports the IE E E floating-point operations as defined by the Alpha architecture. S u p p o rt for a complete im p le m e n ta tio n of the IE E E S ta n d a r d |
OCR Scan |
||
FGT 313Contextual Info: in te i ¡860 XR 64-BIT MICROPROCESSOR • Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for |
OCR Scan |
64-BIT lntel386TM/486TM 168-pin 128-Bit 80860XR FGT 313 | |
Intel i860Contextual Info: INTEL CORP UP/PRPHLS bflE » • 4ñ2bl7S Dia^flSb in te i i860 XR 64-BIT MICROPROCESSOR ■ Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per |
OCR Scan |
64-BIT 128-Bit 32-Bit 32/64-Bit 80860XR Intel i860 | |
NS32016
Abstract: NS32032 NS32381V-15 10b38 NS32381 NS32008 NS32081 NS32381U NS32381V-30 NS32GX320
|
Original |
NS32381-15 NS32381-20 NS32381-25 NS32381-30 NS32381 NS32081 32-bit NS32016 NS32032 NS32381V-15 10b38 NS32008 NS32381U NS32381V-30 NS32GX320 | |
NS32016
Abstract: NS32032 NS32008 NS32000 NS32381 N3325 NS32381-25 NS32532 91571-3 NS32081
|
OCR Scan |
NS32381 -15/NS32381-20/NS32381-25/NS32381 NS32081 NS32GX32 NS32CG16, NS32008 NS32532, NS32016 NS32032 NS32000 N3325 NS32381-25 NS32532 91571-3 | |
NS32032
Abstract: NS32008 NS32081 NS32GX32
|
OCR Scan |
NS32381-15/NS32381-20 NS32381-15/N S32381-20 NS32381-25/NS32381-30 NS32381 NS32081 NS32GX32 NS32CG16, NS32008 NS32032 | |
NS32008
Abstract: 916741 NS32081 NS32032 NS32GX32
|
OCR Scan |
NS32381-15/NS32381-20 32381-15/NS32381-20/NS32381-25/NS32381-30 NS32381 NS32081 NS32GX32 NS32CG16, NS32008 NS32532, 916741 NS32032 | |
|
|||
UT699Contextual Info: Aeroflex Colorado Springs Errata UT699 LEON 3FT Microprocessor GRFPU/GPC Floating Point Errata Overview This errata document covers all known bugs in the GRFPU/FPC Floating Point Unit present in GRLIB revision 1996, affecting the UT699 LEON 3FT Microprocessor. |
Original |
UT699 | |
weitek
Abstract: XL-8137 weitek FPU weitek 3132 D630 diagram IEEE 3 bus datas weitek xl-3132 8137 weitek XL-8000-120-GCD Weitek xl-8136
|
OCR Scan |
XL-8000: XL-8032: XL-8064: 32-word XL-8000-080-GCD XL-8000 144-Pin XL-8032-1 20-GCD weitek XL-8137 weitek FPU weitek 3132 D630 diagram IEEE 3 bus datas weitek xl-3132 8137 weitek XL-8000-120-GCD Weitek xl-8136 | |
IEEE-1754
Abstract: leon3 processor vhdl leon3 vhdl model sparc v8 floatingpoint addition vhdl VHDL code for floating point addition processor control unit vhdl code leon3 RTAX2000S RTAX2000S-1
|
Original |
IEEE-STD-754 64-bit IEEE-1754 leon3 processor vhdl leon3 vhdl model sparc v8 floatingpoint addition vhdl VHDL code for floating point addition processor control unit vhdl code leon3 RTAX2000S RTAX2000S-1 | |
weitek 3164
Abstract: WTL-3164-15 weitek FPU weitek AADD CA001 NS32532 t03h 32580-WTL3164 R4X20
|
OCR Scan |
NS32580-20/NS32580-25/NS32580-30 NS32580 NS32532 NS32081 weitek 3164 WTL-3164-15 weitek FPU weitek AADD CA001 t03h 32580-WTL3164 R4X20 | |
RT5014
Abstract: NS32081 BC-NB weitek S3258 e9421
|
OCR Scan |
NS32580-20/NS32580-25/NS32580-30 NS32580-20/NS32580-25/NS32580-30 NS32580 NS32532 NS32081 RT5014 BC-NB weitek S3258 e9421 | |
XO-31
Abstract: AAD00-AAD04 wtl3164 weitek NS32580-30 NS32081
|
OCR Scan |
NS32580-20/NS32580-25/NS32580-30 NS32580-20/NS32580-25/NS32580-30 NS32580 NS32532 NS32081 XO-31 AAD00-AAD04 wtl3164 weitek NS32580-30 | |
XL-8137
Abstract: XL-8136 xl8137 P1111 bit-slice l8032
|
OCR Scan |
XL-8000: XL-8032: L-8064: 32-word L-8000-080-G XL-8000 144-Pin L-8032-120-G XL-8137 XL-8136 xl8137 P1111 bit-slice l8032 | |
MB86907
Abstract: 00FF mb8690
|
Original |
PP-UM-20383-10/96 MB86907 00FF mb8690 | |
mb86901Contextual Info: F U J IT S U High Performance 32-Bit RISC Processor SPARC FEATURES • Architecture supports scalability towards faster technologies • Address presentation which supports highperformance cache • 15 times V A X ™ 11/780 equivalent MIPS typical performance |
OCR Scan |
32-Bit MB86911 CH23001 mb86901 | |
NS32016
Abstract: NS32081
|
OCR Scan |
NS32081-10/NS32081-15 NS32081-10/NS32081-15 NS32081 32-bit 64-bit NS32016, NS32008 NS32032 TL/EE/5234-21 TL/EE/5234-22 NS32016 |