TRAILING TTL ACTIVE DELAY LINE Search Results

digital delay lines

Contextual Info: ACTIVE DIGITAL DELAY LINES SINGLE, DUAL, TRIPLE, QUAD DELAYS A0 SERIES RoHS RESISTORS CAPACITORS COILS DELAY LINES Term.W is Pb-free and RoHS compliant Economical cost, prompt delivery! Wide range of values, 5nS to 500nS TTL schottky interfaced OPTIONS Opt.T= trailing edge design

45AF

Abstract: 300f diode 100td 55A-150F 55A150
Contextual Info: Yuan Dean Scientific CO.,LTD 14 PIN LEADING & TRAILING FAST TTL ACTIVE DELAY LINE FEATURES 45AF/47AF/55AF SERIES • 14-PIN PACKAGE. • 5EQUALLY-SPACED TAPS. • FAST TTL SCHOTTKY INTERFACED. • TOTAL DELAYS FROM 25-1000nS. • TPLH AND TPHL CONTROLLED.

TRAILING TTL ACTIVE DELAY LINE

Abstract: 55a07
Contextual Info: Yuan Dean Scientific CO.,LTD 14 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE FEATURES • • • • • 45A/47A/55A SERIES 14-PIN PACKAGE. 5EQUALLY-SPACED TAPS. TTL SCHOTTKY INTERFACED. TOTAL DELAYS FROM 25-1000nS. TPLH AND TPHL CONTROLLED. ELECTRICAL CHARACTERISTICS

55A300

Abstract: 55A0 55A150 55a07 55A-050 55a05
Contextual Info: Yuan Dean Scientific CO.,LTD 14 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE FEATURES 45A/47A/55A SERIES • 14-PIN PACKAGE. • 5EQUALLY-SPACED TAPS. • TTL SCHOTTKY INTERFACED. • TOTAL DELAYS FROM 25-1000nS. • TPLH AND TPHL CONTROLLED. ELECTRICAL CHARACTERISTICS

Contextual Info: 45A/47A/55A SERIES 14 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE FEATURES • • • • • 14-PIN PACKAGE. 5EQUALLY-SPACED TAPS. TTL SCHOTTKY INTERFACED. TOTAL DELAYS FROM 25-1000nS. TPLH AND TPHL CONTROLLED. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current

TRAILING TTL ACTIVE DELAY LINE

Abstract: 76A50
Contextual Info: Yuan Dean Scientific CO.,LTD 14 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE 65A/63A/76A SERIES FEATURES • 14-PIN PACKAGE. • 10 EQUALLY-SPACED TAPS. • TTL SCHOTTKY INTERFACED. • TOTAL DELAYS FROM 25-1000nS. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current

24a50

Abstract: 24A15 15a transistor 24A05 24a050
Contextual Info: 15A/14A/24A SERIES 8 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE FEATURES • • • • 8-PIN PACKAGE. 5EQUALLY-SPACED TAPS. TTL SCHOTTKY INTERFACED. TOTAL DELAYS FROM 25-1000nS. ELECTRICAL CHARACTERISTICS IIH LOGIC”1” INPUT CURRENT IIL LOGIC”0” INPUT CURRENT

24a05

Abstract: 24A100 24A15 24a50 24a050
Contextual Info: Yuan Dean Scientific CO.,LTD 8 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE FEATURES 15A/14A/24A SERIES • 8-PIN PACKAGE. • 5EQUALLY-SPACED TAPS. • TTL SCHOTTKY INTERFACED. • TOTAL DELAYS FROM 25-1000nS. ELECTRICAL CHARACTERISTICS IIH LOGIC”1” INPUT CURRENT

76A50

Abstract: TRAILING TTL ACTIVE DELAY LINE
Contextual Info: Yuan Dean Scientific CO.,LTD 14 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE 65A/63A/76A SERIES FEATURES • • • • 14-PIN PACKAGE. 10 EQUALLY-SPACED TAPS. TTL SCHOTTKY INTERFACED. TOTAL DELAYS FROM 25-1000nS. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current

Contextual Info: 65A/63A/76A SERIES 14 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE FEATURES • • • • 14-PIN PACKAGE. 10 EQUALLY-SPACED TAPS. TTL SCHOTTKY INTERFACED. TOTAL DELAYS FROM 25-1000nS. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current IIL Logic”0” Input Current

Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nS TOTAL DELAYS ±5% or ±2 nS 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 EPA460-50 EPA460-60 EPA460-75 EPA460-100 EPA460-125 EPA460-150 EPA460-175

EPA460-100

Abstract: EPA460-125 EPA460-150 EPA460-175 EPA460-200 EPA460-225 EPA460-250 EPA460-300 EPA460-50 EPA460-60
Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nS† TOTAL DELAYS ±5% or ±2 nS† 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 †Whichever is greater. 50 60 75 100 125 150 175 200 225

Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nS 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 50 60 75 100 125 150 175 200 225 250 300 350 400 420 EPA460-50 EPA460-60 EPA460-75 EPA460-100

Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nS TOTAL DELAYS ±5% or ±2 nS 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 TAP DELAYS ±5% or ±2 nS PART NUMBER 50 60 75 100 125 150 175 200

EPA460-100

Abstract: EPA460-125 EPA460-150 EPA460-175 EPA460-200 EPA460-225 EPA460-250 EPA460-300 EPA460-50 EPA460-60
Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nS† TOTAL DELAYS ±5% or ±2 nS† 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 †Whichever is greater. 50 60 75 100 125 150 175 200 225

Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nSt TOTAL DELAYS ±5% or ±2 nSf 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 50 60 75 100 125 150 175 200 225 250 300 350 400 420 f Whichever is greater.

Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nSf TOTAL DELAYS +5% or ±2 nSf 50 60 75 100 125 150 175 200 225 250 300 350 400 420 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 f Whichever is greater.

EPA460-100

Abstract: EPA460-125 EPA460-150 EPA460-440 EPA460-450 EPA460-470 EPA460-50 EPA460-500 EPA460-550 EPA460-60
Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 n S f TOTAL DELAYS ±5% or ±2 n S f 50 60 75 100 125 150 175 200 225 250 300 350 400 420 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 f Whichever is greater.

Contextual Info: D S 1003 DS1003 4-Tap Silicon Delay Line for RISC Applications DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • All-silicon time delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays NC • Leading and trailing edge precision

DS1003

Abstract: DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M R3000
Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications FEATURES PIN ASSIGNMENT • All-silicon time delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision • Preserves input symmetry

DS1003

Abstract: DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M R3000
Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications FEATURES PIN ASSIGNMENT • All-silicon time delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision • Preserves input symmetry

Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications DALLAS SEMICONDUCTOR FEATURES PIN ASSIGNMENT • All-silicon time delay IN • Four delayed clock phases from input NC • Input frequency independent NC • Precise tap-to-tap delays NC • Leading and trailing edge precision

74F04

Abstract: DS1045 DS1045-3 DS1045-4 DS1045-5 DS1045S J-STD-020A
Contextual Info: DS1045 4-Bit Dual Programmable Delay Line www.dalsemi.com FEATURES All-silicon time delay Two programmable outputs from a single input produce output-to-output delays between 9 and 84 ns depending on device type Programmable via four input pins Programmable increments of 3 to 5 ns with a

74F04

Abstract: DS1045 DS1045-3 DS1045-4 DS1045-5 DS1045S J-STD-020A
Contextual Info: DS1045 4-Bit Dual Programmable Delay Line www.maxim-ic.com FEATURES All-silicon time delay Two programmable outputs from a single input produce output-to-output delays between 9ns and 84ns depending on device type Programmable via four input pins Programmable increments of 3ns to 5ns with