TRAILING TTL ACTIVE DELAY LINE Search Results

Contextual Info: 45A/47A/55A SERIES 14 PIN LEADING & TRAILING TTL ACTIVE DELAY LINE FEATURES • • • • • 14-PIN PACKAGE. 5EQUALLY-SPACED TAPS. TTL SCHOTTKY INTERFACED. TOTAL DELAYS FROM 25-1000nS. TPLH AND TPHL CONTROLLED. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current

Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nS† TOTAL DELAYS ±5% or ±2 nS† 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 †Whichever is greater. 50 60 75 100 125 150 175 200 225

EPA460-100

Abstract: EPA460-125 EPA460-150 EPA460-175 EPA460-200 EPA460-225 EPA460-250 EPA460-300 EPA460-50 EPA460-60
Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 nS† TOTAL DELAYS ±5% or ±2 nS† 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 †Whichever is greater. 50 60 75 100 125 150 175 200 225

EPA460-100

Abstract: EPA460-125 EPA460-150 EPA460-440 EPA460-450 EPA460-470 EPA460-50 EPA460-500 EPA460-550 EPA460-60
Contextual Info: 14 Pin DIP 10 Tap TTL Compatible Active Delay Lines with Leading And Trailing Edge Precision TAP DELAYS ±5% or ±2 n S f TOTAL DELAYS ±5% or ±2 n S f 50 60 75 100 125 150 175 200 225 250 300 350 400 420 5 6 7.5 10 12.5 15 17.5 20 22.5 25 30 35 40 42 f Whichever is greater.

DS1003

Abstract: DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M R3000
Contextual Info: DS1003 DS1003 4-Tap Silicon Delay Line for RISC Applications FEATURES PIN ASSIGNMENT • All-silicon time delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision • Preserves input symmetry

9.1 b2

Abstract: 74LS family delay line programmable delay line 74F04 DS1045 DS1045-2 DS1045-3 DS1045-4 DS1045-5
Contextual Info: DS1045 DS1045 4-Bit Dual Programmable Delay Line FEATURES PIN ASSIGNMENT • All–silicon time delay • Two programmable outputs from a single input produce output–to–output delays between 9 and 84 ns depending on device type • Programmable via four input pins

Contextual Info: DALLAS SEMICONDUCTOR DS1045 4-Bit Dual Programmable Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • Two programmable outputs from a single input pro­ duce output-to-output delays between 9 and 84 ns depending on device type • Programmable via four input pins

350CL

Abstract: opto isolator photodiode 2600C ICPL2601 ICPL2611 OPTO ISOLATOR high temperature high speed opto isolator
Contextual Info: ICPL2611 HIGH CMR, HIGH SPEED OPTO ISOLATOR Dimensions in mm 2.54 DESCRIPTION The ICPL 2611 consists of a GaAsP emitting diode and a unique integrated detector. The photons are detected by a photodiode and then amplified by a high gain linear amplifier that drives a logic gate with a strobable output.

74ls series

Abstract: DS1013-100 74LS DS1013 DS1013-10 DS1013-12 DS1013-15 DS1013-20 DS1013M DS1013S
Contextual Info: DS1013 DS1013 3-in-1 Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 3 independent buffered delays • Delay tolerance ±2ns for -10 through -60 • Stable and precise over temperature and voltage range • Leading and trailing edge accuracy

Contextual Info: DS1005 DALLAS DS1005 5-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN DESCRIPTION • All-silicon time delay • 5 taps equally spaced itC 1 14 ] V c c nc£ 2 13 3 12 ]]TAP 1 TAP 4 Ü Delay tolerance +/- 2 ns or +/- 2%, whichever ncQ is greater

ic ttl 74ls

Abstract: 150MIL 74F04 74LS DS1100 DS1100L DS1100LU DS1100LZ DS1100LZ-250 J-STD-020A
Contextual Info: DS1100L 3.3V 5-Tap Economy Timing Element Delay Line www.maxim-ic.com PIN ASSIGNMENT FEATURES § § § § § § § § § § § All-Silicon Timing Circuit Five Taps Equally Spaced Delays are Stable and Precise Both Leading- and Trailing-Edge Accuracy 3.3V Version of the DS1100

150MIL

Abstract: 74F04 74LS DS1000 DS1100 J-STD-020A
Contextual Info: DS1100 5-Tap Economy Timing Element Delay Line www.maxim-ic.com PIN ASSIGNMENT FEATURES § § § § § § § § § § § § All-Silicon Timing Circuit Five Taps Equally Spaced 5V Operation Delays are Stable and Precise Both Leading- and Trailing-Edge Accuracy

bjt specifications

Abstract: LDL025 BJT characteristics J 6812 TTLDL25 MIL-D-83532 TTLDL50 all bjt LDL075 TLDL050
Contextual Info: High-Performance Surface-Mount TTL Delay Lines CTTLDL, BJTTLDL, GBTTLDL, BTTLDL n Military models with temperature range -55 to n Five equal taps in 20% increments of total delay. n Lumped constant, active series. n Transfer-molded packaging for highest reliability.

DS1666

Abstract: DS2011D 74F04 DS1003 DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M
Contextual Info: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay IN • Four delayed clock phases from input NC • Input frequency independent NC NC • Precise tap-to-tap delays • Leading and trailing edge precision

Contextual Info: DS1013 DALLAS s e m ic o n d u c to r DS1013 3 -in -1 Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 3 independent buffered delays • Delay tolerance ±2ns for -10 through -65 Vcc IN 1 E 1 16 3 Vcc NC NCC 2 15 ] NC C 3 14 H NC IN 2 [ I

DL100

Abstract: MIL-D-83532 TTLDL025 TTLDL050 TTLDL075 TTLDL100 TTLDL125 TTLDL150 TTLDL200 TTLDL250
Contextual Info: High-Performance TTL and FAST Delay Lines n n 5 to 500 ns delays available. Five equal taps in 20% increments of total delay. n Lumped constant, active series. n Transfer-molded packaging for highest reliability. n Available in low profile, .250 inch high military MX series for

74LS

Abstract: DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M DS1005S
Contextual Info: DS 1005 DALLAS r DS1005 5-Tap Silicon Delay Line s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • All-silicon time delay IN 1 14 ] Vcc IN £ 1 16 H VCC NC 2 13 ] NC NC C 2 15 n NC C 3 14 H NC NC 3 12 TAP 2 C 4 13 H TAP 1 • Stable and precise over temperature and voltage

DS1110

Abstract: DS1110L DS1110LE-100 DS1110LE-125 DS1110LE-150 DS1110LE-175 DS1110LE-200 DS1110LE-250 DS1110LE-300 DS1110LE-350
Contextual Info: XX-XXXX; Rev 0; 5/02 3V 10-Tap Silicon Delay Line The DS1110L 10-tap delay line is a 3V version of the DS1110. It has 10 equally spaced taps providing delays from 10ns to 500ns. The DS1110L series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever

Contextual Info: Compact, Standard-Performance TTL Delay Lines HTTL 8-pin DIP n 5 to 500 ns delays available. n Five equal taps in 20% increments of total delay. n Temperature coefficient + 2 ns or + 4% whichever is greater at maximum delay, 0 to 70oC. n Compatible with Schottky TTL, low-power Schottky TTL, FACT, AS, ALS

Contextual Info: DALLAS SEMICONDUCTOR FEATURES D S 10 10 10-Tap Silicon Delay Line PIN A S S IG N M E N T • All-silicon time delay • 10 taps equally spaced • Delays are stable and precise • Leading and trailing edge accuracy • Delay tolerance ±5% or ±2 ns, whichever is greater

74F04

Abstract: 74LS DS1000 DS1000-IND DS1000M DS1000Z
Contextual Info: DS1000 5-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 5 taps equally spaced Delays are stable and precise Both leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Low-power CMOS TTL/CMOS-compatible

TLDL050AM

Abstract: MIL-D-83532
Contextual Info: Special-Package High-Performance Surface-Mount TTL Delay Lines n Five equal taps in 20% increments of total delay. n Lumped constant, active series. n Transfer-molded packaging for highest reliability. GCTTLDL, GTTLDL n Military models with temperature range -55 to

74F04

Abstract: DS1004 DS1004M DS1004Z
Contextual Info: DS1004 DS1004 5-Tap High–Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All–silicon timing circuit • Five equally delayed clock phases per input IN 1 8 Vcc TAP 2 2 7 TAP 1 • Precise tap–to–tap delay tolerances of TAP 4 3 6 TAP 3 GND 4 5 TAP 5

10KW

Abstract: 74F04 DS1021 DS1021S
Contextual Info: DS1021 DS1021 Programmable 8-Bit Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • Models with 0.25 ns and 0.5 ns steps • Programmable using 3-wire serial port or 8-bit parallel port IN 1 16 VCC E Q/PO 2 15 OUT 3 14 S P1 4 5 13 12