TQFP-100 FOOTPRINT Search Results

Contextual Info: XC95144XV High-Performance CPLD R DS051 v2.0 January 25, 2001 1 Advance Product Specification Features Power Estimation • 144 macrocells with 3,200 usable gates • Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins)

a6252

Abstract: CS144 TQ100 TQ144 XC9500XV XC95144XV
Contextual Info: XC95144XV High-Performance CPLD R DS051 v2.2 August 27, 2001 1 Advance Product Specification Features Power Estimation • 144 macrocells with 3,200 usable gates • Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins)

qfn 44 PACKAGE footprint

Abstract: qfn 76 PACKAGE footprint ML6652CM qfn 48 PACKAGE footprint QFN 36 footprint qfn 64 pcb layout ML6652CH ML6652 LPCC44 eco solder paste
Contextual Info: AN-002 - ML6652 TQFP-LPCC DUAL FOOTPRINT TECHNIQUE AN-002 ML6652 TQFP-LPCC DUAL FOOTPRINT TECHNIQUE Introduction In November 2003, the ML6652CM/EM package version of the ML6652 10/100 Mb/s Ethernet Media Converter was introduced. The ML6652CM/EM is the QFN/LPCC44 package version of the ML6652. The

k3402

Abstract: 131C-6 XC95144XV-7TQ144I CS144 TQ100 TQ144 XAPP361 XC9500XV XC95144XV
Contextual Info: XC95144XV High-Performance CPLD DS051 v2.7 August 21, 2003 1 Features • • • • • • • • 144 macrocells with 3,200 usable gates Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins) - 144-pin CSP (117 user I/O pins)

Contextual Info: XC95144XV High-Performance CPLD DS051 v2.6 June 18, 2003 1 Features • • • • • • • • 144 macrocells with 3,200 usable gates Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins) - 144-pin CSP (117 user I/O pins)

Contextual Info: XC95144XV High-Performance CPLD DS051 v2.5 September 13, 2002 1 Features • • • • • • • • 144 macrocells with 3,200 usable gates Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins) - 144-pin CSP (117 user I/O pins)

XC95144

Contextual Info: XC95144XV High-Performance CPLD DS051 v2.8 April 15, 2005 1 Features • • • • • • • • 144 macrocells with 3,200 usable gates Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins) - 144-pin CSP (117 user I/O pins)

Contextual Info: XC95144XV High-Performance CPLD DS051 v2.4 June 25, 2002 1 Features • • • • • • • • 144 macrocells with 3,200 usable gates Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins) - 144-pin CSP (117 user I/O pins)

Contextual Info: Empty 100-pin TQFP PT MCU CARD 2 v7 Supported microcontrollers PIC32MX320F128L PIC32MX340F128L PIC32MX360F256L PIC32MX360F512 PIC32MX440F128 PIC32MX460F256L PIC32MX460F512L v7 Bill of Materials for PT MCU card 2 Designator Comment Footprint C1 100nF 0603 C2

ABM7

Contextual Info: Empty 100-pin TQFP PF MCU CARD 2 v7 Supported microcontrollers PIC24FJ64GA010 PIC24FJ96GA010 PIC24FJ128GA010 Bill of Materials for PF MCU card 2 Designator Comment Footprint C1 100nF 0603 C2 100nF 0603 PIC24HJ64GP210A C3 100nF 0603 dsPIC33FJ64GP310A C4 100nF

Contextual Info: Empty 100-pin TQFP PT MCU CARD 1 v7 Supported microcontrollers PIC32MX534F064L Bill of Materials for PT MCU card 1 Designator Comment Footprint PIC32MX564F128L C1 100nF 0603 PIC32MX575F256L C2 100nF 0603 C3 100nF 0603 PIC32MX664F128L C4 100nF 0603 PIC32MX675F256L

56 ELCO

Contextual Info: Empty 100-pin TQFP PF MCU CARD 1 v7 Supported microcontrollers PIC32MX534F064L Bill of Materials for PF MCU card 1 Designator Comment Footprint C1 100nF 0603 C2 100nF 0603 C3 100nF 0603 PIC32MX664F064L C4 100nF 0603 PIC32MX664F128L C5 100nF 0603 PIC32MX675F256L

Contextual Info: A Advance information •■ I l AS7C3256K36Z AS7C3256K32Z 3.3V 256Kx32/36 synchronous burst SRAM with NTD Features • • • • • • • • • Multiple packaging options - Economical 100-pin TQFP package - Chip-scale fBGA package for smallest footprint

Contextual Info: Siliconsusktns SSI 32P4904 PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo A TDK G roup/C om pany Advance Information November 1994 Small footprint 100-Lead TQFP and 100-Lead QFP packages DESCRIPTION The SSI 32P4904 is a high performance BiCMOS read channel 1C that provides all of the functions needed to

sd3-75

Abstract: FDC37C67X FDC37C93X cross PD6 GP20 GP25 SA10 SMSC Corporation cross reference
Contextual Info: APPLICATION NOTE 6.13 FDC37C67x/FDC37C93x Dual Footprint By Nizar Azzam This document describes a dual footprint layout for the FDC37C67x and the FDC37C93x. The FDC37C67x is a 100 pin QFP/TQFP package and the FDC37C93x is a 160 pin QFP package. Refer to FDC37C67x and

ADA17

Contextual Info: Advance information •■ I l AS7C3256K36Z AS7C3256K32Z A 3.3V 2 5 6 K x 32/36 synchronous burst SRAM with ZBT1 Features Multiple packaging options - Economical 100-pin TQFP package - Chip-scale fBGA package for smallest footprint Byte write enables Qock enable for operation hold

Contextual Info: Empty 100-pin TQFP PT ETHERNET v7 Bill of Materials for PT ETHERNET MCU card Supported microcontrollers Designator Comment Footprint C1 100nF 0603 C2 100nF 0603 C3 100nF 0603 C4 100nF 0603 C5 100nF 0603 C6 100nF 0603 C7 100nF 0603 C8 22pF 0603 C9 22pF 0603

8253 amd

Abstract: 32P4904 analog servo fundamentals 32H6521
Contextual Info: SSI 32P4904 c i é c o n s y s k m PRML Read Channel with PR4, 8/9 ENDEC, FWR Servo s A TDK G r o u p / C o m p a n y Advance Information November 1994 DESCRIPTION • Small footprint 100-Lead TQFP and 100-Lead QFP packages The SSI 32P4904 is a high performance BiCMOS read

SERIRQ

Abstract: cross PD6
Contextual Info: APPLICATION NOTE 6.13 FDC37C67x/FDC37C93x Dual Footprint By Nizar Azzam This document describes a dual footprint layout for the FDC37C67x and the FDC37C93x. The FDC37C67x is a 100 pin QFP/TQFP package and the FDC37C93x is a 160 pin QFP package. Refer to FDC37C67x and FDC37C93x data sheets for more information.

DS052

Contextual Info: XC9572XV High-performance CPLD R DS052 v2.7 January 16, 2006 5 Features • • • • • • • • 72 macrocells with 1,600 usable gates Available in small footprint packages - 44-pin VQFP (34 user I/O pins) - 100-pin TQFP (72-user I/O pins) Optimized for high-performance 2.5V systems

xc95144xl tq144

Contextual Info: XC95144XL High Performance CPLD DS056 v1.3 October 13, 2000 5 Features • • • • • • • • • • • 5 ns pin-to-pin logic delays System frequency up to 222 MHz 144 macrocells with 3,200 usable gates Available in small footprint packages - 100-pin TQFP (81 user I/O pins)

XC95144XL-10TQG100C

Abstract: XC95144XL-10TQ100I XC95144XL-10CSG144C XC95144XL-10TQ144I XC95144XL-5-TQ100 XC95144XL-10TQG144C xc95144xl XC95144XL-10TQG100I XC95144XL-7TQ100C TQFP 100 PACKAGE footprint
Contextual Info: XC95144XL High Performance CPLD R DS056 v2.0 April 3, 2007 Features • • • • • • • • • • • 5 ns pin-to-pin logic delays System frequency up to 178 MHz 144 macrocells with 3,200 usable gates Available in small footprint packages - 100-pin TQFP (81 user I/O pins)

seven segment 10-pa5

Abstract: 1480B 4480B
Contextual Info: Data Sheet LANCAM B Family APPLICATION BENEFITS DISTINCTIVE CHARACTERISTICS • New low-cost LANCAM family in a space-saving TQFP package • • Fast speed allows processing of both DA and SA within 450 ns, equivalent to 138 ports of 10 Base-T or 13 ports of 100 Base-T Ethernet

351N

Abstract: FBGA-F
Contextual Info: Advance information •■ I l A S7C3256K36Z A S7C3256K32Z I 3.3V 2 5 6 K x 3 2 /3 6 synchronous burst SRAM with ZB T1 Features • • • • • • • • • M ultiple p ackagin g op tion s - Econom ical 100-pin TQFP package - C hip-scale fBGA package for sm allest footprint