TOP MARK AD0 Search Results

Contextual Info: PRELIMINARY DATA I2C Port Expander with 8 Push-Pull Ouputs The MAX7320 uses two address inputs with four-level logic to allow 16 I 2 C slave addresses. The slave address also determines the power-up logic level for the outputs in groups of four ports. The MAX7320 supports hot insertion. The serial interface SDA, SCL, AD0, AD2, and RST remain high

Contextual Info: IEEE1394 Open HCI Controller MB86613L Data Sheet Revision 1.11 Released: Wednesday, March 19, 2001 Modified: Wednesday, March 19, 2001 1 1 Introduction 1.1 Pin Assignment LQFP100 2 1.2 Table of Pin Assignment(LQFP100) NO. type Signal 1 2 3 4 5 6 7 8 9 10

poe splitter circuit

Abstract: MAGJACK application pcb MAX5971A MAX5971 RJ45 lan female jack atmel 748 08261X1TGH-F 0826-1X1T
Contextual Info: 19-5783; Rev 0; 3/11 MAX5971B Evaluation Kit Evaluates: MAX5971B General Description The MAX5971B evaluation kit EV kit is a fully assembled and tested surface-mount PCB featuring an Ethernet single-port power-sourcing equipment (PSE) circuit for -54V supply rail systems. The IEEEM 802.3af/at-compliant

Contextual Info: SSI 32C452 Storage Controller MCOtlMÍM Preliminary Data July, 1990 DESCRIPTION FEATURES The SSI 32C452 Storage Controller is a CMOS device that provides the basis for an intelligent Winchester disk drive controller capable of non-interleaved data transfers at rates up to 20 Mbit/s. When combined with

Wamco

Abstract: AIC010f 32C452 ECC19 ECC31 AIC-010F GP100 GP103 SA100 ST412HP
Contextual Info: SSI 32C452 óiliconMhtts Storage Controller Preliminary Data July, 1990 DESCRIPTION FEATURES The SSI 32C452 Storage Controller is a CMOS device that provides the basis for an intelligent Winchester disk drive controller capable of non-interleaved data transfers at rates up to 20 Mbit/s. When combined with

MAX9259

Abstract: D4S10A-40ML5 MX-49 MX38-FF GT11L-2S D4S20F-40MA5-Z JAE mx38 MX49Z04NQ1 nissei capacitor C107
Contextual Info: 19-5019; Rev 1; 4/10 MAX9259 Evaluation Kit Features The MAX9259 evaluation kit EV kit provides a proven design to evaluate the MAX9259 gigabit multimedia serial link (GMSL) with spread spectrum and full-duplex control channel. The EV kit also includes WindowsM

Dallas chip DS1287

Abstract: DS1285 DS1287 DS1385 DS1485 DS1585 DS1688 DS1688S DS1691 MDP28-2
Contextual Info: DS1688/DS1691 3V/5V Serialized Real-Time Clocks with NV RAM Control www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS1688/DS1691 are real-time clocks RTCs designed as successors to the industry standard DS1285, DS1385, DS1485, and DS1585 PC real-time clocks. These devices

E32K

Abstract: Dallas chip DS1287 DS1285 DS1287 DS1385 DS1485 DS1585 DS1688 DS1688S DS1691
Contextual Info: DS1688/DS1691 3V/5V Serialized Real-Time Clocks with NV RAM Control www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS1688/DS1691 are real-time clocks RTCs designed as successors to the industry standard DS1285, DS1385, DS1485, and DS1585 PC real-time clocks. These devices

2N7002-SOT23

Abstract: 2N7002_NL 2N7002-E3 7320R top mark adb 2N7002_NL ON SEMI MAX7320 MAX7320ATE min usb 8pin top mark ad0
Contextual Info: 19-4044; Rev 0; 2/08 MAX7320 Evaluation Kit The MAX7320 evaluation kit EV kit provides a proven design to evaluate the MAX7320 I2C port expander with eight push-pull outputs. The EV kit also includes Windows 2000/XP/Vista -compatible software that provides a simple graphical user interface (GUI) for

2N7002FC

Abstract: 2N7002-SOT23 2N7002_NL 7320R MAX7320 MAX7320ATE
Contextual Info: 19-4044; Rev 0; 2/08 MAX7320 Evaluation Kit The MAX7320 evaluation kit EV kit provides a proven design to evaluate the MAX7320 I2C port expander with eight push-pull outputs. The EV kit also includes Windows 2000/XP/Vista -compatible software that provides a simple graphical user interface (GUI) for

xilinx xc95108 jtag cable Schematic

Abstract: vhdl code for rs232 receiver vhdl code for rs232 interface block diagram UART using VHDL vhdl code for uart communication vhdl code for rs232 receiver using cpld 4 bit microcontroller using vhdl infrared counter vhdl interface of rs232 to UART in VHDL UART using VHDL
Contextual Info: APPLICATION NOTE  XAPP 102 January 13, 1998 Version 1.0 XC9500 Remote Field Upgrade 4* Application Note Summary This application note describes the concept and design of a remote field upgrade subsystem for an in-system programmable XC9500 CPLD. The description of the subsystem is given along with guidelines that should help with variations on it.

32D535

Abstract: decoding technique nrz DIAGRAM HP 4067
Contextual Info: SSI 32D535 Æ m s u s k m s Data Synchronizer/ 2, 7 RLL ENDEC with Write Precompensation May, 1990 FEATURES DESCRIPTION The SSI 32D535 Data Separator provides data recov­ ery, data encoding, and write precompensation for storage systems which employ a 2, 7 RLL encoding

D4S20F-40MA5-Z

Abstract: MAX9249 C1005X5R0J CDM20600 MAX9260 ROSENBERGER* usb R524 GRM188R71C106K diode U12 c530 EP3C25F324C8N
Contextual Info: 19-5177; Rev 0; 3/10 MAX9249 Evaluation Kit Features The MAX9249 evaluation kit EV kit provides a proven design to evaluate the MAX9249 gigabit multimedia serial link (GMSL) with spread spectrum and full-duplex control channel. The EV kit also includes Windows XPM-,

Transistor t30 motorola

Abstract: AK2548 LQFP-144 AK2546 AVSS18 motorola bts maintenance
Contextual Info: ASAHI KASEI [AK2548] AK2548 7 channel E1 Transceiver FEATURE • 7ch E1 transceiver • Jitter Tolerance: Compliant with ITU-T G.823, I.431 • Transmitter Pulse Shape: Compliant with ITU-T G.703 • Loss of Signal Detection: Compliant with ITU-T G.775 • Return loss: Compliant with ETS 300 166

DPM3

Abstract: AK2540 LQFP-144 TDK Pulse Transformers JPC
Contextual Info: ASAHI KASEI [AK2540] AK2540 Quad T1 Transceiver FEATURE - 4ch short haul T1 transceiver with jitter attenuator - Jitter Tolerance: Compliant with GR-499 Category I,II and TR 62411 - Transmitter Pulse Shape: Compliant with GR-499 and ANSI T1.102 1993 - Loss of Signal Detection

TDK Pulse Transformers JPC

Abstract: TNEG14
Contextual Info: ASAHI KASEI [AK2540] AK2540 Quad T1 Transceiver FEATURE - 4ch short haul T1 transceiver with jitter attenuator - Jitter Tolerance: Compliant with GR-499 Category I,II and TR 62411 - Transmitter Pulse Shape: Compliant with GR-499 and ANSI T1.102 1993 - Loss of Signal Detection

TDK Pulse Transformers JPC

Abstract: AK2540 LQFP-144
Contextual Info: ASAHI KASEI [AK2540] AK2540 Quad T1 Transceiver FEATURE - 4ch short haul T1 transceiver with jitter attenuator - Jitter Tolerance: Compliant with GR-499 Category I,II and TR 62411 - Transmitter Pulse Shape: Compliant with GR-499 and ANSI T1.102 1993 - Loss of Signal Detection

MSM66P563

Abstract: 0051P QFP64-P-1414-0 MSM66562 66P56 005ap
Contextual Info: E2E1032-27-Y4 Pr ¡ Semiconductor MSM66562/66P563 ¡ Semiconductor el im in This MSM66562/66P563 version: Jan. 1998 ar y Previous version: Nov. 1996 High-speed High-performance 16-Bit Microcontroller for Compact System GENERAL DESCRIPTION The MSM66562/66P563 is a high-speed, high-performance 16-bit microcontroller that employs

sc11006

Abstract: intel 8096 instruction set SC11022 SC11022CV QPSK telephone modem schematic intel 8096 SC11019CN SC11020CV SC11091 SC11024
Contextual Info: Complete datasheet of 11024CN/CV/CQ SC11024 2400 Bit Per Second Modem Analog Peripheral Features General Description Block Diagram Pin Description Connection Diagrams Functional Description Applications Terms Of Sale Download Data sheet FEATURES 1. 2. 3. 4.

Marvell prestera-dx

Abstract: Marvell prestera dx prestera-dx cpe wimax VSC7398 VSC7407 Si3452 AN399 dual poe pse injector Prestera dx
Contextual Info: S i 3 4 5 2/53 Q UAD H IGH - VO L TAG E P ORT C O N T R O L L E R FOR P O E AND P O E+ PSE S Features INT VOUT1 RST DET1 AD1 GND12 AD0 DET2 VOUT2 VEE2 40 39 38 37 36 35 34 33 32 31 30 VDD 2 29 DGND VREF 3 28 AD0 AIN 4 27 AD1 AOUT 5 26 AD2 AGND 6 25 AD2 RBIAS

prestera-dx

Abstract: SI3452B02GM vsc7407 SI3452-B02-GM
Contextual Info: Si3452 Q UAD H IGH - VO L TAG E P ORT C O N T R O L L E R FOR P O E AND P O E+ PSE S Features  INT VOUT1 RST DET1 AD1 GND12 AD0 DET2 VOUT2 VEE2 39 38 37 36 35 34 33 32 31 DGND VREF 3 28 AD0 AIN 4 27 AD1 AOUT 5 26 AD2 AGND 6 25 AD2 RBIAS 7 24 AD3 AGND 8

Marvell xcat

Abstract: prestera-dx
Contextual Info: Si3453 Q UAD H IGH - VO L TAG E P ORT C O N T R O L L E R FOR P O E AND P O E+ PSE S Features INT VOUT1 RST DET1 AD1 GND12 AD0 DET2 VOUT2 VEE2 40 39 38 37 36 35 34 33 32 31 30 VDD 2 29 DGND VREF 3 28 AD0 AIN 4 27 AD1 AOUT 5 26 AD2 AGND 6 25 AD2 RBIAS 7 24

Si3453D

Abstract: prestera-dx Si86 P802 TLV431 Si3453D-B01-GM Si3453-B01-GM Marvell prestera-dx Marvell xcat VSC74
Contextual Info: Si3453 Q UAD H IGH - VO L TAG E P ORT C O N T R O L L E R FOR P O E AND P O E+ PSE S Features INT VOUT1 RST DET1 AD1 GND12 AD0 DET2 VOUT2 VEE2 40 39 38 37 36 35 34 33 32 31 30 VDD 2 29 DGND VREF 3 28 AD0 AIN 4 27 AD1 AOUT 5 26 AD2 AGND 6 25 AD2 RBIAS 7 24

AN399

Abstract: GE Transient Voltage Suppression Manual Si3452 SI3452D dsasl0012201 dual poe pse injector MARKING 1AB marvell discovery SI3453C P802
Contextual Info: Si3452/3 Q U A D H IGH - VOLTA GE P O R T C O NT R O L L E R F O R P O E A N D P O E + P S E S Features Rev. 0.42 2/09 Copyright 2009 by Silicon Laboratories Pin Assignments INT VOUT1 RST DET1 AD1 GND12 AD0 DET2 VOUT2 VEE2 40 39 38 37 36 35 34 33 32 31