TN1 MARKING Search Results
TN1 MARKING Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| 2910/BQA | Rochester Electronics LLC | 2910 - Microprogram Controller - Dual marked (7801701QA) |
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| MQ80C186-12/BYA | Rochester Electronics LLC | 80C186 - Microprocessor, 16-Bit -Dual marked (5962-8850102YA) |
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| 54L04/BDA | Rochester Electronics LLC | 54L04 - Hex Inverter - Dual marked (M38510/02005BDA) |
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| 9936/BCA | Rochester Electronics LLC | 9936 - Hex Inverter - Dual marked (M38510/03003BCA) |
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| 54AC86/SDA-R | Rochester Electronics LLC | 54AC86/SDA-R - Dual marked (M38510R75202SDA) |
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TN1 MARKING Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
T14-22
Abstract: SBX1602 SBX1601A
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OCR Scan |
sbx1601asbx1602acxa1389aqsbx-1b01a+2 | |
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Contextual Info: JUL SO 9s3 SONY, _ S B X 1 6 1 A Serial Interface/Transmission Encoder Description Package Outline Unit : mm The SBX1601A is a hybrid IC encoder that converts the parallel data into serial form for the purpose of interface or transmission of digital video or audio data. |
OCR Scan |
sbx1601asbx1602asbx-1b01a | |
5c-2v coaxial cable
Abstract: sbx-60 comparator detector SBX1602A test circuit diagram COAXIAL CABLE 5c-2V maximum distance GZ37 5c-2V
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OCR Scan |
sbx1602asbx1601a135mhzcxa1389aq+9 | |
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Contextual Info: •I Ô3Ô53Ô3 00D554L. Dôb « S O N Y SONY _ _ _ _ _ _ _ _ _ _ _ _ _S B X 1 6 0 2 A Serial Interface/Transmission Decoder D escription P ackage O utline Unit : mm The SBX1602A is a Hybrid IC that receives serial data of the SMPTE T14.224 encoded by the SBX1601A |
OCR Scan |
00d554lsbx1602asbx1601a135mhz+5 | |
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Contextual Info: JA. i 0 '-*« SONY, _ SBX1602A Serial Interface/Transmission Decoder Description Package Outline Unit : mm The SBX1602A is a Hybrid IC that receives serial data of the SMPTE T14.224 encoded by the SBX1601A and decodes into parallel data. Features Built-in automatic equalizer for up to 300m using |
OCR Scan |
sbx1602asbx1601a135mhzcxa1389aq+1 | |
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Contextual Info: SY89850U Precision Low-Power LVPECL Line Driver/Receiver with Internal Termination General Description The SY89850U is a 2.5V/3.3V precision, high-speed, differential receiver capable of handling clocks up to 4GHz and data streams up to 3.2Gbps. The differential input includes Micrel's unique, 3-pin |
Original |
sy89850u100mv200mvpp800mv+2 | |
SY58012U
Abstract: SY89851U SY89851UMG SY89851UMGTR
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Original |
sy89851u100mv200mvpp800mv+5 | |
SY58601U
Abstract: SY89850U SY89850UMG SY89850UMGTR
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Original |
sy89850u100mv200mvpp800mv+5 | |
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Contextual Info: SY89850U Precision Low-Power LVPECL Line Driver/Receiver with Internal Termination General Description The SY89850U is a 2.5V/3.3V precision, high-speed, differential receiver capable of handling clocks up to 4GHz and data streams up to 3.2Gbps. The differential input includes Micrel's unique, 3-pin |
Original |
sy89850u100mv200mvpp800mv+2 | |
SY58601U
Abstract: SY89850U SY89850UMG SY89850UMGTR
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Original |
sy89850u100mv200mvpp800mv+5 | |
70357
Abstract: 0X1148 122D CRC16 D627 0x1039 0X1015 0X1157
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Original |
0110123e00010200000106122c00010103122c000170357+7 | |
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Contextual Info: PCS5I9658 November 2006 rev 0.3 3.3V 1:10 LVCMOS PLL Clock Generator Features and the reference clock frequency determines the VCO • 1:10 PLL based low-voltage clock generator frequency. Both must be selected to match the VCO • Supports zero-delay operation |
Original |
250mhz120psmpc958mpc9658+1 | |
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Contextual Info: PCS5I961P November 2006 rev 0.3 Low Voltage Zero Delay Buffer Features reference clock while the PCS5I961P offers an LVPECL reference clock. • Fully Integrated PLL • Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs • |
Original |
200mhz150pspcs5i961p | |
SY58021U
Abstract: SY89854U SY89854UMG SY89854UMGTR
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Original |
sy89854u100mv200mvppm9999-060905+3 | |
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Contextual Info: SY89474U Precision LVDS 2:1 Multiplexer with 1:2 Fanout and Internal Termination General Description The SY89474U is a 2.5V precision, high-speed 2:1 differential MUX capable of processing clocks up to 2.5GHz and data up to 2.5Gbps. The differential input includes Micrel’s unique, 3-pin input |
Original |
sy89474u100mv200mvpp325mv+2 | |
SY58021U
Abstract: SY89854U SY89854UMG SY89854UMGTR
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Original |
sy89854u100mv200mvppm9999-082907-c+3 | |
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Contextual Info: SY89850U Precision Low-Power LVPECL Line Driver/Receiver with Internal Termination General Description The SY89850U is a 2.5V/3.3V precision, high-speed, differential receiver capable of handling clocks up to 4GHz and data streams up to 3.2Gbps. The differential input includes Micrel's unique, 3-pin |
Original |
sy89850u100mv200mvpp800mv+2 | |
100208
Abstract: 25KW SY89852U SY89852UMG SY89852UMGTR
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Original |
sy89852u100mv200mvpp800mv+6 | |
SY89474UMGTR
Abstract: QFN-24 SY89473U SY89474U SY89474UMG SY89840U SY89845U
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Original |
sy89474u100mv200mvpp325mv+8 | |
SY58021U
Abstract: SY89854U SY89854UMG SY89854UMGTR
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Original |
sy89854u100mv200mvppm9999-022007-b+3 | |
SY89200U
Abstract: SY89200UMG SY89200UMGTR SY89200UMI SY89200UMITR
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Original |
sy89200u150psm9999-030707-dsy89200umg+3 | |
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Contextual Info: SY89859U Precision Low-Power 8:1 MUX with Internal Termination and 1:2 LVPECL Fanout Buffer General Description The SY89859U is a low jitter, low-power, high-speed 8:1 multiplexer with a 1:2 differential fanout buffer optimized for precision telecom and enterprise server |
Original |
sy89859u100mv200mvpp800mv+2 | |
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Contextual Info: SY89856U 2GHz, Low-Power, 1:6 LVPECL Fanout Buffer with 2:1 Input MUX and Internal Termination General Description The SY89856U is a 2.5V/3.3V precision, highspeed, 1:6 fanout capable of handling clocks up to 2.0GHz. A differential 2:1 MUX input is included for |
Original |
sy89856u100mv200mvpp200ps+1 | |
SY58026U
Abstract: SY89853U SY89853UMG SY89853UMGTR
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Original |
sy89853u800mv100mv180ps+4 | |