| SN74GTLP1394PW |  | Texas Instruments | 2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity 16-TSSOP -40 to 85 |   |   | 
| SN74GTLP1395PWR |  | Texas Instruments | Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-TSSOP -40 to 85 |   |   | 
| SN74GTLP1394D |  | Texas Instruments | 2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity 16-SOIC -40 to 85 |   |  | 
| SN74GTLP1394PWR |  | Texas Instruments | 2-Bit LVTTL-to-GTLP Adj-Edge-Rate Bus Xcvr w/Split LVTTL Port, Feedback Path, & Selectable Polarity 16-TSSOP -40 to 85 |   |   | 
| SN74GTLP1395DWR |  | Texas Instruments | Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-SOIC -40 to 85 |   |   |